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foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33958 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
1 changed file(s) with 19 addition(s) and 13 deletion(s). Raw diff Collapse all Expand all
184184 abort();
185185 }
186186
187 /// isLowRegister - Returns true if the register is low register r0-r7.
188 ///
189 static bool isLowRegister(unsigned Reg) {
190 using namespace ARM;
191 switch (Reg) {
192 case R0: case R1: case R2: case R3:
193 case R4: case R5: case R6: case R7:
194 return true;
195 default:
196 return false;
197 }
198 }
199
187200 MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr *MI,
188201 unsigned OpNum, int FI) const {
189202 unsigned Opc = MI->getOpcode();
205218 case ARM::tMOVrr: {
206219 if (OpNum == 0) { // move -> store
207220 unsigned SrcReg = MI->getOperand(1).getReg();
221 if (!isLowRegister(SrcReg))
222 // tSTRspi cannot take a high register operand.
223 break;
208224 NewMI = BuildMI(TII.get(ARM::tSTRspi)).addReg(SrcReg).addFrameIndex(FI)
209225 .addImm(0);
210226 } else { // move -> load
211227 unsigned DstReg = MI->getOperand(0).getReg();
228 if (!isLowRegister(DstReg))
229 // tLDRspi cannot target a high register operand.
230 break;
212231 NewMI = BuildMI(TII.get(ARM::tLDRspi), DstReg).addFrameIndex(FI)
213232 .addImm(0);
214233 }
312331 BuildMI(MBB, MBBI, TII.get(isSub ? ARM::SUBri : ARM::ADDri), DestReg)
313332 .addReg(BaseReg).addImm(SOImmVal);
314333 BaseReg = DestReg;
315 }
316 }
317
318 /// isLowRegister - Returns true if the register is low register r0-r7.
319 ///
320 static bool isLowRegister(unsigned Reg) {
321 using namespace ARM;
322 switch (Reg) {
323 case R0: case R1: case R2: case R3:
324 case R4: case R5: case R6: case R7:
325 return true;
326 default:
327 return false;
328334 }
329335 }
330336