llvm.org GIT mirror llvm / 3f0e883
Clean up static analyzer warnings. Clang's static analyzer found several potential cases of undefined behavior, use of un-initialized values, and potentially null pointer dereferences in tablegen, Support, MC, and ADT. This cleans them up with specific assertions on the assumptions of the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224154 91177308-0d34-0410-b5e6-96231b3b80d8 Michael Ilseman 4 years ago
11 changed file(s) with 24 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
449449
450450 // Grow the bitvector to have enough elements.
451451 Capacity = RHSWords;
452 assert(Capacity > 0 && "negative capacity?");
452453 BitWord *NewBits = (BitWord *)std::malloc(Capacity * sizeof(BitWord));
453454 std::memcpy(NewBits, RHS.Bits, Capacity * sizeof(BitWord));
454455
291291 }
292292
293293 SmallBitVector &set(unsigned Idx) {
294 if (isSmall())
294 if (isSmall()) {
295 assert(Idx <= std::numeric_limits::digits &&
296 "undefined behavior");
295297 setSmallBits(getSmallBits() | (uintptr_t(1) << Idx));
298 }
296299 else
297300 getPointer()->set(Idx);
298301 return *this;
681681 // We truncate our partial emission to fit within the bounds of the
682682 // emission domain. This produces nicer output and silences potential
683683 // truncation warnings when round tripping through another assembler.
684 ValueToEmit &= ~0ULL >> (64 - EmissionSize * 8);
684 uint64_t Shift = 64 - EmissionSize * 8;
685 assert(Shift < std::numeric_limits::digits &&
686 "undefined behavior");
687 ValueToEmit &= ~0ULL >> Shift;
685688 EmitIntValue(ValueToEmit, EmissionSize);
686689 Emitted += EmissionSize;
687690 }
404404 }
405405
406406 void MCObjectStreamer::EmitZeros(uint64_t NumBytes) {
407 unsigned ItemSize = getCurrentSection().first->isVirtualSection() ? 0 : 1;
407 const MCSection *Sec = getCurrentSection().first;
408 assert(Sec && "need a section");
409 unsigned ItemSize = Sec->isVirtualSection() ? 0 : 1;
408410 insert(new MCFillFragment(0, ItemSize, NumBytes));
409411 }
410412
581581 }
582582
583583 bool COFFAsmParser::ParseSEHDirectivePushReg(StringRef, SMLoc L) {
584 unsigned Reg;
584 unsigned Reg = 0;
585585 if (ParseSEHRegisterNumber(Reg))
586586 return true;
587587
594594 }
595595
596596 bool COFFAsmParser::ParseSEHDirectiveSetFrame(StringRef, SMLoc L) {
597 unsigned Reg;
597 unsigned Reg = 0;
598598 int64_t Off;
599599 if (ParseSEHRegisterNumber(Reg))
600600 return true;
635635 }
636636
637637 bool COFFAsmParser::ParseSEHDirectiveSaveReg(StringRef, SMLoc L) {
638 unsigned Reg;
638 unsigned Reg = 0;
639639 int64_t Off;
640640 if (ParseSEHRegisterNumber(Reg))
641641 return true;
662662 // FIXME: This method is inherently x86-specific. It should really be in the
663663 // x86 backend.
664664 bool COFFAsmParser::ParseSEHDirectiveSaveXMM(StringRef, SMLoc L) {
665 unsigned Reg;
665 unsigned Reg = 0;
666666 int64_t Off;
667667 if (ParseSEHRegisterNumber(Reg))
668668 return true;
168168 int Shift = 63 - (NewE - E);
169169 assert(Shift <= LeadingZeros);
170170 assert(Shift == LeadingZeros || NewE == ScaledNumbers::MaxScale);
171 assert((Shift & (1u << std::numeric_limits::digits)) == 0 &&
172 "undefined behavior");
171 assert(Shift >= 0 && Shift < 64 && "undefined behavior");
173172 D <<= Shift;
174173 E = NewE;
175174
311311 // than the buffer. Directly write the chunk that is a multiple of the
312312 // preferred buffer size and put the remainder in the buffer.
313313 if (LLVM_UNLIKELY(OutBufCur == OutBufStart)) {
314 assert(NumBytes != 0 && "undefined behavior");
314315 size_t BytesToWrite = Size - (Size % NumBytes);
315316 write_impl(Ptr, BytesToWrite);
316317 size_t BytesRemaining = Size - BytesToWrite;
811811 return VarInit::get(MCName, RV->getType());
812812 }
813813 }
814
814 assert(CurRec && "NULL pointer");
815815 if (Record *D = (CurRec->getRecords()).getDef(Name))
816816 return DefInit::get(D);
817817
25682568 I->error("set destination should be a register!");
25692569
25702570 DefInit *Val = dyn_cast(Dest->getLeafValue());
2571 if (!Val)
2571 if (!Val) {
25722572 I->error("set destination should be a register!");
2573 continue;
2574 }
25732575
25742576 if (Val->getDef()->isSubClassOf("RegisterClass") ||
25752577 Val->getDef()->isSubClassOf("ValueType") ||
536536 // If both are Operands with the same MVT, allow the conversion. It's
537537 // up to the user to make sure the values are appropriate, just like
538538 // for isel Pat's.
539 if (InstOpRec->isSubClassOf("Operand") &&
539 if (InstOpRec->isSubClassOf("Operand") && ADI &&
540540 ADI->getDef()->isSubClassOf("Operand")) {
541541 // FIXME: What other attributes should we check here? Identical
542542 // MIOperandInfo perhaps?
145145 }
146146
147147 const std::string &CodeGenRegister::getName() const {
148 assert(TheDef && "no def");
148149 return TheDef->getName();
149150 }
150151