llvm.org GIT mirror llvm / 3f0dbab
Add support for dynamic stack realignment in the presence of dynamic allocas on X86. Basically, this is a reapplication of r158087 with a few fixes. Specifically, (1) the stack pointer is restored from the base pointer before popping callee-saved registers and (2) in obscure cases (see comments in patch) we must cache the value of the original stack adjustment in the prologue and apply it in the epilogue. rdar://11496434 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160002 91177308-0d34-0410-b5e6-96231b3b80d8 Chad Rosier 8 years ago
7 changed file(s) with 139 addition(s) and 19 deletion(s). Raw diff Collapse all Expand all
214214 /// just allocate them normally.
215215 bool UseLocalStackAllocationBlock;
216216
217 /// After the stack pointer has been restore from the base pointer we
218 /// use a cached adjusment. Currently only used for x86.
219 int64_t BPAdj;
220
217221 public:
218222 explicit MachineFrameInfo(const TargetFrameLowering &tfi) : TFI(tfi) {
219223 StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0;
229233 LocalFrameSize = 0;
230234 LocalFrameMaxAlign = 0;
231235 UseLocalStackAllocationBlock = false;
236 BPAdj = 0;
232237 }
233238
234239 /// hasStackObjects - Return true if there are any stack objects in this
537542
538543 void setCalleeSavedInfoValid(bool v) { CSIValid = v; }
539544
545 /// setBasePtrStackAdjustment - If we're restoring the stack pointer from the
546 /// base pointer, due to dynamic stack realignment + VLAs, we cache the
547 /// number of bytes initially allocated for the stack frame. In obscure
548 /// cases (e.g., tail calls with byval argument and no stack protector), the
549 /// stack gets adjusted outside of the prolog, but these shouldn't be
550 /// considered when restoring from the base pointer. Currently, this is only
551 /// needed for x86.
552 void setBasePtrStackAdjustment(int64_t adj) { BPAdj = adj; }
553 int64_t getBasePtrStackAdjustment() const { return BPAdj; }
554
540555 /// getPristineRegs - Return a set of physical registers that are pristine on
541556 /// entry to the MBB.
542557 ///
649649 unsigned SlotSize = RegInfo->getSlotSize();
650650 unsigned FramePtr = RegInfo->getFrameRegister(MF);
651651 unsigned StackPtr = RegInfo->getStackRegister();
652 unsigned BasePtr = RegInfo->getBaseRegister();
652653 DebugLoc DL;
653654
654655 // If we're forcing a stack realignment we can't rely on just the frame
911912 } else if (NumBytes)
912913 emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,
913914 UseLEA, TII, *RegInfo);
915
916 // If we need a base pointer, set it up here. It's whatever the value
917 // of the stack pointer is at this point. Any variable size objects
918 // will be allocated after this, so we can still use the base pointer
919 // to reference locals.
920 if (RegInfo->hasBasePointer(MF)) {
921 // Update the frame pointer with the current stack pointer.
922 unsigned Opc = Is64Bit ? X86::MOV64rr : X86::MOV32rr;
923 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
924 .addReg(StackPtr)
925 .setMIFlag(MachineInstr::FrameSetup);
926
927 MFI->setBasePtrStackAdjustment(NumBytes);
928 }
914929
915930 if (( (!HasFP && NumBytes) || PushedRegs) && needsFrameMoves) {
916931 // Mark end of stack pointer adjustment.
959974 unsigned SlotSize = RegInfo->getSlotSize();
960975 unsigned FramePtr = RegInfo->getFrameRegister(MF);
961976 unsigned StackPtr = RegInfo->getStackRegister();
977 unsigned BasePtr = RegInfo->getBaseRegister();
962978
963979 switch (RetOpcode) {
964980 default:
10271043 // instruction, merge the two instructions.
10281044 if (NumBytes || MFI->hasVarSizedObjects())
10291045 mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);
1046
1047 // Restore the SP from the BP, if necessary.
1048 if (RegInfo->hasBasePointer(MF)) {
1049 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
1050 StackPtr).addReg(BasePtr);
1051
1052 // When restoring from the BP we must use a cached SP adjustment.
1053 NumBytes = MFI->getBasePtrStackAdjustment();
1054 }
10301055
10311056 // If dynamic alloca is used, then reset esp to point to the last callee-saved
10321057 // slot before popping them off! Same applies for the case, when stack was
11461171 int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea();
11471172 uint64_t StackSize = MFI->getStackSize();
11481173
1149 if (RegInfo->needsStackRealignment(MF)) {
1174 if (RegInfo->hasBasePointer(MF)) {
1175 assert (hasFP(MF) && "VLAs and dynamic stack realign, but no FP?!");
11501176 if (FI < 0) {
11511177 // Skip the saved EBP.
11521178 return Offset + RegInfo->getSlotSize();
11541180 assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);
11551181 return Offset + StackSize;
11561182 }
1183 } else if (RegInfo->needsStackRealignment(MF)) {
1184 if (FI < 0) {
1185 // Skip the saved EBP.
1186 return Offset + RegInfo->getSlotSize();
1187 } else {
1188 assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);
1189 return Offset + StackSize;
1190 }
11571191 // FIXME: Support tail calls
11581192 } else {
11591193 if (!hasFP(MF))
11771211 const X86RegisterInfo *RegInfo =
11781212 static_cast(MF.getTarget().getRegisterInfo());
11791213 // We can't calculate offset from frame pointer if the stack is realigned,
1180 // so enforce usage of stack pointer.
1181 FrameReg = (RegInfo->needsStackRealignment(MF)) ?
1182 RegInfo->getStackRegister() : RegInfo->getFrameRegister(MF);
1214 // so enforce usage of stack/base pointer. The base pointer is used when we
1215 // have dynamic allocas in addition to dynamic realignment.
1216 if (RegInfo->hasBasePointer(MF))
1217 FrameReg = RegInfo->getBaseRegister();
1218 else if (RegInfo->needsStackRealignment(MF))
1219 FrameReg = RegInfo->getStackRegister();
1220 else
1221 FrameReg = RegInfo->getFrameRegister(MF);
11831222 return getFrameIndexOffset(MF, FI);
11841223 }
11851224
13161355 "Slot for EBP register must be last in order to be found!");
13171356 (void)FrameIdx;
13181357 }
1358
1359 // Spill the BasePtr if it's used.
1360 if (RegInfo->hasBasePointer(MF))
1361 MF.getRegInfo().setPhysRegUsed(RegInfo->getBaseRegister());
13191362 }
13201363
13211364 static bool
4949 " needed for the function."),
5050 cl::init(false), cl::Hidden);
5151
52 cl::opt
53 EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),
54 cl::desc("Enable use of a base pointer for complex stack frames"));
55
5256 X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm,
5357 const TargetInstrInfo &tii)
5458 : X86GenRegisterInfo(tm.getSubtarget().is64Bit()
6771 SlotSize = 8;
6872 StackPtr = X86::RSP;
6973 FramePtr = X86::RBP;
74 BasePtr = X86::RBX;
7075 } else {
7176 SlotSize = 4;
7277 StackPtr = X86::ESP;
7378 FramePtr = X86::EBP;
79 BasePtr = X86::EBX;
7480 }
7581 }
7682
289295 Reserved.set(*I);
290296 }
291297
298 // Set the base-pointer register and its aliases as reserved if needed.
299 if (hasBasePointer(MF)) {
300 CallingConv::ID CC = MF.getFunction()->getCallingConv();
301 const uint32_t* RegMask = getCallPreservedMask(CC);
302 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister()))
303 report_fatal_error(
304 "Stack realignment in presence of dynamic allocas is not supported with"
305 "this calling convention.");
306
307 Reserved.set(getBaseRegister());
308 for (MCSubRegIterator I(getBaseRegister(), this); I.isValid(); ++I)
309 Reserved.set(*I);
310 }
311
292312 // Mark the segment registers as reserved.
293313 Reserved.set(X86::CS);
294314 Reserved.set(X86::SS);
339359 // Stack Frame Processing methods
340360 //===----------------------------------------------------------------------===//
341361
362 bool X86RegisterInfo::hasBasePointer(const MachineFunction &MF) const {
363 const MachineFrameInfo *MFI = MF.getFrameInfo();
364
365 if (!EnableBasePointer)
366 return false;
367
368 // When we need stack realignment and there are dynamic allocas, we can't
369 // reference off of the stack pointer, so we reserve a base pointer.
370 if (needsStackRealignment(MF) && MFI->hasVarSizedObjects())
371 return true;
372
373 return false;
374 }
375
342376 bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const {
343377 const MachineFrameInfo *MFI = MF.getFrameInfo();
344 return (MF.getTarget().Options.RealignStack &&
345 !MFI->hasVarSizedObjects());
378 const MachineRegisterInfo *MRI = &MF.getRegInfo();
379 if (!MF.getTarget().Options.RealignStack)
380 return false;
381
382 // Stack realignment requires a frame pointer. If we already started
383 // register allocation with frame pointer elimination, it is too late now.
384 if (!MRI->canReserveReg(FramePtr))
385 return false;
386
387 // If a base pointer is necessary. Check that it isn't too late to reserve
388 // it.
389 if (MFI->hasVarSizedObjects())
390 return MRI->canReserveReg(BasePtr);
391 return true;
346392 }
347393
348394 bool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
351397 unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
352398 bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
353399 F->hasFnAttr(Attribute::StackAlignment));
354
355 // FIXME: Currently we don't support stack realignment for functions with
356 // variable-sized allocas.
357 // FIXME: It's more complicated than this...
358 if (0 && requiresRealignment && MFI->hasVarSizedObjects())
359 report_fatal_error(
360 "Stack realignment in presence of dynamic allocas is not supported");
361400
362401 // If we've requested that we force align the stack do so now.
363402 if (ForceStackAlign)
498537
499538 unsigned Opc = MI.getOpcode();
500539 bool AfterFPPop = Opc == X86::TAILJMPm64 || Opc == X86::TAILJMPm;
501 if (needsStackRealignment(MF))
540 if (hasBasePointer(MF))
541 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());
542 else if (needsStackRealignment(MF))
502543 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);
503544 else if (AfterFPPop)
504545 BasePtr = StackPtr;
4848 /// FramePtr - X86 physical register used as frame ptr.
4949 ///
5050 unsigned FramePtr;
51
52 /// BasePtr - X86 physical register used as a base ptr in complex stack
53 /// frames. I.e., when we need a 3rd base, not just SP and FP, due to
54 /// variable size stack objects.
55 unsigned BasePtr;
5156
5257 public:
5358 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
105110 /// register scavenger to determine what registers are free.
106111 BitVector getReservedRegs(const MachineFunction &MF) const;
107112
113 bool hasBasePointer(const MachineFunction &MF) const;
114
108115 bool canRealignStack(const MachineFunction &MF) const;
109116
110117 bool needsStackRealignment(const MachineFunction &MF) const;
122129 // Debug information queries.
123130 unsigned getFrameRegister(const MachineFunction &MF) const;
124131 unsigned getStackRegister() const { return StackPtr; }
132 unsigned getBaseRegister() const { return BasePtr; }
125133 // FIXME: Move to FrameInfok
126134 unsigned getSlotSize() const { return SlotSize; }
127135
1414 call void @bar(<2 x i64>* %p)
1515 ret void
1616 ; CHECK: foo2
17 ; CHECK: andl $-32, %esp
1718 ; CHECK: andl $-32, %eax
1819 }
1414 call void @bar(<2 x i64>* %p)
1515 ret void
1616 ; CHECK: foo2
17 ; CHECK: andq $-32, %rsp
1718 ; CHECK: andq $-32, %rax
1819 }
1616
1717 define i64 @g(i32 %i) nounwind {
1818 ; CHECK: g:
19 ; CHECK: pushl
19 ; CHECK: pushl %ebp
2020 ; CHECK-NEXT: movl %esp, %ebp
21 ; CHECK-NEXT: andl $-32, %esp
2122 ; CHECK-NEXT: pushl
22 ; CHECK-NEXT: subl $20, %esp
23 ; CHECK-NEXT: pushl
24 ; CHECK-NEXT: subl $24, %esp
25 ;
26 ; Now setup the base pointer (%ebx).
27 ; CHECK-NEXT: movl %esp, %ebx
2328 ; CHECK-NOT: {{[^ ,]*}}, %esp
2429 ;
2530 ; The next adjustment of the stack is due to the alloca.
4045 ; CHECK-NEXT: addl $32, %esp
4146 ; CHECK-NOT: {{[^ ,]*}}, %esp
4247 ;
43 ; Finally we nede to restore %esp from %ebp, the alloca prevents us from
44 ; restoring it directly.
48 ; Restore %esp from %ebx (base pointer) so we can pop the callee-saved
49 ; registers. This is the state prior to the allocation of VLAs.
4550 ; CHECK-NOT: popl
46 ; CHECK: leal -4(%ebp), %esp
51 ; CHECK: movl %ebx, %esp
52 ; CHECK-NEXT: addl $24, %esp
4753 ; CHECK-NEXT: popl
4854 ; CHECK-NEXT: popl
55 ;
56 ; Finally we need to restore %esp from %ebp due to dynamic stack
57 ; realignment.
58 ; CHECK-NEXT: movl %ebp, %esp
59 ; CHECK-NEXT: popl %ebp
4960 ; CHECK-NEXT: ret
5061
5162 entry: