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[InstCombine] Dropping redundant masking before left-shift [4/5] (PR42563) Summary: If we have some pattern that leaves only some low bits set, and then performs left-shift of those bits, if none of the bits that are left after the final shift are modified by the mask, we can omit the mask. There are many variants to this pattern: e. `((x << MaskShAmt) l>> MaskShAmt) << ShiftShAmt` All these patterns can be simplified to just: `x << ShiftShAmt` iff: e. `(ShiftShAmt-MaskShAmt) s>= 0` (i.e. `ShiftShAmt u>= MaskShAmt`) alive proofs: e: https://rise4fun.com/Alive/0FT For now let's start with patterns where both shift amounts are variable, with trivial constant "offset" between them, since i believe this is both simplest to handle and i think this is most common. But again, there are likely other variants where we could use ValueTracking/ConstantRange to handle more cases. https://bugs.llvm.org/show_bug.cgi?id=42563 Differential Revision: https://reviews.llvm.org/D64521 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366539 91177308-0d34-0410-b5e6-96231b3b80d8 Roman Lebedev a month ago
2 changed file(s) with 14 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
7373 // b) (x & (~(-1 << MaskShAmt))) << ShiftShAmt
7474 // c) (x & (-1 >> MaskShAmt)) << ShiftShAmt
7575 // d) (x & ((-1 << MaskShAmt) >> MaskShAmt)) << ShiftShAmt
76 // e) ((x << MaskShAmt) l>> MaskShAmt) << ShiftShAmt
7677 // All these patterns can be simplified to just:
7778 // x << ShiftShAmt
7879 // iff:
79 // a,b) (MaskShAmt+ShiftShAmt) u>= bitwidth(x)
80 // c,d) (ShiftShAmt-MaskShAmt) s>= 0 (i.e. ShiftShAmt u>= MaskShAmt)
80 // a,b) (MaskShAmt+ShiftShAmt) u>= bitwidth(x)
81 // c,d,e) (ShiftShAmt-MaskShAmt) s>= 0 (i.e. ShiftShAmt u>= MaskShAmt)
8182 static Instruction *
8283 dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
8384 const SimplifyQuery &SQ) {
114115 APInt(BitWidth, BitWidth))))
115116 return nullptr;
116117 // All good, we can do this fold.
117 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X)))) {
118 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) ||
119 match(Masked, m_LShr(m_Shl(m_Value(X), m_Value(MaskShAmt)),
120 m_Deferred(MaskShAmt)))) {
118121 // Can we simplify (ShiftShAmt-MaskShAmt) ?
119122 Value *ShAmtsDiff =
120123 SimplifySubInst(ShiftShAmt, MaskShAmt, /*IsNSW=*/false, /*IsNUW=*/false,
2020 ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
2121 ; CHECK-NEXT: call void @use32(i32 [[T0]])
2222 ; CHECK-NEXT: call void @use32(i32 [[T1]])
23 ; CHECK-NEXT: [[T2:%.*]] = shl i32 [[T1]], [[NBITS]]
23 ; CHECK-NEXT: [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
2424 ; CHECK-NEXT: ret i32 [[T2]]
2525 ;
2626 %t0 = shl i32 %x, %nbits
3939 ; CHECK-NEXT: call void @use32(i32 [[T0]])
4040 ; CHECK-NEXT: call void @use32(i32 [[T1]])
4141 ; CHECK-NEXT: call void @use32(i32 [[T2]])
42 ; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T1]], [[T2]]
42 ; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[T2]]
4343 ; CHECK-NEXT: ret i32 [[T3]]
4444 ;
4545 %t0 = shl i32 %x, %nbits
6464 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]])
6565 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
6666 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
67 ; CHECK-NEXT: [[T3:%.*]] = shl <3 x i32> [[T1]], [[T2]]
67 ; CHECK-NEXT: [[T3:%.*]] = shl <3 x i32> [[X]], [[T2]]
6868 ; CHECK-NEXT: ret <3 x i32> [[T3]]
6969 ;
7070 %t0 = shl <3 x i32> %x, %nbits
8585 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]])
8686 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
8787 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
88 ; CHECK-NEXT: [[T3:%.*]] = shl <3 x i32> [[T1]], [[T2]]
88 ; CHECK-NEXT: [[T3:%.*]] = shl <3 x i32> [[X]], [[T2]]
8989 ; CHECK-NEXT: ret <3 x i32> [[T3]]
9090 ;
9191 %t0 = shl <3 x i32> %x, %nbits
106106 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]])
107107 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
108108 ; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
109 ; CHECK-NEXT: [[T3:%.*]] = shl <3 x i32> [[T1]], [[T2]]
109 ; CHECK-NEXT: [[T3:%.*]] = shl <3 x i32> [[X]], [[T2]]
110110 ; CHECK-NEXT: ret <3 x i32> [[T3]]
111111 ;
112112 %t0 = shl <3 x i32> %x, %nbits
127127 ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
128128 ; CHECK-NEXT: call void @use32(i32 [[T0]])
129129 ; CHECK-NEXT: call void @use32(i32 [[T1]])
130 ; CHECK-NEXT: [[T2:%.*]] = shl nuw i32 [[T1]], [[NBITS]]
130 ; CHECK-NEXT: [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
131131 ; CHECK-NEXT: ret i32 [[T2]]
132132 ;
133133 %t0 = shl i32 %x, %nbits
144144 ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
145145 ; CHECK-NEXT: call void @use32(i32 [[T0]])
146146 ; CHECK-NEXT: call void @use32(i32 [[T1]])
147 ; CHECK-NEXT: [[T2:%.*]] = shl nsw i32 [[T1]], [[NBITS]]
147 ; CHECK-NEXT: [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
148148 ; CHECK-NEXT: ret i32 [[T2]]
149149 ;
150150 %t0 = shl i32 %x, %nbits
161161 ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
162162 ; CHECK-NEXT: call void @use32(i32 [[T0]])
163163 ; CHECK-NEXT: call void @use32(i32 [[T1]])
164 ; CHECK-NEXT: [[T2:%.*]] = shl nuw nsw i32 [[T1]], [[NBITS]]
164 ; CHECK-NEXT: [[T2:%.*]] = shl i32 [[X]], [[NBITS]]
165165 ; CHECK-NEXT: ret i32 [[T2]]
166166 ;
167167 %t0 = shl i32 %x, %nbits