llvm.org GIT mirror llvm / 3d636ea
Add systematic testing for cttz as well, and fix the bug I spotted by inspection earlier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147250 91177308-0d34-0410-b5e6-96231b3b80d8 Chandler Carruth 8 years ago
2 changed file(s) with 32 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
378378 setOperationAction(ISD::FREM , MVT::f80 , Expand);
379379 setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom);
380380
381 setOperationAction(ISD::CTTZ_ZERO_UNDEF , MVT::i8 , Expand);
382381 if (Subtarget->hasBMI()) {
383382 setOperationAction(ISD::CTTZ , MVT::i8 , Promote);
383 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8 , Expand);
384384 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16 , Expand);
385385 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand);
386386 if (Subtarget->is64Bit())
389389 setOperationAction(ISD::CTTZ , MVT::i8 , Custom);
390390 setOperationAction(ISD::CTTZ , MVT::i16 , Custom);
391391 setOperationAction(ISD::CTTZ , MVT::i32 , Custom);
392 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8 , Promote);
392393 if (Subtarget->is64Bit())
393394 setOperationAction(ISD::CTTZ , MVT::i64 , Custom);
394395 }
0 ; RUN: llc < %s -march=x86-64 -mcpu=yonah | FileCheck %s
11
2 declare i8 @llvm.cttz.i8(i8, i1)
3 declare i16 @llvm.cttz.i16(i16, i1)
24 declare i32 @llvm.cttz.i32(i32, i1)
5 declare i64 @llvm.cttz.i64(i64, i1)
36 declare i8 @llvm.ctlz.i8(i8, i1)
47 declare i16 @llvm.ctlz.i16(i16, i1)
58 declare i32 @llvm.ctlz.i32(i32, i1)
69 declare i64 @llvm.ctlz.i64(i64, i1)
10
11 define i8 @cttz_i8(i8 %x) {
12 %tmp = call i8 @llvm.cttz.i8( i8 %x, i1 true )
13 ret i8 %tmp
14 ; CHECK: cttz_i8:
15 ; CHECK: bsfw
16 ; CHECK-NOT: cmov
17 ; CHECK: ret
18 }
19
20 define i16 @cttz_i16(i16 %x) {
21 %tmp = call i16 @llvm.cttz.i16( i16 %x, i1 true )
22 ret i16 %tmp
23 ; CHECK: cttz_i16:
24 ; CHECK: bsfw
25 ; CHECK-NOT: cmov
26 ; CHECK: ret
27 }
728
829 define i32 @cttz_i32(i32 %x) {
930 %tmp = call i32 @llvm.cttz.i32( i32 %x, i1 true )
1031 ret i32 %tmp
1132 ; CHECK: cttz_i32:
1233 ; CHECK: bsfl
34 ; CHECK-NOT: cmov
35 ; CHECK: ret
36 }
37
38 define i64 @cttz_i64(i64 %x) {
39 %tmp = call i64 @llvm.cttz.i64( i64 %x, i1 true )
40 ret i64 %tmp
41 ; CHECK: cttz_i64:
42 ; CHECK: bsfq
1343 ; CHECK-NOT: cmov
1444 ; CHECK: ret
1545 }