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Approved by Evan. $ svn merge -c 113576 https://llvm.org/svn/llvm-project/llvm/trunk --- Merging r113576 into '.': U test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll U lib/Target/ARM/ARMLoadStoreOptimizer.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_28@113583 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 10 years ago
2 changed file(s) with 7 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
457457 case ARM::t2STM:
458458 case ARM::VLDMS:
459459 case ARM::VSTMS:
460 return (MI->getNumOperands() - 4) * 4;
460461 case ARM::VLDMD:
461462 case ARM::VSTMD:
462 return (MI->getNumOperands() - 4) * 4;
463 return (MI->getNumOperands() - 4) * 8;
463464 }
464465 }
465466
None ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | FileCheck %s
11
22 @quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
33 @dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
44 @A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1]
55
6 ; CHECK: dct_luma_sp:
67 define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) {
78 entry:
9 ; Make sure to use base-updating stores for saving callee-saved registers.
10 ; CHECK-NOT: sub sp
11 ; CHECK: vstmdb sp!
812 %predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1]
913 br label %cond_next489
1014