llvm.org GIT mirror llvm / 3b2360f
Merging r296698: ------------------------------------------------------------------------ r296698 | rnk | 2017-03-01 17:41:12 -0500 (Wed, 01 Mar 2017) | 10 lines [Constant Hoisting] Avoid inserting instructions before EH pads Now that terminators can be EH pads, this code needs to iterate over the immediate dominators of the EH pad to find a valid insertion point. Fix for PR32107 Patch by Robert Olliff! Differential Revision: https://reviews.llvm.org/D30511 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@299670 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 2 years ago
2 changed file(s) with 72 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
135135 if (Idx != ~0U && isa(Inst))
136136 return cast(Inst)->getIncomingBlock(Idx)->getTerminator();
137137
138 BasicBlock *IDom = DT->getNode(Inst->getParent())->getIDom()->getBlock();
139 return IDom->getTerminator();
138 // This must be an EH pad. Iterate over immediate dominators until we find a
139 // non-EH pad. We need to skip over catchswitch blocks, which are both EH pads
140 // and terminators.
141 auto IDom = DT->getNode(Inst->getParent())->getIDom();
142 while (IDom->getBlock()->isEHPad()) {
143 assert(Entry != IDom->getBlock() && "eh pad in entry block");
144 IDom = IDom->getIDom();
145 }
146
147 return IDom->getBlock()->getTerminator();
140148 }
141149
142150 /// \brief Find an insertion point that dominates all uses.
0 ; RUN: opt -S -consthoist < %s | FileCheck %s
1
2 ; FIXME: The catchpad doesn't even use the constant, so a better fix would be to
3 ; insert the bitcast in the catchpad block.
4
5 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
6 target triple = "x86_64-pc-windows-msvc"
7
8 ; CHECK-LABEL: define i32 @main
9 ; CHECK: %tobool = icmp eq i32 %argc, 0
10 ; CHECK-NEXT: bitcast i64 9209618997431186100 to i64
11 ; CHECK-NEXT: br i1 %tobool
12
13 ; Function Attrs: norecurse
14 define i32 @main(i32 %argc, i8** nocapture readnone %argv) local_unnamed_addr #0 personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) {
15 %call = tail call i64 @fn(i64 0)
16 %call1 = tail call i64 @fn(i64 1)
17 %tobool = icmp eq i32 %argc, 0
18 br i1 %tobool, label %2, label %1
19
20 ;
21 %call2 = invoke i64 @fn(i64 %call)
22 to label %6 unwind label %catch.dispatch
23
24 ;
25 %call3 = invoke i64 @fn(i64 %call1)
26 to label %6 unwind label %catch.dispatch
27
28 catch.dispatch: ; preds = %2, %1
29 %z.0 = phi i64 [ %call, %1 ], [ %call1, %2 ]
30 %3 = catchswitch within none [label %4] unwind to caller
31
32 ;
33 %5 = catchpad within %3 [i8* null, i32 64, i8* null]
34 br i1 %tobool, label %then, label %else
35
36 then:
37 %call4 = tail call i64 @fn(i64 %z.0) [ "funclet"(token %5) ]
38 %add = add i64 %call4, 9209618997431186100
39 br label %endif
40
41 else:
42 %call5 = tail call i64 @fn(i64 0) [ "funclet"(token %5) ]
43 %add6 = add i64 %call5, 9209618997431186100
44 br label %endif
45
46 endif:
47 %v = phi i64 [ %add, %then ], [ %add6, %else ]
48 %call7 = tail call i64 @fn(i64 %v) [ "funclet"(token %5) ]
49 %call8 = tail call i64 @fn(i64 %call7) [ "funclet"(token %5) ]
50 catchret from %5 to label %6
51
52 ;
53 ret i32 0
54 }
55
56 declare i64 @fn(i64) local_unnamed_addr #1
57
58 declare i32 @__CxxFrameHandler3(...)
59
60 attributes #0 = { norecurse "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
61 attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }