llvm.org GIT mirror llvm / 3b148e5
This patch addresses PR15351 by explicitly checking for AVX support when getting the host processor information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178598 91177308-0d34-0410-b5e6-96231b3b80d8 Aaron Ballman 7 years ago
1 changed file(s) with 22 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
111111 #endif
112112 }
113113
114 static bool OSHasAVXSupport() {
115 #if defined(__GNUC__)
116 int rEAX, rEDX;
117 __asm__ ("xgetbv" : "=a" (rEAX), "=d" (rEDX) : "c" (0));
118 #elif defined(_MSC_VER)
119 unsigned long long rEAX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
120 #else
121 int rEAX = 0; // Ensures we return false
122 #endif
123 return (rEAX & 6) == 6;
124 }
125
114126 static void DetectX86FamilyModel(unsigned EAX, unsigned &Family,
115127 unsigned &Model) {
116128 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
133145 DetectX86FamilyModel(EAX, Family, Model);
134146
135147 bool HasSSE3 = (ECX & 0x1);
148 // If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV
149 // indicates that the AVX registers will be saved and restored on context
150 // switch, when we have full AVX support.
151 bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 && OSHasAVXSupport();
136152 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
137153 bool Em64T = (EDX >> 29) & 0x1;
138154
242258 case 42: // Intel Core i7 processor. All processors are manufactured
243259 // using the 32 nm process.
244260 case 45:
245 return "corei7-avx";
261 // Not all Sandy Bridge processors support AVX (such as the Pentium
262 // versions instead of the i7 versions).
263 return HasAVX ? "corei7-avx" : "corei7";
246264
247265 // Ivy Bridge:
248266 case 58:
249 return "core-avx-i";
267 // Not all Ivy Bridge processors support AVX (such as the Pentium
268 // versions instead of the i7 versions).
269 return HasAVX ? "core-avx-i" : "corei7";
250270
251271 case 28: // Most 45 nm Intel Atom processors
252272 case 38: // 45 nm Atom Lincroft