llvm.org GIT mirror llvm / 3b13e88
Revert r352255 "[SelectionDAG][X86] Don't use SEXTLOAD for promoting masked loads in the type legalizer" This might be breaking an lldb windows buildbot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352268 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 1 year, 4 months ago
3 changed file(s) with 8 addition(s) and 20 deletion(s). Raw diff Collapse all Expand all
553553 SDLoc dl(N);
554554 SDValue Res = DAG.getMaskedLoad(NVT, dl, N->getChain(), N->getBasePtr(),
555555 N->getMask(), ExtPassThru, N->getMemoryVT(),
556 N->getMemOperand(), ISD::EXTLOAD);
556 N->getMemOperand(), ISD::SEXTLOAD);
557557 // Legalize the chain result - switch anything that used the old chain to
558558 // use the new one.
559559 ReplaceValueWith(SDValue(N, 1), Res.getValue(1));
3761737617 return Blend;
3761837618 }
3761937619
37620 if (Mld->getExtensionType() != ISD::EXTLOAD)
37620 if (Mld->getExtensionType() != ISD::SEXTLOAD)
3762137621 return SDValue();
3762237622
3762337623 // Resolve extending loads.
3768737687 Mld->getBasePtr(), NewMask, WidePassThru,
3768837688 Mld->getMemoryVT(), Mld->getMemOperand(),
3768937689 ISD::NON_EXTLOAD);
37690
37691 SDValue SlicedVec = DAG.getBitcast(WideVecVT, WideLd);
37692 SmallVector ShuffleVec(NumElems * SizeRatio, -1);
37693 for (unsigned i = 0; i != NumElems; ++i)
37694 ShuffleVec[i * SizeRatio] = i;
37695
37696 // Can't shuffle using an illegal type.
37697 assert(DAG.getTargetLoweringInfo().isTypeLegal(WideVecVT) &&
37698 "WideVecVT should be legal");
37699 SlicedVec = DAG.getVectorShuffle(WideVecVT, dl, SlicedVec,
37700 DAG.getUNDEF(WideVecVT), ShuffleVec);
37701 SlicedVec = DAG.getBitcast(VT, SlicedVec);
37702
37703 return DCI.CombineTo(N, SlicedVec, WideLd.getValue(1), true);
37690 SDValue NewVec = getExtendInVec(/*Signed*/true, dl, VT, WideLd, DAG);
37691 return DCI.CombineTo(N, NewVec, WideLd.getValue(1), true);
3770437692 }
3770537693
3770637694 /// If exactly one element of the mask is set for a non-truncating masked store,
13871387 ; AVX1-NEXT: vmaskmovps (%rdi), %xmm0, %xmm2
13881388 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,2,2,3]
13891389 ; AVX1-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm0
1390 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1390 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
13911391 ; AVX1-NEXT: retq
13921392 ;
13931393 ; AVX2-LABEL: load_v2i32_v2i32:
13991399 ; AVX2-NEXT: vpmaskmovd (%rdi), %xmm0, %xmm2
14001400 ; AVX2-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,2,2,3]
14011401 ; AVX2-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm0
1402 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1402 ; AVX2-NEXT: vpmovsxdq %xmm0, %xmm0
14031403 ; AVX2-NEXT: retq
14041404 ;
14051405 ; AVX512F-LABEL: load_v2i32_v2i32:
14111411 ; AVX512F-NEXT: kshiftlw $14, %k0, %k0
14121412 ; AVX512F-NEXT: kshiftrw $14, %k0, %k1
14131413 ; AVX512F-NEXT: vmovdqu32 (%rdi), %zmm0 {%k1}
1414 ; AVX512F-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1414 ; AVX512F-NEXT: vpmovsxdq %xmm0, %xmm0
14151415 ; AVX512F-NEXT: vzeroupper
14161416 ; AVX512F-NEXT: retq
14171417 ;
14221422 ; AVX512VLBW-NEXT: vptestnmq %xmm0, %xmm0, %k1
14231423 ; AVX512VLBW-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
14241424 ; AVX512VLBW-NEXT: vmovdqu32 (%rdi), %xmm0 {%k1}
1425 ; AVX512VLBW-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1425 ; AVX512VLBW-NEXT: vpmovsxdq %xmm0, %xmm0
14261426 ; AVX512VLBW-NEXT: retq
14271427 %mask = icmp eq <2 x i32> %trigger, zeroinitializer
14281428 %res = call <2 x i32> @llvm.masked.load.v2i32.p0v2i32(<2 x i32>* %addr, i32 4, <2 x i1>%mask, <2 x i32>%dst)