llvm.org GIT mirror llvm / 3b094f2
[X86] Add POPCNT scheduling tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308137 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 3 years ago
1 changed file(s) with 145 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mattr=+popcnt | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=slm | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=goldmont | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=sandybridge | FileCheck %s --check-prefix=CHECK --check-prefix=SANDY
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge | FileCheck %s --check-prefix=CHECK --check-prefix=SANDY
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
11
12 define i16 @test_ctpop_i16(i16 zeroext %a0, i16 *%a1) {
13 ; GENERIC-LABEL: test_ctpop_i16:
14 ; GENERIC: # BB#0:
15 ; GENERIC-NEXT: popcntw (%rsi), %cx
16 ; GENERIC-NEXT: popcntw %di, %ax
17 ; GENERIC-NEXT: orl %ecx, %eax
18 ; GENERIC-NEXT: # kill: %AX %AX %EAX
19 ; GENERIC-NEXT: retq
20 ;
21 ; SLM-LABEL: test_ctpop_i16:
22 ; SLM: # BB#0:
23 ; SLM-NEXT: popcntw (%rsi), %cx # sched: [6:1.00]
24 ; SLM-NEXT: popcntw %di, %ax # sched: [3:1.00]
25 ; SLM-NEXT: orl %ecx, %eax # sched: [1:0.50]
26 ; SLM-NEXT: # kill: %AX %AX %EAX
27 ; SLM-NEXT: retq # sched: [4:1.00]
28 ;
29 ; SANDY-LABEL: test_ctpop_i16:
30 ; SANDY: # BB#0:
31 ; SANDY-NEXT: popcntw (%rsi), %cx # sched: [7:1.00]
32 ; SANDY-NEXT: popcntw %di, %ax # sched: [3:1.00]
33 ; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
34 ; SANDY-NEXT: # kill: %AX %AX %EAX
35 ; SANDY-NEXT: retq # sched: [1:1.00]
36 ;
37 ; HASWELL-LABEL: test_ctpop_i16:
38 ; HASWELL: # BB#0:
39 ; HASWELL-NEXT: popcntw (%rsi), %cx # sched: [7:1.00]
40 ; HASWELL-NEXT: popcntw %di, %ax # sched: [3:1.00]
41 ; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
42 ; HASWELL-NEXT: # kill: %AX %AX %EAX
43 ; HASWELL-NEXT: retq # sched: [1:1.00]
44 ;
45 ; BTVER2-LABEL: test_ctpop_i16:
46 ; BTVER2: # BB#0:
47 ; BTVER2-NEXT: popcntw (%rsi), %cx # sched: [8:1.00]
48 ; BTVER2-NEXT: popcntw %di, %ax # sched: [3:1.00]
49 ; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
50 ; BTVER2-NEXT: # kill: %AX %AX %EAX
51 ; BTVER2-NEXT: retq # sched: [4:1.00]
52 %1 = load i16, i16 *%a1
53 %2 = tail call i16 @llvm.ctpop.i16( i16 %1 )
54 %3 = tail call i16 @llvm.ctpop.i16( i16 %a0 )
55 %4 = or i16 %2, %3
56 ret i16 %4
57 }
58 declare i16 @llvm.ctpop.i16(i16)
59
60 define i32 @test_ctpop_i32(i32 %a0, i32 *%a1) {
61 ; GENERIC-LABEL: test_ctpop_i32:
62 ; GENERIC: # BB#0:
63 ; GENERIC-NEXT: popcntl (%rsi), %ecx
64 ; GENERIC-NEXT: popcntl %edi, %eax
65 ; GENERIC-NEXT: orl %ecx, %eax
66 ; GENERIC-NEXT: retq
67 ;
68 ; SLM-LABEL: test_ctpop_i32:
69 ; SLM: # BB#0:
70 ; SLM-NEXT: popcntl (%rsi), %ecx # sched: [6:1.00]
71 ; SLM-NEXT: popcntl %edi, %eax # sched: [3:1.00]
72 ; SLM-NEXT: orl %ecx, %eax # sched: [1:0.50]
73 ; SLM-NEXT: retq # sched: [4:1.00]
74 ;
75 ; SANDY-LABEL: test_ctpop_i32:
76 ; SANDY: # BB#0:
77 ; SANDY-NEXT: popcntl (%rsi), %ecx # sched: [7:1.00]
78 ; SANDY-NEXT: popcntl %edi, %eax # sched: [3:1.00]
79 ; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
80 ; SANDY-NEXT: retq # sched: [1:1.00]
81 ;
82 ; HASWELL-LABEL: test_ctpop_i32:
83 ; HASWELL: # BB#0:
84 ; HASWELL-NEXT: popcntl (%rsi), %ecx # sched: [7:1.00]
85 ; HASWELL-NEXT: popcntl %edi, %eax # sched: [3:1.00]
86 ; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
87 ; HASWELL-NEXT: retq # sched: [1:1.00]
88 ;
89 ; BTVER2-LABEL: test_ctpop_i32:
90 ; BTVER2: # BB#0:
91 ; BTVER2-NEXT: popcntl (%rsi), %ecx # sched: [8:1.00]
92 ; BTVER2-NEXT: popcntl %edi, %eax # sched: [3:1.00]
93 ; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
94 ; BTVER2-NEXT: retq # sched: [4:1.00]
95 %1 = load i32, i32 *%a1
96 %2 = tail call i32 @llvm.ctpop.i32( i32 %1 )
97 %3 = tail call i32 @llvm.ctpop.i32( i32 %a0 )
98 %4 = or i32 %2, %3
99 ret i32 %4
100 }
101 declare i32 @llvm.ctpop.i32(i32)
102
103 define i64 @test_ctpop_i64(i64 %a0, i64 *%a1) {
104 ; GENERIC-LABEL: test_ctpop_i64:
105 ; GENERIC: # BB#0:
106 ; GENERIC-NEXT: popcntq (%rsi), %rcx
107 ; GENERIC-NEXT: popcntq %rdi, %rax
108 ; GENERIC-NEXT: orq %rcx, %rax
109 ; GENERIC-NEXT: retq
110 ;
111 ; SLM-LABEL: test_ctpop_i64:
112 ; SLM: # BB#0:
113 ; SLM-NEXT: popcntq (%rsi), %rcx # sched: [6:1.00]
114 ; SLM-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
115 ; SLM-NEXT: orq %rcx, %rax # sched: [1:0.50]
116 ; SLM-NEXT: retq # sched: [4:1.00]
117 ;
118 ; SANDY-LABEL: test_ctpop_i64:
119 ; SANDY: # BB#0:
120 ; SANDY-NEXT: popcntq (%rsi), %rcx # sched: [9:1.00]
121 ; SANDY-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
122 ; SANDY-NEXT: orq %rcx, %rax # sched: [1:0.33]
123 ; SANDY-NEXT: retq # sched: [1:1.00]
124 ;
125 ; HASWELL-LABEL: test_ctpop_i64:
126 ; HASWELL: # BB#0:
127 ; HASWELL-NEXT: popcntq (%rsi), %rcx # sched: [7:1.00]
128 ; HASWELL-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
129 ; HASWELL-NEXT: orq %rcx, %rax # sched: [1:0.25]
130 ; HASWELL-NEXT: retq # sched: [1:1.00]
131 ;
132 ; BTVER2-LABEL: test_ctpop_i64:
133 ; BTVER2: # BB#0:
134 ; BTVER2-NEXT: popcntq (%rsi), %rcx # sched: [8:1.00]
135 ; BTVER2-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
136 ; BTVER2-NEXT: orq %rcx, %rax # sched: [1:0.50]
137 ; BTVER2-NEXT: retq # sched: [4:1.00]
138 %1 = load i64, i64 *%a1
139 %2 = tail call i64 @llvm.ctpop.i64( i64 %1 )
140 %3 = tail call i64 @llvm.ctpop.i64( i64 %a0 )
141 %4 = or i64 %2, %3
142 ret i64 %4
143 }
144 declare i64 @llvm.ctpop.i64(i64)