llvm.org GIT mirror llvm / 3aef2ff
Handle llvm.fma.* intrinsics. rdar://10914096 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154439 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 8 years ago
4 changed file(s) with 50 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
768768 setOperationAction(ISD::FPOW, MVT::f64, Expand);
769769 setOperationAction(ISD::FPOW, MVT::f32, Expand);
770770
771 setOperationAction(ISD::FMA, MVT::f64, Expand);
772 setOperationAction(ISD::FMA, MVT::f32, Expand);
771 if (!Subtarget->hasVFP4()) {
772 setOperationAction(ISD::FMA, MVT::f64, Expand);
773 setOperationAction(ISD::FMA, MVT::f32, Expand);
774 }
773775
774776 // Various VFP goodness
775777 if (!TM.Options.UseSoftFloat && !Subtarget->isThumb1Only()) {
41324132 v4f32, fmul_su, fsub_mlx>,
41334133 Requires<[HasNEON2,FPContractions]>;
41344134
4135 // Match @llvm.fma.* intrinsics
4136 def : Pat<(fma (v2f32 DPR:$src1), (v2f32 DPR:$Vn), (v2f32 DPR:$Vm)),
4137 (VFMAfd DPR:$src1, DPR:$Vn, DPR:$Vm)>,
4138 Requires<[HasNEON, HasVFP4]>;
4139 def : Pat<(fma (v4f32 QPR:$src1), (v4f32 QPR:$Vn), (v4f32 QPR:$Vm)),
4140 (VFMAfq QPR:$src1, QPR:$Vn, QPR:$Vm)>,
4141 Requires<[HasNEON, HasVFP4]>;
4142
41354143 // Vector Subtract Operations.
41364144
41374145 // VSUB : Vector Subtract (integer and floating-point)
10781078 def : Pat<(fadd_mlx SPR:$dstin, (fmul_su SPR:$a, SPR:$b)),
10791079 (VFMAS SPR:$dstin, SPR:$a, SPR:$b)>,
10801080 Requires<[HasVFP4,DontUseNEONForFP,FPContractions]>;
1081
1082 // Match @llvm.fma.* intrinsics
1083 def : Pat<(fma (f64 DPR:$Ddin), (f64 DPR:$Dn), (f64 DPR:$Dm)),
1084 (VFMAD DPR:$Ddin, DPR:$Dn, DPR:$Dm)>,
1085 Requires<[HasVFP4]>;
1086 def : Pat<(fma (f32 SPR:$Sdin), (f32 SPR:$Sn), (f32 SPR:$Sm)),
1087 (VFMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
1088 Requires<[HasVFP4]>;
10811089
10821090 def VFMSD : ADbI<0b11101, 0b10, 1, 0,
10831091 (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
0 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mattr=+vfp4 | FileCheck %s
1
2 define float @test_f32(float %a, float %b, float %c) nounwind readnone ssp {
3 entry:
4 ; CHECK: test_f32
5 ; CHECK: vfma.f32
6 %call = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
7 ret float %call
8 }
9
10 define double @test_f64(double %a, double %b, double %c) nounwind readnone ssp {
11 entry:
12 ; CHECK: test_f64
13 ; CHECK: vfma.f64
14 %call = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone
15 ret double %call
16 }
17
18 define <2 x float> @test_v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind readnone ssp {
19 entry:
20 ; CHECK: test_v2f32
21 ; CHECK: vfma.f32
22 %0 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind
23 ret <2 x float> %0
24 }
25
26 declare float @llvm.fma.f32(float, float, float) nounwind readnone
27 declare double @llvm.fma.f64(double, double, double) nounwind readnone
28
29 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone