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SLPVectorizer: When sorting by domination for CSE don't assert on unreachable code. There is no total ordering if the CFG is disconnected. We don't care if we catch all CSE opportunities in dead code either so just exclude ignore them in the assert. PR19646 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208461 91177308-0d34-0410-b5e6-96231b3b80d8 Benjamin Kramer 5 years ago
2 changed file(s) with 32 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
18261826 for (SmallVectorImpl::iterator I = CSEWorkList.begin(),
18271827 E = CSEWorkList.end();
18281828 I != E; ++I) {
1829 assert((I == CSEWorkList.begin() || !DT->dominates(*I, *std::prev(I))) &&
1829 assert((I == CSEWorkList.begin() || !DT->isReachableFromEntry(*I) ||
1830 !DT->dominates(*I, *std::prev(I))) &&
18301831 "Worklist not sorted properly!");
18311832 BasicBlock *BB = *I;
18321833 // For all instructions in blocks containing gather sequences:
216216 ret i32 0
217217 }
218218
219 %class.B.53.55 = type { %class.A.52.54, double }
220 %class.A.52.54 = type { double, double, double }
221
222 @a = external global double, align 8
223
224 define void @PR19646(%class.B.53.55* %this) {
225 entry:
226 br i1 undef, label %if.end13, label %if.end13
227
228 sw.epilog7: ; No predecessors!
229 %.in = getelementptr inbounds %class.B.53.55* %this, i64 0, i32 0, i32 1
230 %0 = load double* %.in, align 8
231 %add = fadd double undef, 0.000000e+00
232 %add6 = fadd double %add, %0
233 %1 = load double* @a, align 8
234 %add8 = fadd double %1, 0.000000e+00
235 %_dy = getelementptr inbounds %class.B.53.55* %this, i64 0, i32 0, i32 2
236 %2 = load double* %_dy, align 8
237 %add10 = fadd double %add8, %2
238 br i1 undef, label %if.then12, label %if.end13
239
240 if.then12: ; preds = %sw.epilog7
241 %3 = load double* undef, align 8
242 br label %if.end13
243
244 if.end13: ; preds = %if.then12, %sw.epilog7, %entry
245 %x.1 = phi double [ 0.000000e+00, %if.then12 ], [ %add6, %sw.epilog7 ], [ undef, %entry ], [ undef, %entry ]
246 %b.0 = phi double [ %3, %if.then12 ], [ %add10, %sw.epilog7 ], [ undef, %entry], [ undef, %entry ]
247 unreachable
248 }