llvm.org GIT mirror llvm / 3ab32ea
When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154764 91177308-0d34-0410-b5e6-96231b3b80d8 Nadav Rotem 7 years ago
2 changed file(s) with 10 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
416416
417417 Op1 = DAG.getNode(ISD::AND, DL, VT, Op1, Mask);
418418 Op2 = DAG.getNode(ISD::AND, DL, VT, Op2, NotMask);
419 return DAG.getNode(ISD::OR, DL, VT, Op1, Op2);
419 SDValue Val = DAG.getNode(ISD::OR, DL, VT, Op1, Op2);
420 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val);
420421 }
421422
422423 SDValue VectorLegalizer::ExpandUINT_TO_FLOAT(SDValue Op) {
7979 ret <2 x double> %min
8080 }
8181
82 ; CHECK: float_crash
83 define void @float_crash() nounwind {
84 entry:
85 %merge205vector_func.i = select <4 x i1> undef, <4 x double> undef, <4 x double> undef
86 %extract214vector_func.i = extractelement <4 x double> %merge205vector_func.i, i32 0
87 store double %extract214vector_func.i, double addrspace(1)* undef, align 8
88 ret void
89 }