llvm.org GIT mirror llvm / 3a86e13
[ms-inline asm] Expose the Kind and Opcode variables from the MatchInstructionImpl() function. These values are used by the ConvertToMCInst() function to index into the ConversionTable. The values are also needed to call the GetMCInstOperandNum() function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163101 91177308-0d34-0410-b5e6-96231b3b80d8 Chad Rosier 7 years ago
5 changed file(s) with 35 addition(s) and 18 deletion(s). Raw diff Collapse all Expand all
8484 /// On failure, the target parser is responsible for emitting a diagnostic
8585 /// explaining the match failure.
8686 virtual bool
87 MatchInstruction(SMLoc IDLoc,
87 MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
8888 SmallVectorImpl &Operands,
8989 SmallVectorImpl &MCInsts,
9090 unsigned &OrigErrorInfo,
74557455 SmallVectorImpl &Operands,
74567456 MCStreamer &Out) {
74577457 MCInst Inst;
7458 unsigned Kind;
7459 unsigned Opcode;
74587460 unsigned ErrorInfo;
74597461 unsigned MatchResult;
7460 MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo);
7462
7463 MatchResult = MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo);
74617464 switch (MatchResult) {
74627465 default: break;
74637466 case Match_Success:
316316 SmallVectorImpl &Operands,
317317 MCStreamer &Out) {
318318 MCInst Inst;
319 unsigned Kind;
320 unsigned Opcode;
319321 unsigned ErrorInfo;
320322
321 switch (MatchInstructionImpl(Operands, Inst, ErrorInfo)) {
323 switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo)) {
322324 default: break;
323325 case Match_Success:
324326 Out.EmitInstruction(Inst);
6666 SmallVectorImpl &Operands,
6767 MCStreamer &Out);
6868
69 bool MatchInstruction(SMLoc IDLoc,
69 bool MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
7070 SmallVectorImpl &Operands,
7171 SmallVectorImpl &MCInsts,
7272 unsigned &OrigErrorInfo,
15151515 MatchAndEmitInstruction(SMLoc IDLoc,
15161516 SmallVectorImpl &Operands,
15171517 MCStreamer &Out) {
1518 unsigned Kind;
1519 unsigned Opcode;
1520 unsigned ErrorInfo;
15181521 SmallVector Insts;
1519 unsigned ErrorInfo;
1520 bool Error = MatchInstruction(IDLoc, Operands, Insts, ErrorInfo);
1522
1523 bool Error = MatchInstruction(IDLoc, Kind, Opcode, Operands, Insts,
1524 ErrorInfo);
15211525 if (!Error)
15221526 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
15231527 Out.EmitInstruction(Insts[i]);
15251529 }
15261530
15271531 bool X86AsmParser::
1528 MatchInstruction(SMLoc IDLoc,
1532 MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
15291533 SmallVectorImpl &Operands,
15301534 SmallVectorImpl &MCInsts, unsigned &OrigErrorInfo,
15311535 bool matchingInlineAsm) {
15671571 MCInst Inst;
15681572
15691573 // First, try a direct match.
1570 switch (MatchInstructionImpl(Operands, Inst, OrigErrorInfo,
1574 switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, OrigErrorInfo,
15711575 isParsingIntelSyntax())) {
15721576 default: break;
15731577 case Match_Success:
16151619 Tmp[Base.size()] = Suffixes[0];
16161620 unsigned ErrorInfoIgnore;
16171621 unsigned Match1, Match2, Match3, Match4;
1618
1619 Match1 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
1622 unsigned tKind, tOpcode;
1623
1624 Match1 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
1625 if (Match1 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
16201626 Tmp[Base.size()] = Suffixes[1];
1621 Match2 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
1627 Match2 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
1628 if (Match2 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
16221629 Tmp[Base.size()] = Suffixes[2];
1623 Match3 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
1630 Match3 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
1631 if (Match3 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
16241632 Tmp[Base.size()] = Suffixes[3];
1625 Match4 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
1633 Match4 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
1634 if (Match4 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
16261635
16271636 // Restore the old token.
16281637 Op->setTokenValue(Base);
25842584 << "&Operands,\n unsigned OperandNum, unsigned "
25852585 << "&MCOperandNum);\n";
25862586 OS << " bool MnemonicIsValid(StringRef Mnemonic);\n";
2587 OS << " unsigned MatchInstructionImpl(\n";
2588 OS << " const SmallVectorImpl &Operands,\n";
2589 OS << " MCInst &Inst, unsigned &ErrorInfo, unsigned VariantID = 0);\n";
2587 OS << " unsigned MatchInstructionImpl(\n"
2588 << " const SmallVectorImpl &Operands,\n"
2589 << " unsigned &Kind, unsigned &Opcode, MCInst &Inst, "
2590 << "unsigned &ErrorInfo,\n unsigned VariantID = 0);\n";
25902591
25912592 if (Info.OperandMatchInfo.size()) {
25922593 OS << "\n enum OperandMatchResultTy {\n";
27662767 << Target.getName() << ClassName << "::\n"
27672768 << "MatchInstructionImpl(const SmallVectorImpl"
27682769 << " &Operands,\n";
2769 OS << " MCInst &Inst, unsigned &ErrorInfo, ";
2770 OS << "unsigned VariantID) {\n";
2770 OS << " unsigned &Kind, unsigned &Opcode, MCInst &Inst,";
2771 OS << "\n unsigned &ErrorInfo, unsigned VariantID) {\n";
27712772
27722773 OS << " // Eliminate obvious mismatches.\n";
27732774 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
28842885 if (!InsnCleanupFn.empty())
28852886 OS << " " << InsnCleanupFn << "(Inst);\n";
28862887
2888 OS << " Kind = it->ConvertFn;\n";
2889 OS << " Opcode = it->Opcode;\n";
28872890 OS << " return Match_Success;\n";
28882891 OS << " }\n\n";
28892892