llvm.org GIT mirror llvm / 3844109
--- Merging r127731 into '.': U test/CodeGen/X86/byval2.ll U test/CodeGen/X86/byval4.ll U test/CodeGen/X86/byval.ll U test/CodeGen/X86/byval3.ll U test/CodeGen/X86/byval5.ll --- Merging r127732 into '.': U test/CodeGen/X86/stdarg.ll U test/CodeGen/X86/fold-mul-lohi.ll U test/CodeGen/X86/scalar-min-max-fill-operand.ll U test/CodeGen/X86/tailcallbyval64.ll U test/CodeGen/X86/stride-reuse.ll U test/CodeGen/X86/sse-align-3.ll U test/CodeGen/X86/sse-commute.ll U test/CodeGen/X86/stride-nine-with-base-reg.ll U test/CodeGen/X86/coalescer-commute2.ll U test/CodeGen/X86/sse-align-7.ll U test/CodeGen/X86/sse_reload_fold.ll U test/CodeGen/X86/sse-align-0.ll --- Merging r127733 into '.': U test/CodeGen/X86/peep-vector-extract-concat.ll U test/CodeGen/X86/pmulld.ll U test/CodeGen/X86/widen_load-0.ll U test/CodeGen/X86/v2f32.ll U test/CodeGen/X86/apm.ll U test/CodeGen/X86/h-register-store.ll U test/CodeGen/X86/h-registers-0.ll --- Merging r127734 into '.': U test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll U test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll U test/CodeGen/X86/avoid-lea-scale2.ll U test/CodeGen/X86/lea-3.ll U test/CodeGen/X86/vec_set-8.ll U test/CodeGen/X86/i64-mem-copy.ll U test/CodeGen/X86/x86-64-malloc.ll U test/CodeGen/X86/mmx-copy-gprs.ll U test/CodeGen/X86/vec_shuffle-17.ll U test/CodeGen/X86/2007-07-18-Vector-Extract.ll --- Merging r127775 into '.': U test/CodeGen/X86/constant-pool-remat-0.ll --- Merging r127872 into '.': U utils/lit/lit/TestingConfig.py U lib/Support/raw_ostream.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@128258 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Wendling 8 years ago
37 changed file(s) with 401 addition(s) and 84 deletion(s). Raw diff Collapse all Expand all
219219 }
220220
221221 raw_ostream &raw_ostream::operator<<(double N) {
222 #ifdef _WIN32
223 // On MSVCRT and compatible, output of %e is incompatible to Posix
224 // by default. Number of exponent digits should be at least 2. "%+03d"
225 // FIXME: Implement our formatter to here or Support/Format.h!
226 int fpcl = _fpclass(N);
227
228 // negative zero
229 if (fpcl == _FPCLASS_NZ)
230 return *this << "-0.000000e+00";
231
232 char buf[16];
233 unsigned len;
234 len = snprintf(buf, sizeof(buf), "%e", N);
235 if (len <= sizeof(buf) - 2) {
236 if (len >= 5 && buf[len - 5] == 'e' && buf[len - 3] == '0') {
237 int cs = buf[len - 4];
238 if (cs == '+' || cs == '-') {
239 int c1 = buf[len - 2];
240 int c0 = buf[len - 1];
241 if (isdigit(c1) && isdigit(c0)) {
242 // Trim leading '0': "...e+012" -> "...e+12\0"
243 buf[len - 3] = c1;
244 buf[len - 2] = c0;
245 buf[--len] = 0;
246 }
247 }
248 }
249 return this->operator<<(buf);
250 }
251 #endif
222252 return this->operator<<(format("%e", N));
223253 }
224254
None ; RUN: llc %s -o - -march=x86-64 | grep {(%rdi,%rax,8)}
1 ; RUN: llc %s -o - -march=x86-64 | not grep {addq.*8}
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
2 ; CHECK-NOT: {{addq.*8}}
3 ; CHECK: ({{%rdi|%rcx}},%rax,8)
4 ; CHECK-NOT: {{addq.*8}}
25
36 define void @foo(double* %y) nounwind {
47 entry:
None ; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax}
1 ; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax}
0 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck %s
2 ; CHECK: movq ([[A0:%rdi|%rcx]]), %rax
3 ; CHECK: movq 8([[A0]]), %rax
24 define i64 @foo_0(<2 x i64>* %val) {
35 entry:
46 %val12 = getelementptr <2 x i64>* %val, i32 0, i32 0 ; [#uses=1]
None ; RUN: llc < %s -o - -march=x86-64 | FileCheck %s
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
12 ; PR8573
23
34 ; CHECK: foo:
45 ; CHECK: leaq (%rdi), %rax
56 ; CHECK-NEXT: movl %esi, %ecx
67 ; CHECK-NEXT: monitor
8 ; WIN64: foo:
9 ; WIN64: leaq (%rcx), %rax
10 ; WIN64-NEXT: movl %edx, %ecx
11 ; WIN64-NEXT: movl %r8d, %edx
12 ; WIN64-NEXT: monitor
713 define void @foo(i8* %P, i32 %E, i32 %H) nounwind {
814 entry:
915 tail call void @llvm.x86.sse3.monitor(i8* %P, i32 %E, i32 %H)
1622 ; CHECK: movl %edi, %ecx
1723 ; CHECK-NEXT: movl %esi, %eax
1824 ; CHECK-NEXT: mwait
25 ; WIN64: bar:
26 ; WIN64: movl %edx, %eax
27 ; WIN64-NEXT: mwait
1928 define void @bar(i32 %E, i32 %H) nounwind {
2029 entry:
2130 tail call void @llvm.x86.sse3.mwait(i32 %E, i32 %H)
None ; RUN: llc < %s -march=x86-64 | grep {leal.*-2(\[%\]rdi,\[%\]rdi)}
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
2 ; CHECK: leal -2({{%rdi,%rdi|%rcx,%rcx}})
13
24 define i32 @foo(i32 %x) nounwind readnone {
35 %t0 = shl i32 %x, 1
None ; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix=X86-64 %s
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X86-64 %s
1 ; Win64 has not supported byval yet.
12 ; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s
23
34 ; X86: movl 4(%esp), %eax
None ; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
1 ; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
1 ; X64-NOT: movsq
2 ; X64: rep
3 ; X64-NOT: rep
4 ; X64: movsq
5 ; X64-NOT: movsq
6 ; X64: rep
7 ; X64-NOT: rep
8 ; X64: movsq
9 ; X64-NOT: rep
10 ; X64-NOT: movsq
11
12 ; Win64 has not supported byval yet.
13
14 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
15 ; X32-NOT: movsl
16 ; X32: rep
17 ; X32-NOT: rep
18 ; X32: movsl
19 ; X32-NOT: movsl
20 ; X32: rep
21 ; X32-NOT: rep
22 ; X32: movsl
23 ; X32-NOT: rep
24 ; X32-NOT: movsl
225
326 %struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
427 i64, i64, i64, i64, i64, i64, i64, i64,
None ; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
1 ; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
1 ; X64-NOT: movsq
2 ; X64: rep
3 ; X64-NOT: rep
4 ; X64: movsq
5 ; X64-NOT: movsq
6 ; X64: rep
7 ; X64-NOT: rep
8 ; X64: movsq
9 ; X64-NOT: rep
10 ; X64-NOT: movsq
11
12 ; Win64 has not supported byval yet.
13
14 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
15 ; X32-NOT: movsl
16 ; X32: rep
17 ; X32-NOT: rep
18 ; X32: movsl
19 ; X32-NOT: movsl
20 ; X32: rep
21 ; X32-NOT: rep
22 ; X32: movsl
23 ; X32-NOT: rep
24 ; X32-NOT: movsl
225
326 %struct.s = type { i32, i32, i32, i32, i32, i32, i32, i32,
427 i32, i32, i32, i32, i32, i32, i32, i32,
None ; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
1 ; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
1 ; X64-NOT: movsq
2 ; X64: rep
3 ; X64-NOT: rep
4 ; X64: movsq
5 ; X64-NOT: movsq
6 ; X64: rep
7 ; X64-NOT: rep
8 ; X64: movsq
9 ; X64-NOT: rep
10 ; X64-NOT: movsq
11
12 ; Win64 has not supported byval yet.
13
14 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
15 ; X32-NOT: movsl
16 ; X32: rep
17 ; X32-NOT: rep
18 ; X32: movsl
19 ; X32-NOT: movsl
20 ; X32: rep
21 ; X32-NOT: rep
22 ; X32: movsl
23 ; X32-NOT: rep
24 ; X32-NOT: movsl
225
326 %struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
427 i16, i16, i16, i16, i16, i16, i16, i16,
None ; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
1 ; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
1 ; X64-NOT: movsq
2 ; X64: rep
3 ; X64-NOT: rep
4 ; X64: movsq
5 ; X64-NOT: movsq
6 ; X64: rep
7 ; X64-NOT: rep
8 ; X64: movsq
9 ; X64-NOT: rep
10 ; X64-NOT: movsq
11
12 ; Win64 has not supported byval yet.
13
14 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
15 ; X32-NOT: movsl
16 ; X32: rep
17 ; X32-NOT: rep
18 ; X32: movsl
19 ; X32-NOT: movsl
20 ; X32: rep
21 ; X32-NOT: rep
22 ; X32: movsl
23 ; X32-NOT: rep
24 ; X32-NOT: movsl
225
326 %struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
427 i8, i8, i8, i8, i8, i8, i8, i8,
None ; RUN: llc < %s -march=x86-64 | grep paddw | count 2
1 ; RUN: llc < %s -march=x86-64 | not grep mov
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; CHECK-NOT: mov
2 ; CHECK: paddw
3 ; CHECK-NOT: mov
4 ; CHECK: paddw
5 ; CHECK-NOT: paddw
6 ; CHECK-NOT: mov
27
38 ; The 2-addr pass should ensure that identical code is produced for these functions
49 ; no extra copy should be generated.
None ; RUN: llc < %s -march=x86-64 | grep LCPI | count 3
1 ; RUN: llc < %s -march=x86-64 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 6
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep LCPI | count 3
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
2 ; CHECK: LCPI
3 ; CHECK: LCPI
4 ; CHECK: LCPI
5 ; CHECK-NOT: LCPI
6
7 ; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X64stat
8 ; X64stat: 6 asm-printer
9
10 ; RUN: llc < %s -march=x86 -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
11 ; X32stat: 12 asm-printer
412
513 declare float @qux(float %y)
614
None ; RUN: llc < %s -march=x86-64 -o %t -stats -info-output-file - | \
1 ; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 9
2 ; RUN: grep {leal 1(\%rsi),} %t
0 ; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats |& FileCheck %s -check-prefix=STATS
1 ; RUN: llc < %s -mtriple=x86_64-win32 -o /dev/null -stats |& FileCheck %s -check-prefix=STATS
2 ; STATS: 9 asm-printer
3
4 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
5 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
6 ; CHECK: leal 1({{%rsi|%rdx}}),
37
48 define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2, i8* %ptr) nounwind optsize {
59 entry:
None ; RUN: llc < %s -march=x86 | not grep lea
1 ; RUN: llc < %s -march=x86-64 | not grep lea
0 ; RUN: llc < %s -march=x86 | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
2 ; CHECK-NOT: lea
23
34 @B = external global [1000 x i8], align 32
45 @A = external global [1000 x i8], align 32
None ; RUN: llc < %s -march=x86-64 > %t
1 ; RUN: grep mov %t | count 6
2 ; RUN: grep {movb %ah, (%rsi)} %t | count 3
3 ; RUN: llc < %s -march=x86 > %t
4 ; RUN: grep mov %t | count 3
5 ; RUN: grep {movb %ah, (%e} %t | count 3
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
1 ; X64: mov
2 ; X64-NEXT: movb %ah, (%rsi)
3 ; X64: mov
4 ; X64-NEXT: movb %ah, (%rsi)
5 ; X64: mov
6 ; X64-NEXT: movb %ah, (%rsi)
7 ; X64-NOT: mov
8
9 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
10 ; W64-NOT: mov
11 ; W64: movb %ch, (%rdx)
12 ; W64-NOT: mov
13 ; W64: movb %ch, (%rdx)
14 ; W64-NOT: mov
15 ; W64: movb %ch, (%rdx)
16 ; W64-NOT: mov
17
18 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
19 ; X32-NOT: mov
20 ; X32: movb %ah, (%e
21 ; X32-NOT: mov
22 ; X32: movb %ah, (%e
23 ; X32-NOT: mov
24 ; X32: movb %ah, (%e
25 ; X32-NOT: mov
626
727 ; Use h-register extract and store.
828
None ; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X86-64
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
12 ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X86-32
23
34 ; Use h registers. On x86-64, codegen doesn't support general allocation
78 ; X86-64: bar64:
89 ; X86-64: shrq $8, %rdi
910 ; X86-64: incb %dil
11
12 ; See FIXME: on regclass GR8.
13 ; It could be optimally transformed like; incb %ch; movb %ch, (%rdx)
14 ; WIN64: bar64:
15 ; WIN64: shrq $8, %rcx
16 ; WIN64: incb %cl
1017
1118 ; X86-32: bar64:
1219 ; X86-32: incb %ah
2229 ; X86-64: shrl $8, %edi
2330 ; X86-64: incb %dil
2431
32 ; WIN64: bar32:
33 ; WIN64: shrl $8, %ecx
34 ; WIN64: incb %cl
35
2536 ; X86-32: bar32:
2637 ; X86-32: incb %ah
2738 %t0 = lshr i32 %x, 8
3546 ; X86-64: bar16:
3647 ; X86-64: shrl $8, %edi
3748 ; X86-64: incb %dil
49
50 ; WIN64: bar16:
51 ; WIN64: shrl $8, %ecx
52 ; WIN64: incb %cl
3853
3954 ; X86-32: bar16:
4055 ; X86-32: incb %ah
5065 ; X86-64: movq %rdi, %rax
5166 ; X86-64: movzbl %ah, %eax
5267
68 ; WIN64: qux64:
69 ; WIN64: movzbl %ch, %eax
70
5371 ; X86-32: qux64:
5472 ; X86-32: movzbl %ah, %eax
5573 %t0 = lshr i64 %x, 8
6179 ; X86-64: qux32:
6280 ; X86-64: movl %edi, %eax
6381 ; X86-64: movzbl %ah, %eax
82
83 ; WIN64: qux32:
84 ; WIN64: movzbl %ch, %eax
6485
6586 ; X86-32: qux32:
6687 ; X86-32: movzbl %ah, %eax
7495 ; X86-64: movl %edi, %eax
7596 ; X86-64: movzbl %ah, %eax
7697
98 ; WIN64: qux16:
99 ; WIN64: movzbl %ch, %eax
100
77101 ; X86-32: qux16:
78102 ; X86-32: movzbl %ah, %eax
79103 %t0 = lshr i16 %x, 8
None ; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax}
1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.*(%eax),}
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
2 ; X64: movq ({{%rsi|%rdx}}), %r
3
4 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
5 ; X32: movsd (%eax), %xmm
26
37 ; Uses movsd to load / store i64 values if sse2 is available.
48
None ; RUN: llc < %s -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax}
1 define i32 @test(i32 %a) {
2 %tmp2 = mul i32 %a, 3 ; [#uses=1]
3 ret i32 %tmp2
4 }
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
52
6 ; RUN: llc < %s -march=x86-64 | grep {leaq (,%rdi,4), %rax}
3 ; CHECK: leaq (,[[A0:%rdi|%rcx]],4), %rax
74 define i64 @test2(i64 %a) {
85 %tmp2 = shl i64 %a, 2
96 %tmp3 = or i64 %tmp2, %a
107 ret i64 %tmp3
8 }
9
10 ; CHECK: leal ([[A0]],[[A0]],2), %eax
11 define i32 @test(i32 %a) {
12 %tmp2 = mul i32 %a, 3 ; [#uses=1]
13 ret i32 %tmp2
1114 }
1215
1316 ;; TODO! LEA instead of shift + copy.
None ; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax}
1 ; RUN: llc < %s -march=x86 -mattr=-sse2 | grep {movl.*4(%eax),}
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.(%eax),}
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
2 ; X64: movq ({{%rsi|%rdx}}), %rax
3 ; RUN: llc < %s -march=x86 -mattr=-sse2 | FileCheck %s -check-prefix=X32
4 ; X32: movl 4(%eax),
5 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=XMM
6 ; XMM: movsd (%eax),
37
48 ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
59 ; increases the places that need to use emms.
None ; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep {pshufd \$3, %xmm0, %xmm0}
0 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2,-sse41 | FileCheck %s
1 ; CHECK: pshufd $3, %xmm0, %xmm0
2
3 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse2,-sse41 | FileCheck %s -check-prefix=WIN64
4 ; %a is passed indirectly on Win64.
5 ; WIN64: movss 12(%rcx), %xmm0
16
27 define float @foo(<8 x float> %a) nounwind {
38 %c = extractelement <8 x float> %a, i32 3
None ; RUN: llc < %s -march=x86-64 -mattr=+sse41 -asm-verbose=0 | FileCheck %s
0 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse41 -asm-verbose=0 | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse41 -asm-verbose=0 | FileCheck %s -check-prefix=WIN64
12
23 define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
34 ; CHECK: test1:
45 ; CHECK-NEXT: pmulld
6
7 ; WIN64: test1:
8 ; WIN64-NEXT: movdqa (%rcx), %xmm0
9 ; WIN64-NEXT: pmulld (%rdx), %xmm0
510 %C = mul <4 x i32> %A, %B
611 ret <4 x i32> %C
712 }
914 define <4 x i32> @test1a(<4 x i32> %A, <4 x i32> *%Bp) nounwind {
1015 ; CHECK: test1a:
1116 ; CHECK-NEXT: pmulld
17
18 ; WIN64: test1a:
19 ; WIN64-NEXT: movdqa (%rcx), %xmm0
20 ; WIN64-NEXT: pmulld (%rdx), %xmm0
21
1222 %B = load <4 x i32>* %Bp
1323 %C = mul <4 x i32> %A, %B
1424 ret <4 x i32> %C
None ; RUN: llc < %s -march=x86-64 | grep min | count 1
1 ; RUN: llc < %s -march=x86-64 | grep max | count 1
2 ; RUN: llc < %s -march=x86-64 | grep mov | count 2
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; CHECK-NOT: {{(min|max|mov)}}
2 ; CHECK: mov
3 ; CHECK-NOT: {{(min|max|mov)}}
4 ; CHECK: min
5 ; CHECK-NOT: {{(min|max|mov)}}
6 ; CHECK: mov
7 ; CHECK-NOT: {{(min|max|mov)}}
8 ; CHECK: max
9 ; CHECK-NOT: {{(min|max|mov)}}
310
411 declare float @bar()
512
None ; RUN: llc < %s -march=x86-64 | not grep mov
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; CHECK-NOT: mov
12
23 define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
34 %t = load <4 x float>* %p
None ; RUN: llc < %s -march=x86-64 | grep movap | count 2
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; CHECK-NOT: movapd
2 ; CHECK: movaps
3 ; CHECK-NOT: movaps
4 ; CHECK: movapd
5 ; CHECK-NOT: movap
16
27 define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
38 store <4 x float> %x, <4 x float>* %p
None ; RUN: llc < %s -march=x86-64 | grep movaps | count 1
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; CHECK: movaps
2 ; CHECK-NOT: movaps
13
24 define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
35 store <2 x i64> %x, <2 x i64>* %p
None ; RUN: llc -march=x86-64 < %s | FileCheck %s
0 ; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
11
22 ; Commute the comparison to avoid a move.
33 ; PR7500.
None ; RUN: llc < %s -march=x86-64 -mattr=+64bit,+sse3 -print-failed-fuse-candidates |& \
1 ; RUN: grep fail | count 1
0 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=+64bit,+sse3 -print-failed-fuse-candidates |& FileCheck %s
1 ; CHECK: fail
2 ; CHECK-NOT: fail
23
34 declare float @test_f(float %f)
45 declare double @test_d(double %f)
None ; RUN: llc < %s -march=x86-64 | grep {testb \[%\]al, \[%\]al}
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; CHECK: testb %al, %al
12
23 %struct.__va_list_tag = type { i32, i32, i8*, i8* }
34
None ; RUN: llc < %s -march=x86 -relocation-model=static | not grep lea
1 ; RUN: llc < %s -march=x86-64 | not grep lea
0 ; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
2 ; CHECK-NOT: lea
23
34 ; P should be sunk into the loop and folded into the address mode. There
45 ; shouldn't be any lea instructions inside the loop.
None ; RUN: llc < %s -march=x86 | not grep lea
1 ; RUN: llc < %s -march=x86-64 | not grep lea
0 ; RUN: llc < %s -march=x86 | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
2 ; CHECK-NOT: lea
23
34 @B = external global [1000 x float], align 32
45 @A = external global [1000 x float], align 32
None ; RUN: llc < %s -march=x86-64 -tailcallopt | grep TAILCALL
0 ; RUN: llc < %s -mtriple=x86_64-linux -tailcallopt | FileCheck %s
1
2 ; FIXME: Win64 does not support byval.
3
4 ; Expect the entry point.
5 ; CHECK: tailcaller:
6
17 ; Expect 2 rep;movs because of tail call byval lowering.
2 ; RUN: llc < %s -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2
8 ; CHECK: rep;
9 ; CHECK: rep;
10
311 ; A sequence of copyto/copyfrom virtual registers is used to deal with byval
412 ; lowering appearing after moving arguments to registers. The following two
513 ; checks verify that the register allocator changes those sequences to direct
614 ; moves to argument register where it can (for registers that are not used in
715 ; byval lowering - not rsi, not rdi, not rcx).
816 ; Expect argument 4 to be moved directly to register edx.
9 ; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {7} | grep edx
17 ; CHECK: movl $7, %edx
18
1019 ; Expect argument 6 to be moved directly to register r8.
11 ; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {17} | grep r8
20 ; CHECK: movl $17, %r8d
21
22 ; Expect not call but jmp to @tailcallee.
23 ; CHECK: jmp tailcallee
24
25 ; Expect the trailer.
26 ; CHECK: .size tailcaller
1227
1328 %struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
1429 i64, i64, i64, i64, i64, i64, i64, i64,
2439 %tmp4 = tail call fastcc i64 @tailcallee(%struct.s* %a byval, i64 %tmp3, i64 %b, i64 7, i64 13, i64 17)
2540 ret i64 %tmp4
2641 }
27
28
None ; RUN: llc < %s -march=x86-64 -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=X64
0 ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=X64
1 ; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=W64
12 ; RUN: llc < %s -mcpu=yonah -march=x86 -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32
23
34 ; PR7518
1314 ; X64-NEXT: addss %xmm0, %xmm1
1415 ; X64-NEXT: movss %xmm1, (%rdi)
1516 ; X64-NEXT: ret
17
18 ; W64: test1:
19 ; W64-NEXT: movdqa (%rcx), %xmm0
20 ; W64-NEXT: pshufd $1, %xmm0, %xmm1
21 ; W64-NEXT: addss %xmm0, %xmm1
22 ; W64-NEXT: movss %xmm1, (%rdx)
23 ; W64-NEXT: ret
1624
1725 ; X32: test1:
1826 ; X32-NEXT: pshufd $1, %xmm0, %xmm1
3038 ; X64: test2:
3139 ; X64-NEXT: addps %xmm1, %xmm0
3240 ; X64-NEXT: ret
41
42 ; W64: test2:
43 ; W64-NEXT: movaps (%rcx), %xmm0
44 ; W64-NEXT: addps (%rdx), %xmm0
45 ; W64-NEXT: ret
46
47 ; X32: test2:
48 ; X32: addps %xmm1, %xmm0
3349 }
3450
3551
3753 %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32>
3854 %C = fadd <2 x float> %B, %B
3955 ret <2 x float> %C
40 ; CHECK: test3:
41 ; CHECK-NEXT: addps %xmm0, %xmm0
42 ; CHECK-NEXT: ret
56 ; X64: test3:
57 ; X64-NEXT: addps %xmm0, %xmm0
58 ; X64-NEXT: ret
59
60 ; W64: test3:
61 ; W64-NEXT: movaps (%rcx), %xmm0
62 ; W64-NEXT: addps %xmm0, %xmm0
63 ; W64-NEXT: ret
64
65 ; X32: test3:
66 ; X32-NEXT: addps %xmm0, %xmm0
67 ; X32-NEXT: ret
4368 }
4469
4570 define <2 x float> @test4(<2 x float> %A) nounwind {
4671 %C = fadd <2 x float> %A, %A
4772 ret <2 x float> %C
48 ; CHECK: test4:
49 ; CHECK-NEXT: addps %xmm0, %xmm0
50 ; CHECK-NEXT: ret
73 ; X64: test4:
74 ; X64-NEXT: addps %xmm0, %xmm0
75 ; X64-NEXT: ret
76
77 ; W64: test4:
78 ; W64-NEXT: movaps (%rcx), %xmm0
79 ; W64-NEXT: addps %xmm0, %xmm0
80 ; W64-NEXT: ret
81
82 ; X32: test4:
83 ; X32-NEXT: addps %xmm0, %xmm0
84 ; X32-NEXT: ret
5185 }
5286
5387 define <4 x float> @test5(<4 x float> %A) nounwind {
6094 %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32>
6195 ret <4 x float> %E
6296
63 ; CHECK: _test5:
64 ; CHECK-NEXT: addps %xmm0, %xmm0
65 ; CHECK-NEXT: addps %xmm0, %xmm0
66 ; CHECK-NEXT: ret
97 ; X64: test5:
98 ; X64-NEXT: addps %xmm0, %xmm0
99 ; X64-NEXT: addps %xmm0, %xmm0
100 ; X64-NEXT: ret
101
102 ; W64: test5:
103 ; W64-NEXT: movaps (%rcx), %xmm0
104 ; W64-NEXT: addps %xmm0, %xmm0
105 ; W64-NEXT: addps %xmm0, %xmm0
106 ; W64-NEXT: ret
107
108 ; X32: test5:
109 ; X32-NEXT: addps %xmm0, %xmm0
110 ; X32-NEXT: addps %xmm0, %xmm0
111 ; X32-NEXT: ret
67112 }
68113
69114
None ; RUN: llc < %s -march=x86-64 | not grep movsd
1 ; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi,.*%xmm0}
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
2 ; CHECK-NOT: movsd
3 ; CHECK: movd {{%rdi|%rcx}}, %xmm0
4 ; CHECK-NOT: movsd
25
36 define <2 x i64> @test(i64 %i) nounwind {
47 entry:
None ; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi, %xmm0}
1 ; RUN: llc < %s -march=x86-64 | not grep xor
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
2 ; CHECK-NOT: xor
3 ; CHECK: movd {{%rdi|%rcx}}, %xmm0
4 ; CHECK-NOT: xor
25 ; PR2108
36
47 define <2 x i64> @doload64(i64 %x) nounwind {
None ; RUN: llc < %s -o - -march=x86-64 | FileCheck %s
0 ; RUN: llc < %s -o - -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -o - -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
12 ; PR4891
23
34 ; Both loads should happen before either store.
67 ; CHECK: movl (%rsi), %ecx
78 ; CHECK: movl %ecx, (%rdi)
89 ; CHECK: movl %eax, (%rsi)
10
11 ; WIN64: movl (%rcx), %eax
12 ; WIN64: movl (%rdx), %esi
13 ; WIN64: movl %esi, (%rcx)
14 ; WIN64: movl %eax, (%rdx)
915
1016 define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind {
1117 entry:
None ; RUN: llc < %s -march=x86-64 | grep {shll.*3, %edi}
0 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
1 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
2 ; CHECK: shll $3, {{%edi|%ecx}}
13 ; PR3829
24 ; The generated code should multiply by 3 (sizeof i8*) as an i32,
35 ; not as an i64!
1616 'PATHEXT' : os.environ.get('PATHEXT',''),
1717 'SYSTEMROOT' : os.environ.get('SYSTEMROOT',''),
1818 'LLVM_DISABLE_CRT_DEBUG' : '1',
19 'PRINTF_EXPONENT_DIGITS' : '2',
2019 'PYTHONUNBUFFERED' : '1',
2120 }
2221