llvm.org GIT mirror llvm / 3653b13
Test cases for vector shifts changes r80935 Changed the old vector shift test to use FileCheck git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80936 91177308-0d34-0410-b5e6-96231b3b80d8 Mon P Wang 10 years ago
5 changed file(s) with 126 addition(s) and 12 deletion(s). Raw diff Collapse all Expand all
None ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t
1 ; RUN: grep psllq %t | count 2
2 ; RUN: grep pslld %t | count 2
3 ; RUN: grep psllw %t | count 2
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
41
52 ; test vector shifts converted to proper SSE2 vector shifts when the shift
63 ; amounts are the same.
74
85 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
96 entry:
7 ; CHECK: shift1a:
8 ; CHECK: psllq
109 %shl = shl <2 x i64> %val, < i64 32, i64 32 >
1110 store <2 x i64> %shl, <2 x i64>* %dst
1211 ret void
1413
1514 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
1615 entry:
16 ; CHECK: shift1b:
17 ; CHECK: movd
18 ; CHECK-NEXT: psllq
1719 %0 = insertelement <2 x i64> undef, i64 %amt, i32 0
1820 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1
1921 %shl = shl <2 x i64> %val, %1
2426
2527 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
2628 entry:
29 ; CHECK: shift2a:
30 ; CHECK: pslld
2731 %shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
2832 store <4 x i32> %shl, <4 x i32>* %dst
2933 ret void
3135
3236 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
3337 entry:
38 ; CHECK: shift2b:
39 ; CHECK: movd
40 ; CHECK-NEXT: pslld
3441 %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
3542 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
3643 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
4249
4350 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
4451 entry:
52 ; CHECK: shift3a:
53 ; CHECK: psllw
4554 %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
4655 store <8 x i16> %shl, <8 x i16>* %dst
4756 ret void
4857 }
4958
59 ; Make sure the shift amount is properly zero extended.
5060 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
5161 entry:
62 ; CHECK: shift3b:
63 ; CHECK: movzwl
64 ; CHECK: movd
65 ; CHECK-NEXT: psllw
5266 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
5367 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
5468 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
None ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t
1 ; RUN: grep psrlq %t | count 2
2 ; RUN: grep psrld %t | count 2
3 ; RUN: grep psrlw %t | count 2
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
41
52 ; test vector shifts converted to proper SSE2 vector shifts when the shift
63 ; amounts are the same.
74
85 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
96 entry:
7 ; CHECK: shift1a:
8 ; CHECK: psrlq
109 %lshr = lshr <2 x i64> %val, < i64 32, i64 32 >
1110 store <2 x i64> %lshr, <2 x i64>* %dst
1211 ret void
1413
1514 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
1615 entry:
16 ; CHECK: shift1b:
17 ; CHECK: movd
18 ; CHECK-NEXT: psrlq
1719 %0 = insertelement <2 x i64> undef, i64 %amt, i32 0
1820 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1
1921 %lshr = lshr <2 x i64> %val, %1
2325
2426 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
2527 entry:
28 ; CHECK: shift2a:
29 ; CHECK: psrld
2630 %lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 >
2731 store <4 x i32> %lshr, <4 x i32>* %dst
2832 ret void
3034
3135 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
3236 entry:
37 ; CHECK: shift2b:
38 ; CHECK: movd
39 ; CHECK-NEXT: psrld
3340 %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
3441 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
3542 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
4249
4350 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
4451 entry:
52 ; CHECK: shift3a:
53 ; CHECK: psrlw
4554 %lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
4655 store <8 x i16> %lshr, <8 x i16>* %dst
4756 ret void
4857 }
4958
59 ; properly zero extend the shift amount
5060 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
5161 entry:
62 ; CHECK: shift3b:
63 ; CHECK: movzwl
64 ; CHECK: movd
65 ; CHECK-NEXT: psrlw
5266 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
5367 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
5468 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
None ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t
1 ; RUN: grep psrad %t | count 2
2 ; RUN: grep psraw %t | count 2
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
31
42 ; test vector shifts converted to proper SSE2 vector shifts when the shift
53 ; amounts are the same.
64
75 ; Note that x86 does have ashr
6
7 ; shift1a can't use a packed shift
88 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
99 entry:
10 ; CHECK: shift1a:
11 ; CHECK: sarl
1012 %ashr = ashr <2 x i64> %val, < i64 32, i64 32 >
1113 store <2 x i64> %ashr, <2 x i64>* %dst
1214 ret void
1416
1517 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
1618 entry:
19 ; CHECK: shift2a:
20 ; CHECK: psrad $5
1721 %ashr = ashr <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
1822 store <4 x i32> %ashr, <4 x i32>* %dst
1923 ret void
2125
2226 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
2327 entry:
28 ; CHECK: shift2b:
29 ; CHECK: movd
30 ; CHECK-NEXT: psrad
2431 %0 = insertelement <4 x i32> undef, i32 %amt, i32 0
2532 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1
2633 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2
3239
3340 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
3441 entry:
42 ; CHECK: shift3a:
43 ; CHECK: psraw $5
3544 %ashr = ashr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
3645 store <8 x i16> %ashr, <8 x i16>* %dst
3746 ret void
3948
4049 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
4150 entry:
51 ; CHECK: shift3b:
52 ; CHECK: movzwl
53 ; CHECK: movd
54 ; CHECK-NEXT: psraw
4255 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
4356 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
4457 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
None ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
11 ; RUN: grep psllq %t | count 1
22 ; RUN: grep pslld %t | count 3
33 ; RUN: grep psllw %t | count 2
77
88 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
99 entry:
10 ; CHECK: shift1a:
11 ; CHECK: psllq
1012 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32>
1113 %shl = shl <2 x i64> %val, %shamt
1214 store <2 x i64> %shl, <2 x i64>* %dst
1315 ret void
1416 }
1517
18 ; shift1b can't use a packed shift
1619 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
1720 entry:
21 ; CHECK: shift1b:
22 ; CHECK: shll
1823 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32>
1924 %shl = shl <2 x i64> %val, %shamt
2025 store <2 x i64> %shl, <2 x i64>* %dst
2328
2429 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
2530 entry:
31 ; CHECK: shift2a:
32 ; CHECK: pslld
2633 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32>
2734 %shl = shl <4 x i32> %val, %shamt
2835 store <4 x i32> %shl, <4 x i32>* %dst
3138
3239 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
3340 entry:
41 ; CHECK: shift2b:
42 ; CHECK: pslld
3443 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32>
3544 %shl = shl <4 x i32> %val, %shamt
3645 store <4 x i32> %shl, <4 x i32>* %dst
3948
4049 define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
4150 entry:
51 ; CHECK: shift2c:
52 ; CHECK: pslld
4253 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32>
4354 %shl = shl <4 x i32> %val, %shamt
4455 store <4 x i32> %shl, <4 x i32>* %dst
4758
4859 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind {
4960 entry:
61 ; CHECK: shift3a:
62 ; CHECK: movzwl
63 ; CHECK: psllw
5064 %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32>
5165 %shl = shl <8 x i16> %val, %shamt
5266 store <8 x i16> %shl, <8 x i16>* %dst
5569
5670 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
5771 entry:
72 ; CHECK: shift3b:
73 ; CHECK: movzwl
74 ; CHECK: psllw
5875 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0
5976 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1
6077 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
1
2 ; When loading the shift amount from memory, avoid generating the splat.
3
4 define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
5 entry:
6 ; CHECK: shift5a:
7 ; CHECK: movd
8 ; CHECK-NEXT: pslld
9 %amt = load i32* %pamt
10 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
11 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
12 %shl = shl <4 x i32> %val, %shamt
13 store <4 x i32> %shl, <4 x i32>* %dst
14 ret void
15 }
16
17
18 define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
19 entry:
20 ; CHECK: shift5b:
21 ; CHECK: movd
22 ; CHECK-NEXT: psrad
23 %amt = load i32* %pamt
24 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
25 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
26 %shr = ashr <4 x i32> %val, %shamt
27 store <4 x i32> %shr, <4 x i32>* %dst
28 ret void
29 }
30
31
32 define void @shift5c(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
33 entry:
34 ; CHECK: shift5c:
35 ; CHECK: movd
36 ; CHECK-NEXT: pslld
37 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
38 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
39 %shl = shl <4 x i32> %val, %shamt
40 store <4 x i32> %shl, <4 x i32>* %dst
41 ret void
42 }
43
44
45 define void @shift5d(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
46 entry:
47 ; CHECK: shift5d:
48 ; CHECK: movd
49 ; CHECK-NEXT: psrad
50 %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
51 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
52 %shr = ashr <4 x i32> %val, %shamt
53 store <4 x i32> %shr, <4 x i32>* %dst
54 ret void
55 }