llvm.org GIT mirror llvm / 35ee7d2
Added support for disassembling unpredictable swp/swpb ARM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155004 91177308-0d34-0410-b5e6-96231b3b80d8 Silviu Baranga 7 years ago
4 changed file(s) with 33 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
531531 let Inst{11-4} = 0b00001001;
532532 let Inst{3-0} = Rt2;
533533
534 let Unpredictable{11-8} = 0b1111;
534535 let DecoderMethod = "DecodeSwap";
535536 }
536537
42794279
42804280 // SWP/SWPB are deprecated in V6/V7.
42814281 let mayLoad = 1, mayStore = 1 in {
4282 def SWP : AIswp<0, (outs GPR:$Rt), (ins GPR:$Rt2, addr_offset_none:$addr),
4282 def SWP : AIswp<0, (outs GPRnopc:$Rt), (ins GPRnopc:$Rt2, addr_offset_none:$addr),
42834283 "swp", []>;
4284 def SWPB: AIswp<1, (outs GPR:$Rt), (ins GPR:$Rt2, addr_offset_none:$addr),
4284 def SWPB: AIswp<1, (outs GPRnopc:$Rt), (ins GPRnopc:$Rt2, addr_offset_none:$addr),
42854285 "swpb", []>;
42864286 }
42874287
43094309 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
43104310
43114311 DecodeStatus S = MCDisassembler::Success;
4312
4313 if (Rt == Rn || Rn == Rt2)
4314 S = MCDisassembler::SoftFail;
4315
43124316 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))
43134317 return MCDisassembler::Fail;
43144318 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder)))
0 # RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s
1
2 # CHECK: potentially undefined
3 # CHECK: 0x9f 0x10 0x03 0x01
4 0x9f 0x10 0x03 0x01
5
6 # CHECK: potentially undefined
7 # CHECK: 0x90 0xf0 0x03 0x01
8 0x90 0xf0 0x03 0x01
9
10 # CHECK: potentially undefined
11 # CHECK: 0x90 0x1f 0x03 0x01
12 0x90 0x1f 0x03 0x01
13
14 # CHECK: potentially undefined
15 # CHECK: 0x90 0x10 0x0f 0x01
16 0x90 0x10 0x0f 0x01
17
18 # CHECK: potentially undefined
19 # CHECK: 0x90 0x10 0x01 0x01
20 0x90 0x10 0x01 0x01
21
22 # CHECK: potentially undefined
23 # CHECK: 0x90 0x10 0x00 0x01
24 0x90 0x10 0x00 0x01
25