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[AMDGPU][MC][GFX9] Enable inline constants for SDWA operands See bug 35771: https://bugs.llvm.org/show_bug.cgi?id=35771 Differential Revision: https://reviews.llvm.org/D42058 Reviewers: vpykhtin, artem.tamazov, arsenm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322655 91177308-0d34-0410-b5e6-96231b3b80d8 Dmitry Preobrazhensky 2 years ago
7 changed file(s) with 478 addition(s) and 90 deletion(s). Raw diff Collapse all Expand all
266266 return isOff() || isRegClass(AMDGPU::VGPR_32RegClassID);
267267 }
268268
269 bool isSDWARegKind() const;
269 bool isSDWAOperand(MVT type) const;
270 bool isSDWAFP16Operand() const;
271 bool isSDWAFP32Operand() const;
272 bool isSDWAInt16Operand() const;
273 bool isSDWAInt32Operand() const;
270274
271275 bool isImmTy(ImmTy ImmT) const {
272276 return isImm() && Imm.Type == ImmT;
12841288 return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg());
12851289 }
12861290
1287 bool AMDGPUOperand::isSDWARegKind() const {
1291 bool AMDGPUOperand::isSDWAOperand(MVT type) const {
12881292 if (AsmParser->isVI())
12891293 return isVReg();
12901294 else if (AsmParser->isGFX9())
1291 return isRegKind();
1295 return isRegKind() || isInlinableImm(type);
12921296 else
12931297 return false;
1298 }
1299
1300 bool AMDGPUOperand::isSDWAFP16Operand() const {
1301 return isSDWAOperand(MVT::f16);
1302 }
1303
1304 bool AMDGPUOperand::isSDWAFP32Operand() const {
1305 return isSDWAOperand(MVT::f32);
1306 }
1307
1308 bool AMDGPUOperand::isSDWAInt16Operand() const {
1309 return isSDWAOperand(MVT::i16);
1310 }
1311
1312 bool AMDGPUOperand::isSDWAInt32Operand() const {
1313 return isSDWAOperand(MVT::i32);
12941314 }
12951315
12961316 uint64_t AMDGPUOperand::applyInputFPModifiers(uint64_t Val, unsigned Size) const
47984818 }
47994819 }
48004820 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
4801 Op.addRegWithInputModsOperands(Inst, 2);
4821 Op.addRegOrImmWithInputModsOperands(Inst, 2);
48024822 } else if (Op.isImm()) {
48034823 // Handle optional arguments
48044824 OptionalIdx[Op.getImmTy()] = I;
731731 }
732732
733733 MCOperand AMDGPUDisassembler::decodeSDWASrc(const OpWidthTy Width,
734 unsigned Val) const {
734 const unsigned Val) const {
735735 using namespace AMDGPU::SDWA;
736 using namespace AMDGPU::EncValues;
736737
737738 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9]) {
738739 // XXX: static_cast is needed to avoid stupid warning:
753754 Val - SDWA9EncValues::SRC_TTMP_MIN);
754755 }
755756
756 return decodeSpecialReg32(Val - SDWA9EncValues::SRC_SGPR_MIN);
757 const unsigned SVal = Val - SDWA9EncValues::SRC_SGPR_MIN;
758
759 if (INLINE_INTEGER_C_MIN <= SVal && SVal <= INLINE_INTEGER_C_MAX)
760 return decodeIntImmed(SVal);
761
762 if (INLINE_FLOATING_C_MIN <= SVal && SVal <= INLINE_FLOATING_C_MAX)
763 return decodeFPImmed(Width, SVal);
764
765 return decodeSpecialReg32(SVal);
757766 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) {
758767 return createRegOperand(getVgprClassId(Width), Val);
759768 }
334334
335335 const MCOperand &MO = MI.getOperand(OpNo);
336336
337 unsigned Reg = MO.getReg();
338 RegEnc |= MRI.getEncodingValue(Reg);
339 RegEnc &= SDWA9EncValues::SRC_VGPR_MASK;
340 if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) {
341 RegEnc |= SDWA9EncValues::SRC_SGPR_MASK;
342 }
343 return RegEnc;
337 if (MO.isReg()) {
338 unsigned Reg = MO.getReg();
339 RegEnc |= MRI.getEncodingValue(Reg);
340 RegEnc &= SDWA9EncValues::SRC_VGPR_MASK;
341 if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) {
342 RegEnc |= SDWA9EncValues::SRC_SGPR_MASK;
343 }
344 return RegEnc;
345 } else {
346 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
347 uint32_t Enc = getLitEncoding(MO, Desc.OpInfo[OpNo], STI);
348 if (Enc != ~0U && Enc != 255) {
349 return Enc | SDWA9EncValues::SRC_SGPR_MASK;
350 }
351 }
352
353 llvm_unreachable("Unsupported operand kind");
354 return 0;
344355 }
345356
346357 unsigned
136136 OPERAND_INPUT_MODS,
137137
138138 // Operand for SDWA instructions
139 OPERAND_SDWA_SRC,
140139 OPERAND_SDWA_VOPC_DST,
141140
142141 /// Operand with 32-bit immediate that uses the constant bus.
168168 >;
169169
170170 //===----------------------------------------------------------------------===//
171 // ValueType helpers
172 //===----------------------------------------------------------------------===//
173
174 // Returns 1 if the source arguments have modifiers, 0 if they do not.
175 // XXX - do f16 instructions?
176 class isFloatType {
177 bit ret =
178 !if(!eq(SrcVT.Value, f16.Value), 1,
179 !if(!eq(SrcVT.Value, f32.Value), 1,
180 !if(!eq(SrcVT.Value, f64.Value), 1,
181 !if(!eq(SrcVT.Value, v2f16.Value), 1,
182 0))));
183 }
184
185 class isIntType {
186 bit ret =
187 !if(!eq(SrcVT.Value, i16.Value), 1,
188 !if(!eq(SrcVT.Value, i32.Value), 1,
189 !if(!eq(SrcVT.Value, i64.Value), 1,
190 0)));
191 }
192
193 class isPackedType {
194 bit ret =
195 !if(!eq(SrcVT.Value, v2i16.Value), 1,
196 !if(!eq(SrcVT.Value, v2f16.Value), 1, 0)
197 );
198 }
199
200 //===----------------------------------------------------------------------===//
171201 // PatFrags for global memory operations
172202 //===----------------------------------------------------------------------===//
173203
565595 let ParserMatchClass = VReg32OrOffClass;
566596 }
567597
568 class SDWASrc : RegisterOperand {
598 class SDWASrc : RegisterOperand {
569599 let OperandNamespace = "AMDGPU";
570 let OperandType = "OPERAND_SDWA_SRC";
600 string Type = !if(isFloatType.ret, "FP", "INT");
601 let OperandType = "OPERAND_REG_INLINE_C_"#Type#vt.Size;
602 let DecoderMethod = "decodeSDWASrc"#vt.Size;
571603 let EncoderMethod = "getSDWASrcEncoding";
572604 }
573605
574 def SDWASrc32 : SDWASrc {
575 let DecoderMethod = "decodeSDWASrc32";
576 }
577
578 def SDWASrc16 : SDWASrc {
579 let DecoderMethod = "decodeSDWASrc16";
580 }
606 def SDWASrc_i32 : SDWASrc;
607 def SDWASrc_i16 : SDWASrc;
608 def SDWASrc_f32 : SDWASrc;
609 def SDWASrc_f16 : SDWASrc;
581610
582611 def SDWAVopcDst : VOPDstOperand {
583612 let OperandNamespace = "AMDGPU";
760789 def IntOpSelModsMatchClass : OpSelModsMatchClass;
761790 def IntOpSelMods : InputMods;
762791
763 def FPRegSDWAInputModsMatchClass : AsmOperandClass {
764 let Name = "SDWARegWithFPInputMods";
765 let ParserMethod = "parseRegWithFPInputMods";
766 let PredicateMethod = "isSDWARegKind";
767 }
768
769 def FPRegSDWAInputMods : InputMods {
792 class FPSDWAInputModsMatchClass : AsmOperandClass {
793 let Name = "SDWAWithFP"#opSize#"InputMods";
794 let ParserMethod = "parseRegOrImmWithFPInputMods";
795 let PredicateMethod = "isSDWAFP"#opSize#"Operand";
796 }
797
798 def FP16SDWAInputModsMatchClass : FPSDWAInputModsMatchClass<16>;
799 def FP32SDWAInputModsMatchClass : FPSDWAInputModsMatchClass<32>;
800
801 class FPSDWAInputMods :
802 InputMods {
770803 let PrintMethod = "printOperandAndFPInputMods";
771804 }
805
806 def FP16SDWAInputMods : FPSDWAInputMods;
807 def FP32SDWAInputMods : FPSDWAInputMods;
772808
773809 def FPVRegInputModsMatchClass : AsmOperandClass {
774810 let Name = "VRegWithFPInputMods";
780816 let PrintMethod = "printOperandAndFPInputMods";
781817 }
782818
783
784 def IntRegSDWAInputModsMatchClass : AsmOperandClass {
785 let Name = "SDWARegWithIntInputMods";
786 let ParserMethod = "parseRegWithIntInputMods";
787 let PredicateMethod = "isSDWARegKind";
788 }
789
790 def IntRegSDWAInputMods : InputMods {
819 class IntSDWAInputModsMatchClass : AsmOperandClass {
820 let Name = "SDWAWithInt"#opSize#"InputMods";
821 let ParserMethod = "parseRegOrImmWithIntInputMods";
822 let PredicateMethod = "isSDWAInt"#opSize#"Operand";
823 }
824
825 def Int16SDWAInputModsMatchClass : IntSDWAInputModsMatchClass<16>;
826 def Int32SDWAInputModsMatchClass : IntSDWAInputModsMatchClass<32>;
827
828 class IntSDWAInputMods :
829 InputMods {
791830 let PrintMethod = "printOperandAndIntInputMods";
792831 }
832
833 def Int16SDWAInputMods : IntSDWAInputMods;
834 def Int32SDWAInputMods : IntSDWAInputMods;
793835
794836 def IntVRegInputModsMatchClass : AsmOperandClass {
795837 let Name = "VRegWithIntInputMods";
10361078 }
10371079
10381080 class getSDWASrcForVT {
1039 RegisterOperand ret = !if(!eq(VT.Size, 16), SDWASrc16, SDWASrc32);
1081 bit isFP = !if(!eq(VT.Value, f16.Value), 1,
1082 !if(!eq(VT.Value, f32.Value), 1,
1083 0));
1084 RegisterOperand retFlt = !if(!eq(VT.Size, 16), SDWASrc_f16, SDWASrc_f32);
1085 RegisterOperand retInt = !if(!eq(VT.Size, 16), SDWASrc_i16, SDWASrc_i32);
1086 RegisterOperand ret = !if(isFP, retFlt, retInt);
10401087 }
10411088
10421089 // Returns the register class to use for sources of VOP3 instructions for the
10771124 );
10781125 }
10791126
1080 // Returns 1 if the source arguments have modifiers, 0 if they do not.
1081 // XXX - do f16 instructions?
1082 class isFloatType {
1083 bit ret =
1084 !if(!eq(SrcVT.Value, f16.Value), 1,
1085 !if(!eq(SrcVT.Value, f32.Value), 1,
1086 !if(!eq(SrcVT.Value, f64.Value), 1,
1087 !if(!eq(SrcVT.Value, v2f16.Value), 1,
1088 0))));
1089 }
1090
1091 class isIntType {
1092 bit ret =
1093 !if(!eq(SrcVT.Value, i16.Value), 1,
1094 !if(!eq(SrcVT.Value, i32.Value), 1,
1095 !if(!eq(SrcVT.Value, i64.Value), 1,
1096 0)));
1097 }
1098
1099 class isPackedType {
1100 bit ret =
1101 !if(!eq(SrcVT.Value, v2i16.Value), 1,
1102 !if(!eq(SrcVT.Value, v2f16.Value), 1, 0)
1103 );
1104 }
1105
11061127 // Float or packed int
11071128 class isModifierType {
11081129 bit ret =
11471168
11481169 // Return type of input modifiers operand specified input operand for SDWA
11491170 class getSrcModSDWA {
1150 bit isFP = !if(!eq(VT.Value, f16.Value), 1,
1151 !if(!eq(VT.Value, f32.Value), 1,
1152 !if(!eq(VT.Value, f64.Value), 1,
1153 0)));
1154 Operand ret = !if(isFP, FPRegSDWAInputMods, IntRegSDWAInputMods);
1171 Operand ret = !if(!eq(VT.Value, f16.Value), FP16SDWAInputMods,
1172 !if(!eq(VT.Value, f32.Value), FP32SDWAInputMods,
1173 !if(!eq(VT.Value, i16.Value), Int16SDWAInputMods,
1174 Int32SDWAInputMods)));
11551175 }
11561176
11571177 // Returns the input arguments for VOP[12C] instructions for the given SrcVT.
630630 v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:WORD_0
631631
632632 //===----------------------------------------------------------------------===//
633 // Check that immideates are not supported
634 //===----------------------------------------------------------------------===//
635
636 // NOSICI: error:
637 // NOV9: error: invalid operand for instruction
638 v_mov_b32 v0, 1 src0_sel:BYTE_2 src1_sel:WORD_0
639
640 // NOSICI: error:
641 // NOGFX89: error: invalid operand for instruction
642 v_and_b32 v0, 42, v1 src0_sel:BYTE_2 src1_sel:WORD_0
643
644 // NOSICI: error:
645 // NOGFX89: error: invalid operand for instruction
646 v_add_f32 v0, v1, 345 src0_sel:BYTE_2 src1_sel:WORD_0
647
648 // NOSICI: error:
649 // NOGFX89: error: invalid operand for instruction
650 v_cmpx_class_f32 vcc, -1, 200 src0_sel:BYTE_2 src1_sel:WORD_0
651
652 //===----------------------------------------------------------------------===//
653633 // Check GFX9-specific SDWA features
654634 //===----------------------------------------------------------------------===//
655635
762742 v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
763743
764744 //===----------------------------------------------------------------------===//
745 // Inline constants are allowed (though semantics is not clear yet)
746 //===----------------------------------------------------------------------===//
747
748 // NOSICI: error:
749 // NOVI: error:
750 // GFX9: v_mov_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0x80,0x06,0x86,0x06]
751 v_mov_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
752
753 // NOSICI: error:
754 // NOVI: error:
755 // GFX9: v_mov_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xc1,0x06,0x86,0x06]
756 v_mov_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
757
758 // NOSICI: error:
759 // NOVI: error:
760 // GFX9: v_mov_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xf0,0x06,0x86,0x06]
761 v_mov_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
762
763 // NOSICI: error:
764 // NOVI: error:
765 // GFX9: v_mov_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xf7,0x06,0x86,0x06]
766 v_mov_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
767
768 // NOSICI: error:
769 // NOVI: error:
770 // GFX9: v_mov_b32_sdwa v5, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xc1,0x16,0x8e,0x06]
771 v_mov_b32_sdwa v5, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
772
773 // NOSICI: error:
774 // NOVI: error:
775 // GFX9: v_add_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x06,0x86,0x06]
776 v_add_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
777
778 // NOSICI: error:
779 // NOVI: error:
780 // GFX9: v_add_f32_sdwa v5, |-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x16,0xa6,0x06]
781 v_add_f32_sdwa v5, |-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
782
783 // NOSICI: error:
784 // NOVI: error:
785 // GFX9: v_add_f32_sdwa v5, neg(-1), -|v2| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x16,0x96,0x36]
786 v_add_f32_sdwa v5, neg(-1), -|v2| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
787
788 // NOSICI: error:
789 // NOVI: error:
790 // GFX9: v_add_f32_sdwa v5, -|-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xc1,0x16,0xb6,0x06]
791 v_add_f32_sdwa v5, -|-1|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
792
793 // NOSICI: error:
794 // NOVI: error:
795 // GFX9: v_add_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf0,0x06,0x86,0x06]
796 v_add_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
797
798 // NOSICI: error:
799 // NOVI: error:
800 // GFX9: v_add_f32_sdwa v5, |-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0xa6,0x06]
801 v_add_f32_sdwa v5, |-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
802
803 // NOSICI: error:
804 // NOVI: error:
805 // GFX9: v_add_f32_sdwa v5, neg(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0x96,0x06]
806 v_add_f32_sdwa v5, neg(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
807
808 // NOSICI: error:
809 // NOVI: error:
810 // GFX9: v_add_f32_sdwa v5, -|-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0xb6,0x06]
811 v_add_f32_sdwa v5, -|-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
812
813 // NOSICI: error:
814 // NOVI: error:
815 // GFX9: v_add_f32_sdwa v5, v2, -4.0 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0x86]
816 v_add_f32_sdwa v5, v2, -4.0 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
817
818 // NOSICI: error:
819 // NOVI: error:
820 // GFX9: v_add_f32_sdwa v5, v2, |-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0xa6]
821 v_add_f32_sdwa v5, v2, |-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
822
823 // NOSICI: error:
824 // NOVI: error:
825 // GFX9: v_add_f32_sdwa v5, v2, neg(-4.0) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0x96]
826 v_add_f32_sdwa v5, v2, neg(-4.0) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
827
828 // NOSICI: error:
829 // NOVI: error:
830 // GFX9: v_add_f32_sdwa v5, v2, -|-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0xee,0x0b,0x02,0x02,0x16,0x06,0xb6]
831 v_add_f32_sdwa v5, v2, -|-4.0| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
832
833 // NOSICI: error:
834 // NOVI: error:
835 // GFX9: v_add_f32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x86]
836 v_add_f32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
837
838 // NOSICI: error:
839 // NOVI: error:
840 // GFX9: v_add_f32_sdwa v5, v2, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xa6]
841 v_add_f32_sdwa v5, v2, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
842
843 // NOSICI: error:
844 // NOVI: error:
845 // GFX9: v_add_f32_sdwa v5, v2, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x96]
846 v_add_f32_sdwa v5, v2, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
847
848 // NOSICI: error:
849 // NOVI: error:
850 // GFX9: v_add_f32_sdwa v5, v2, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xb6]
851 v_add_f32_sdwa v5, v2, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
852
853 // NOSICI: error:
854 // NOVI: error:
855 // GFX9: v_and_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x26,0xf7,0x16,0x86,0x06]
856 v_and_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
857
858 // NOSICI: error:
859 // NOVI: error:
860 // GFX9: v_and_b32_sdwa v5, sext(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x26,0xf7,0x16,0x8e,0x06]
861 v_and_b32_sdwa v5, sext(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
862
863 // NOSICI: error:
864 // NOVI: error:
865 // GFX9: v_and_b32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x86]
866 v_and_b32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
867
868 // NOSICI: error:
869 // NOVI: error:
870 // GFX9: v_and_b32_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x8e]
871 v_and_b32_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
872
873 // NOSICI: error:
874 // NOVI: error:
875 // GFX9: v_exp_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x86,0x06]
876 v_exp_f16_sdwa v5, -1
877
878 // NOSICI: error:
879 // NOVI: error:
880 // GFX9: v_exp_f16_sdwa v5, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xa6,0x06]
881 v_exp_f16_sdwa v5, |-1|
882
883 // NOSICI: error:
884 // NOVI: error:
885 // GFX9: v_exp_f16_sdwa v5, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x96,0x06]
886 v_exp_f16_sdwa v5, neg(-1)
887
888 // NOSICI: error:
889 // NOVI: error:
890 // GFX9: v_exp_f16_sdwa v5, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xb6,0x06]
891 v_exp_f16_sdwa v5, -|-1|
892
893 // NOSICI: error:
894 // NOVI: error:
895 // GFX9: v_exp_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x86,0x06]
896 v_exp_f16_sdwa v5, 0.5
897
898 // NOSICI: error:
899 // NOVI: error:
900 // GFX9: v_exp_f16_sdwa v5, |0.5| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xa6,0x06]
901 v_exp_f16_sdwa v5, |0.5|
902
903 // NOSICI: error:
904 // NOVI: error:
905 // GFX9: v_exp_f16_sdwa v5, neg(0.5) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x96,0x06]
906 v_exp_f16_sdwa v5, neg(0.5)
907
908 // NOSICI: error:
909 // NOVI: error:
910 // GFX9: v_exp_f16_sdwa v5, -|0.5| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xb6,0x06]
911 v_exp_f16_sdwa v5, -|0.5|
912
913 // NOSICI: error:
914 // NOVI: error:
915 // GFX9: v_max_i16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x60,0xf7,0x16,0x86,0x06]
916 v_max_i16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
917
918 // NOSICI: error:
919 // NOVI: error:
920 // GFX9: v_max_i16_sdwa v5, sext(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x60,0xf7,0x16,0x8e,0x06]
921 v_max_i16_sdwa v5, sext(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
922
923 // NOSICI: error:
924 // NOVI: error:
925 // GFX9: v_max_i16_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x86]
926 v_max_i16_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
927
928 // NOSICI: error:
929 // NOVI: error:
930 // GFX9: v_max_i16_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x8e]
931 v_max_i16_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
932
933 // NOSICI: error:
934 // NOVI: error:
935 // GFX9: v_cmp_eq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0x86,0x06]
936 v_cmp_eq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
937
938 // NOSICI: error:
939 // NOVI: error:
940 // GFX9: v_cmp_eq_f32_sdwa s[6:7], |-4.0|, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0xa6,0x06]
941 v_cmp_eq_f32_sdwa s[6:7], |-4.0|, v2 src0_sel:DWORD src1_sel:DWORD
942
943 // NOSICI: error:
944 // NOVI: error:
945 // GFX9: v_cmp_eq_f32_sdwa s[6:7], neg(-4.0), v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0x96,0x06]
946 v_cmp_eq_f32_sdwa s[6:7], neg(-4.0), v2 src0_sel:DWORD src1_sel:DWORD
947
948 // NOSICI: error:
949 // NOVI: error:
950 // GFX9: v_cmp_eq_f32_sdwa s[6:7], -|-4.0|, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0xb6,0x06]
951 v_cmp_eq_f32_sdwa s[6:7], -|-4.0|, v2 src0_sel:DWORD src1_sel:DWORD
952
953 // NOSICI: error:
954 // NOVI: error:
955 // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, -1 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x86]
956 v_cmp_eq_f32_sdwa s[6:7], v2, -1 src0_sel:DWORD src1_sel:DWORD
957
958 // NOSICI: error:
959 // NOVI: error:
960 // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, |-1| src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xa6]
961 v_cmp_eq_f32_sdwa s[6:7], v2, |-1| src0_sel:DWORD src1_sel:DWORD
962
963 // NOSICI: error:
964 // NOVI: error:
965 // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, neg(-1) src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x96]
966 v_cmp_eq_f32_sdwa s[6:7], v2, neg(-1) src0_sel:DWORD src1_sel:DWORD
967
968 // NOSICI: error:
969 // NOVI: error:
970 // GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, -|-1| src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xb6]
971 v_cmp_eq_f32_sdwa s[6:7], v2, -|-1| src0_sel:DWORD src1_sel:DWORD
972
973 //===----------------------------------------------------------------------===//
974 // Literals are not allowed
975 //===----------------------------------------------------------------------===//
976
977 // NOSICI: error:
978 // NOGFX89: error: invalid operand for instruction
979 v_add_f32 v0, v1, 3.45 src0_sel:BYTE_2 src1_sel:WORD_0
980
981 // NOSICI: error:
982 // NOGFX89: error: invalid operand for instruction
983 v_cmpx_class_f32 vcc, v1, 200 src0_sel:BYTE_2 src1_sel:WORD_0
984
985 // NOSICI: error:
986 // NOGFX89: error: invalid operand for instruction
987 v_cmpx_class_f32 vcc, 200, v1 src0_sel:BYTE_2 src1_sel:WORD_0
988
989 // NOSICI: error:
990 // NOGFX89: error: invalid operand for instruction
991 v_mov_b32_sdwa v5, -17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
992
993 //===----------------------------------------------------------------------===//
765994 // VOPC with arbitrary SGPR destination
766995 //===----------------------------------------------------------------------===//
767996
487487 0xf9 0x04 0x84 0x7c 0x02 0xfe 0x85 0x02
488488
489489 #===------------------------------------------------------------------------===#
490 # Inline constants
491 #===------------------------------------------------------------------------===#
492
493 # GFX9: v_mov_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xc1,0x16,0x86,0x06]
494 0xf9,0x02,0x0a,0x7e,0xc1,0x16,0x86,0x06
495
496 # GFX9: v_mov_b32_sdwa v5, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xc1,0x16,0x8e,0x06]
497 0xf9,0x02,0x0a,0x7e,0xc1,0x16,0x8e,0x06
498
499 # GFX9: v_mov_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xf0,0x16,0x86,0x06]
500 0xf9,0x02,0x0a,0x7e,0xf0,0x16,0x86,0x06
501
502 # GFX9: v_mov_b32_sdwa v5, sext(0.5) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x02,0x0a,0x7e,0xf0,0x16,0x8e,0x06]
503 0xf9,0x02,0x0a,0x7e,0xf0,0x16,0x8e,0x06
504
505 # GFX9: v_add_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0x86,0x06]
506 0xf9,0x04,0x0a,0x02,0xf7,0x16,0x86,0x06
507
508 # GFX9: v_add_f32_sdwa v5, |-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0xa6,0x06]
509 0xf9,0x04,0x0a,0x02,0xf7,0x16,0xa6,0x06
510
511 # GFX9: v_add_f32_sdwa v5, neg(-4.0), v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0x96,0x06]
512 0xf9,0x04,0x0a,0x02,0xf7,0x16,0x96,0x06
513
514 # GFX9: v_add_f32_sdwa v5, -|-4.0|, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x0a,0x02,0xf7,0x16,0xb6,0x06]
515 0xf9,0x04,0x0a,0x02,0xf7,0x16,0xb6,0x06
516
517 # GFX9: v_add_f32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x86]
518 0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x86
519
520 # GFX9: v_add_f32_sdwa v5, v2, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xa6]
521 0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xa6
522
523 # GFX9: v_add_f32_sdwa v5, v2, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x96]
524 0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0x96
525
526 # GFX9: v_add_f32_sdwa v5, v2, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xb6]
527 0xf9,0x82,0x0b,0x02,0x02,0x16,0x06,0xb6
528
529 # GFX9: v_and_b32_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x86]
530 0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x86
531
532 # GFX9: v_and_b32_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x8e]
533 0xf9,0x82,0x0b,0x26,0x02,0x16,0x06,0x8e
534
535 # GFX9: v_exp_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x86,0x06]
536 0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x86,0x06
537
538 # GFX9: v_exp_f16_sdwa v5, |-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xa6,0x06]
539 0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xa6,0x06
540
541 # GFX9: v_exp_f16_sdwa v5, neg(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x96,0x06]
542 0xf9,0x82,0x0a,0x7e,0xc1,0x16,0x96,0x06
543
544 # GFX9: v_exp_f16_sdwa v5, -|-1| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xb6,0x06]
545 0xf9,0x82,0x0a,0x7e,0xc1,0x16,0xb6,0x06
546
547 # GFX9: v_exp_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x86,0x06]
548 0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x86,0x06
549
550 # GFX9: v_exp_f16_sdwa v5, |0.5| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xa6,0x06]
551 0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xa6,0x06
552
553 # GFX9: v_exp_f16_sdwa v5, neg(0.5) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x96,0x06]
554 0xf9,0x82,0x0a,0x7e,0xf0,0x16,0x96,0x06
555
556 # GFX9: v_exp_f16_sdwa v5, -|0.5| dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: [0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xb6,0x06]
557 0xf9,0x82,0x0a,0x7e,0xf0,0x16,0xb6,0x06
558
559 # GFX9: v_max_i16_sdwa v5, v2, -1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x86]
560 0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x86
561
562 # GFX9: v_max_i16_sdwa v5, v2, sext(-1) dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x8e]
563 0xf9,0x82,0x0b,0x60,0x02,0x16,0x06,0x8e
564
565 # GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, -1 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x86]
566 0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x86
567
568 # GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, |-1| src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xa6]
569 0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xa6
570
571 # GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, neg(-1) src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x96]
572 0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0x96
573
574 # GFX9: v_cmp_eq_f32_sdwa s[6:7], v2, -|-1| src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xb6]
575 0xf9,0x82,0x85,0x7c,0x02,0x86,0x06,0xb6
576
577 # GFX9: v_cmp_eq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0x86,0x06]
578 0xf9,0x04,0x84,0x7c,0xf7,0x86,0x86,0x06
579
580 # GFX9: v_cmp_eq_f32_sdwa s[6:7], |-4.0|, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0xa6,0x06]
581 0xf9,0x04,0x84,0x7c,0xf7,0x86,0xa6,0x06
582
583 # GFX9: v_cmp_eq_f32_sdwa s[6:7], neg(-4.0), v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0x96,0x06]
584 0xf9,0x04,0x84,0x7c,0xf7,0x86,0x96,0x06
585
586 # GFX9: v_cmp_eq_f32_sdwa s[6:7], -|-4.0|, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0xb6,0x06]
587 0xf9,0x04,0x84,0x7c,0xf7,0x86,0xb6,0x06
588
589 #===------------------------------------------------------------------------===#
490590 # OMod output modifier allowed
491591 #===------------------------------------------------------------------------===#
492592