llvm.org GIT mirror llvm / 349c278
This patch implements local-dynamic TLS model support for the 64-bit PowerPC target. This is the last of the four models, so we now have full TLS support. This is mostly a straightforward extension of the general dynamic model. I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the register copy following ADDI_TLSLD_L; otherwise everything above the ADDIS_DTPREL_HA appeared dead and was removed. As before, there are new test cases to test the assembly generation, and the relocations output during integrated assembly. The expected code gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll. There are a couple of things I think can be done more efficiently in the overall TLS code, so there will likely be a clean-up patch forthcoming; but for now I want to be sure the functionality is in place. Bill git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170003 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Schmidt 6 years ago
15 changed file(s) with 331 addition(s) and 19 deletion(s). Raw diff Collapse all Expand all
178178 VK_PPC_GAS_LO16, // symbol@l
179179 VK_PPC_TPREL16_HA, // symbol@tprel@ha
180180 VK_PPC_TPREL16_LO, // symbol@tprel@l
181 VK_PPC_DTPREL16_HA, // symbol@dtprel@ha
182 VK_PPC_DTPREL16_LO, // symbol@dtprel@l
181183 VK_PPC_TOC16_HA, // symbol@toc@ha
182184 VK_PPC_TOC16_LO, // symbol@toc@l
183185 VK_PPC_GOT_TPREL16_DS, // symbol@got@tprel
185187 VK_PPC_GOT_TLSGD16_HA, // symbol@got@tlsgd@ha
186188 VK_PPC_GOT_TLSGD16_LO, // symbol@got@tlsgd@l
187189 VK_PPC_TLSGD, // symbol@tlsgd
190 VK_PPC_GOT_TLSLD16_HA, // symbol@got@tlsld@ha
191 VK_PPC_GOT_TLSLD16_LO, // symbol@got@tlsld@l
192 VK_PPC_TLSLD, // symbol@tlsld
188193
189194 VK_Mips_GPREL,
190195 VK_Mips_GOT_CALL,
477477 R_PPC64_TOC16_DS = 63,
478478 R_PPC64_TOC16_LO_DS = 64,
479479 R_PPC64_TLS = 67,
480 R_PPC64_DTPREL16_LO = 75,
481 R_PPC64_DTPREL16_HA = 77,
480482 R_PPC64_GOT_TLSGD16_LO = 80,
481483 R_PPC64_GOT_TLSGD16_HA = 82,
484 R_PPC64_GOT_TLSLD16_LO = 84,
485 R_PPC64_GOT_TLSLD16_HA = 86,
482486 R_PPC64_GOT_TPREL16_DS = 87,
483 R_PPC64_TLSGD = 107
487 R_PPC64_TLSGD = 107,
488 R_PPC64_TLSLD = 108
484489 };
485490
486491 // ARM Specific e_flags
212212 case VK_PPC_GAS_LO16: return "l";
213213 case VK_PPC_TPREL16_HA: return "tprel@ha";
214214 case VK_PPC_TPREL16_LO: return "tprel@l";
215 case VK_PPC_DTPREL16_HA: return "dtprel@ha";
216 case VK_PPC_DTPREL16_LO: return "dtprel@l";
215217 case VK_PPC_TOC16_HA: return "toc@ha";
216218 case VK_PPC_TOC16_LO: return "toc@l";
217219 case VK_PPC_GOT_TPREL16_DS: return "got@tprel";
218220 case VK_PPC_TLS: return "tls";
219221 case VK_PPC_GOT_TLSGD16_HA: return "got@tlsgd@ha";
220222 case VK_PPC_GOT_TLSGD16_LO: return "got@tlsgd@l";
223 case VK_PPC_GOT_TLSLD16_HA: return "got@tlsld@ha";
224 case VK_PPC_GOT_TLSLD16_LO: return "got@tlsld@l";
221225 case VK_PPC_TLSGD: return "tlsgd";
226 case VK_PPC_TLSLD: return "tlsld";
222227 case VK_Mips_GPREL: return "GPREL";
223228 case VK_Mips_GOT_CALL: return "GOT_CALL";
224229 case VK_Mips_GOT16: return "GOT16";
3131 case FK_Data_8:
3232 case PPC::fixup_ppc_toc:
3333 case PPC::fixup_ppc_tlsreg:
34 case PPC::fixup_ppc_tlsgd:
34 case PPC::fixup_ppc_nofixup:
3535 return Value;
3636 case PPC::fixup_ppc_lo14:
3737 case PPC::fixup_ppc_toc16_ds:
8686 { "fixup_ppc_toc16", 16, 16, 0 },
8787 { "fixup_ppc_toc16_ds", 16, 14, 0 },
8888 { "fixup_ppc_tlsreg", 0, 0, 0 },
89 { "fixup_ppc_tlsgd", 0, 0, 0 }
89 { "fixup_ppc_nofixup", 0, 0, 0 }
9090 };
9191
9292 if (Kind < FirstTargetFixupKind)
7878 case MCSymbolRefExpr::VK_PPC_TPREL16_HA:
7979 Type = ELF::R_PPC_TPREL16_HA;
8080 break;
81 case MCSymbolRefExpr::VK_PPC_DTPREL16_HA:
82 Type = ELF::R_PPC64_DTPREL16_HA;
83 break;
8184 case MCSymbolRefExpr::VK_None:
8285 Type = ELF::R_PPC_ADDR16_HA;
8386 break;
8790 case MCSymbolRefExpr::VK_PPC_GOT_TLSGD16_HA:
8891 Type = ELF::R_PPC64_GOT_TLSGD16_HA;
8992 break;
93 case MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_HA:
94 Type = ELF::R_PPC64_GOT_TLSLD16_HA;
95 break;
9096 }
9197 break;
9298 case PPC::fixup_ppc_lo16:
95101 case MCSymbolRefExpr::VK_PPC_TPREL16_LO:
96102 Type = ELF::R_PPC_TPREL16_LO;
97103 break;
104 case MCSymbolRefExpr::VK_PPC_DTPREL16_LO:
105 Type = ELF::R_PPC64_DTPREL16_LO;
106 break;
98107 case MCSymbolRefExpr::VK_None:
99108 Type = ELF::R_PPC_ADDR16_LO;
100109 break;
104113 case MCSymbolRefExpr::VK_PPC_GOT_TLSGD16_LO:
105114 Type = ELF::R_PPC64_GOT_TLSGD16_LO;
106115 break;
116 case MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_LO:
117 Type = ELF::R_PPC64_GOT_TLSLD16_LO;
118 break;
107119 }
108120 break;
109121 case PPC::fixup_ppc_lo14:
132144 case PPC::fixup_ppc_tlsreg:
133145 Type = ELF::R_PPC64_TLS;
134146 break;
135 case PPC::fixup_ppc_tlsgd:
136 Type = ELF::R_PPC64_TLSGD;
147 case PPC::fixup_ppc_nofixup:
148 switch (Modifier) {
149 default: llvm_unreachable("Unsupported Modifier");
150 case MCSymbolRefExpr::VK_PPC_TLSGD:
151 Type = ELF::R_PPC64_TLSGD;
152 break;
153 case MCSymbolRefExpr::VK_PPC_TLSLD:
154 Type = ELF::R_PPC64_TLSLD;
155 break;
156 }
137157 break;
138158 case FK_Data_8:
139159 switch (Modifier) {
4747 /// fixup_ppc_tlsreg - Insert thread-pointer register number.
4848 fixup_ppc_tlsreg,
4949
50 /// fixup_ppc_tlsgd - Not a true fixup, but ties a symbol to a call
51 /// to __tls_get_addr for the TLS global dynamic model.
52 fixup_ppc_tlsgd,
50 /// fixup_ppc_nofixup - Not a true fixup, but ties a symbol to a call
51 /// to __tls_get_addr for the TLS general and local dynamic models.
52 fixup_ppc_nofixup,
5353
5454 // Marker
5555 LastTargetFixupKind,
8282 SmallVectorImpl &Fixups) const {
8383 uint64_t Bits = getBinaryCodeForInstr(MI, Fixups);
8484
85 // BL8_NOPELF and BLA8_NOP_ELF is both size of 8 bacause of the
85 // BL8_NOP_ELF, BLA8_NOP_ELF, etc., all have a size of 8 because of the
8686 // following 'nop'.
8787 unsigned Size = 4; // FIXME: Have Desc.getSize() return the correct value!
8888 unsigned Opcode = MI.getOpcode();
89 if (Opcode == PPC::BL8_NOP_ELF || Opcode == PPC::BLA8_NOP_ELF)
89 if (Opcode == PPC::BL8_NOP_ELF || Opcode == PPC::BLA8_NOP_ELF ||
90 Opcode == PPC::BL8_NOP_ELF_TLSGD || Opcode == PPC::BL8_NOP_ELF_TLSLD)
9091 Size = 8;
9192
9293 // Output the constant in big endian byte order.
121122 (MCFixupKind)PPC::fixup_ppc_br24));
122123
123124 // For special TLS calls, add another fixup for the symbol. Apparently
124 // BL8_NOP_ELF and BL8_NOP_ELF_TLSGD are sufficiently similar that TblGen
125 // will not generate a separate case for the latter, so this is the only
126 // way to get the extra fixup generated.
127 if (MI.getOpcode() == PPC::BL8_NOP_ELF_TLSGD) {
125 // BL8_NOP_ELF, BL8_NOP_ELF_TLSGD, and BL8_NOP_ELF_TLSLD are sufficiently
126 // similar that TblGen will not generate a separate case for the latter
127 // two, so this is the only way to get the extra fixup generated.
128 unsigned Opcode = MI.getOpcode();
129 if (Opcode == PPC::BL8_NOP_ELF_TLSGD || Opcode == PPC::BL8_NOP_ELF_TLSLD) {
128130 const MCOperand &MO2 = MI.getOperand(OpNo+1);
129131 Fixups.push_back(MCFixup::Create(0, MO2.getExpr(),
130 (MCFixupKind)PPC::fixup_ppc_tlsgd));
132 (MCFixupKind)PPC::fixup_ppc_nofixup));
131133 }
132134 return 0;
133135 }
581581 .addExpr(SymVar));
582582 return;
583583 }
584 case PPC::ADDIStlsldHA: {
585 // Transform: %Xd = ADDIStlsldHA %X2,
586 // Into: %Xd = ADDIS8 %X2, sym@got@tlsld@ha
587 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC");
588 const MachineOperand &MO = MI->getOperand(2);
589 const GlobalValue *GValue = MO.getGlobal();
590 MCSymbol *MOSymbol = Mang->getSymbol(GValue);
591 const MCExpr *SymGotTlsLD =
592 MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_HA,
593 OutContext);
594 OutStreamer.EmitInstruction(MCInstBuilder(PPC::ADDIS8)
595 .addReg(MI->getOperand(0).getReg())
596 .addReg(PPC::X2)
597 .addExpr(SymGotTlsLD));
598 return;
599 }
600 case PPC::ADDItlsldL: {
601 // Transform: %Xd = ADDItlsldL %Xs,
602 // Into: %Xd = ADDI8L %Xs, sym@got@tlsld@l
603 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC");
604 const MachineOperand &MO = MI->getOperand(2);
605 const GlobalValue *GValue = MO.getGlobal();
606 MCSymbol *MOSymbol = Mang->getSymbol(GValue);
607 const MCExpr *SymGotTlsLD =
608 MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD16_LO,
609 OutContext);
610 OutStreamer.EmitInstruction(MCInstBuilder(PPC::ADDI8L)
611 .addReg(MI->getOperand(0).getReg())
612 .addReg(MI->getOperand(1).getReg())
613 .addExpr(SymGotTlsLD));
614 return;
615 }
616 case PPC::GETtlsldADDR: {
617 // Transform: %X3 = GETtlsldADDR %X3,
618 // Into: BL8_NOP_ELF_TLSLD __tls_get_addr(sym@tlsld)
619 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC");
620
621 StringRef Name = "__tls_get_addr";
622 MCSymbol *TlsGetAddr = OutContext.GetOrCreateSymbol(Name);
623 const MCSymbolRefExpr *TlsRef =
624 MCSymbolRefExpr::Create(TlsGetAddr, MCSymbolRefExpr::VK_None, OutContext);
625 const MachineOperand &MO = MI->getOperand(2);
626 const GlobalValue *GValue = MO.getGlobal();
627 MCSymbol *MOSymbol = Mang->getSymbol(GValue);
628 const MCExpr *SymVar =
629 MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_TLSLD,
630 OutContext);
631 OutStreamer.EmitInstruction(MCInstBuilder(PPC::BL8_NOP_ELF_TLSLD)
632 .addExpr(TlsRef)
633 .addExpr(SymVar));
634 return;
635 }
636 case PPC::ADDISdtprelHA: {
637 // Transform: %Xd = ADDISdtprelHA %X3,
638 // Into: %Xd = ADDIS8 %X3, sym@dtprel@ha
639 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC");
640 const MachineOperand &MO = MI->getOperand(2);
641 const GlobalValue *GValue = MO.getGlobal();
642 MCSymbol *MOSymbol = Mang->getSymbol(GValue);
643 const MCExpr *SymDtprel =
644 MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL16_HA,
645 OutContext);
646 OutStreamer.EmitInstruction(MCInstBuilder(PPC::ADDIS8)
647 .addReg(MI->getOperand(0).getReg())
648 .addReg(PPC::X3)
649 .addExpr(SymDtprel));
650 return;
651 }
652 case PPC::ADDIdtprelL: {
653 // Transform: %Xd = ADDIdtprelL %Xs,
654 // Into: %Xd = ADDI8L %Xs, sym@dtprel@l
655 assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC");
656 const MachineOperand &MO = MI->getOperand(2);
657 const GlobalValue *GValue = MO.getGlobal();
658 MCSymbol *MOSymbol = Mang->getSymbol(GValue);
659 const MCExpr *SymDtprel =
660 MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL16_LO,
661 OutContext);
662 OutStreamer.EmitInstruction(MCInstBuilder(PPC::ADDI8L)
663 .addReg(MI->getOperand(0).getReg())
664 .addReg(MI->getOperand(1).getReg())
665 .addExpr(SymDtprel));
666 return;
667 }
584668 case PPC::MFCRpseud:
585669 case PPC::MFCR8pseud:
586670 // Transform: %R3 = MFCRpseud %CR7
13311331 return CurDAG->getMachineNode(PPC::GETtlsADDR, dl, MVT::i64,
13321332 N->getOperand(0), N->getOperand(1));
13331333 }
1334 case PPCISD::ADDIS_TLSLD_HA: {
1335 assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
1336 return CurDAG->getMachineNode(PPC::ADDIStlsldHA, dl, MVT::i64,
1337 N->getOperand(0), N->getOperand(1));
1338 }
1339 case PPCISD::ADDI_TLSLD_L: {
1340 assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
1341 return CurDAG->getMachineNode(PPC::ADDItlsldL, dl, MVT::i64,
1342 N->getOperand(0), N->getOperand(1));
1343 }
1344 case PPCISD::GET_TLSLD_ADDR: {
1345 assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
1346 return CurDAG->getMachineNode(PPC::GETtlsldADDR, dl, MVT::i64,
1347 N->getOperand(0), N->getOperand(1));
1348 }
1349 case PPCISD::ADDIS_DTPREL_HA: {
1350 assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
1351 return CurDAG->getMachineNode(PPC::ADDISdtprelHA, dl, MVT::i64,
1352 N->getOperand(0), N->getOperand(1),
1353 N->getOperand(2));
1354 }
1355 case PPCISD::ADDI_DTPREL_L: {
1356 assert (PPCSubTarget.isPPC64() && "Only supported for 64-bit ABI");
1357 return CurDAG->getMachineNode(PPC::ADDIdtprelL, dl, MVT::i64,
1358 N->getOperand(0), N->getOperand(1));
1359 }
13341360 }
13351361
13361362 return SelectCode(N);
582582 case PPCISD::ADDIS_TLSGD_HA: return "PPCISD::ADDIS_TLSGD_HA";
583583 case PPCISD::ADDI_TLSGD_L: return "PPCISD::ADDI_TLSGD_L";
584584 case PPCISD::GET_TLS_ADDR: return "PPCISD::GET_TLS_ADDR";
585 case PPCISD::ADDIS_TLSLD_HA: return "PPCISD::ADDIS_TLSLD_HA";
586 case PPCISD::ADDI_TLSLD_L: return "PPCISD::ADDI_TLSLD_L";
587 case PPCISD::GET_TLSLD_ADDR: return "PPCISD::GET_TLSLD_ADDR";
588 case PPCISD::ADDIS_DTPREL_HA: return "PPCISD::ADDIS_DTPREL_HA";
589 case PPCISD::ADDI_DTPREL_L: return "PPCISD::ADDI_DTPREL_L";
585590 }
586591 }
587592
13721377 SDValue ParmReg = DAG.getRegister(PPC::X3, MVT::i64);
13731378 SDValue TLSAddr = DAG.getNode(PPCISD::GET_TLS_ADDR, dl,
13741379 PtrVT, ParmReg, TGA);
1375 // The call to GET_TLS_ADDR really is in X3 already, but
1376 // some hacks are needed here to tie everything together.
1377 // The extra copies dissolve during subsequent transforms.
1380 // The return value from GET_TLS_ADDR really is in X3 already, but
1381 // some hacks are needed here to tie everything together. The extra
1382 // copies dissolve during subsequent transforms.
13781383 Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, TLSAddr);
13791384 return DAG.getCopyFromReg(Chain, dl, PPC::X3, PtrVT);
13801385 }
13811386
1382 llvm_unreachable("local-dynamic TLS mode is not yet supported");
1387 if (Model == TLSModel::LocalDynamic) {
1388 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
1389 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
1390 SDValue GOTEntryHi = DAG.getNode(PPCISD::ADDIS_TLSLD_HA, dl, PtrVT,
1391 GOTReg, TGA);
1392 SDValue GOTEntry = DAG.getNode(PPCISD::ADDI_TLSLD_L, dl, PtrVT,
1393 GOTEntryHi, TGA);
1394
1395 // We need a chain node, and don't have one handy. The underlying
1396 // call has no side effects, so using the function entry node
1397 // suffices.
1398 SDValue Chain = DAG.getEntryNode();
1399 Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, GOTEntry);
1400 SDValue ParmReg = DAG.getRegister(PPC::X3, MVT::i64);
1401 SDValue TLSAddr = DAG.getNode(PPCISD::GET_TLSLD_ADDR, dl,
1402 PtrVT, ParmReg, TGA);
1403 // The return value from GET_TLSLD_ADDR really is in X3 already, but
1404 // some hacks are needed here to tie everything together. The extra
1405 // copies dissolve during subsequent transforms.
1406 Chain = DAG.getCopyToReg(Chain, dl, PPC::X3, TLSAddr);
1407 SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl, PtrVT,
1408 ParmReg, TGA, Chain);
1409 return DAG.getNode(PPCISD::ADDI_DTPREL_L, dl, PtrVT, DtvOffsetHi, TGA);
1410 }
1411
1412 llvm_unreachable("Unknown TLS model!");
13831413 }
13841414
13851415 SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
204204 /// G8RC = GET_TLS_ADDR %X3, Symbol - For the general-dynamic TLS
205205 /// model, produces a call to __tls_get_addr(sym@tlsgd).
206206 GET_TLS_ADDR,
207
208 /// G8RC = ADDIS_TLSLD_HA %X2, Symbol - For the local-dynamic TLS
209 /// model, produces an ADDIS8 instruction that adds the GOT base
210 /// register to sym@got@tlsld@ha.
211 ADDIS_TLSLD_HA,
212
213 /// G8RC = ADDI_TLSLD_L G8RReg, Symbol - For the local-dynamic TLS
214 /// model, produces an ADDI8 instruction that adds G8RReg to
215 /// sym@got@tlsld@l.
216 ADDI_TLSLD_L,
217
218 /// G8RC = GET_TLSLD_ADDR %X3, Symbol - For the local-dynamic TLS
219 /// model, produces a call to __tls_get_addr(sym@tlsld).
220 GET_TLSLD_ADDR,
221
222 /// G8RC = ADDIS_DTPREL_HA %X3, Symbol, Chain - For the
223 /// local-dynamic TLS model, produces an ADDIS8 instruction
224 /// that adds X3 to sym@dtprel@ha. The Chain operand is needed
225 /// to tie this in place following a copy to %X3 from the result
226 /// of a GET_TLSLD_ADDR.
227 ADDIS_DTPREL_HA,
228
229 /// G8RC = ADDI_DTPREL_L G8RReg, Symbol - For the local-dynamic TLS
230 /// model, produces an ADDI8 instruction that adds G8RReg to
231 /// sym@got@dtprel@l.
232 ADDI_DTPREL_L,
207233
208234 /// STD_32 - This is the STD instruction for use with "32-bit" registers.
209235 STD_32 = ISD::FIRST_TARGET_MEMORY_OPCODE,
112112
113113 let isCodeGenOnly = 1 in
114114 def BL8_NOP_ELF_TLSGD : IForm_and_DForm_4_zero<18, 0, 1, 24,
115 (outs), (ins calltarget:$func, tlsgd:$sym),
116 "bl $func($sym)\n\tnop", BrB, []>;
117
118 let isCodeGenOnly = 1 in
119 def BL8_NOP_ELF_TLSLD : IForm_and_DForm_4_zero<18, 0, 1, 24,
115120 (outs), (ins calltarget:$func, tlsgd:$sym),
116121 "bl $func($sym)\n\tnop", BrB, []>;
117122
736741 [(set G8RC:$rD,
737742 (PPCgetTlsAddr G8RC:$reg, tglobaladdr:$sym))]>,
738743 isPPC64;
744 def ADDIStlsldHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
745 "#ADDIStlsldHA",
746 [(set G8RC:$rD,
747 (PPCaddisTlsldHA G8RC:$reg, tglobaladdr:$disp))]>,
748 isPPC64;
749 def ADDItlsldL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
750 "#ADDItlsldL",
751 [(set G8RC:$rD,
752 (PPCaddiTlsldL G8RC:$reg, tglobaladdr:$disp))]>,
753 isPPC64;
754 def GETtlsldADDR : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, tlsgd:$sym),
755 "#GETtlsldADDR",
756 [(set G8RC:$rD,
757 (PPCgetTlsldAddr G8RC:$reg, tglobaladdr:$sym))]>,
758 isPPC64;
759 def ADDISdtprelHA: Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolHi64:$disp),
760 "#ADDISdtprelHA",
761 [(set G8RC:$rD,
762 (PPCaddisDtprelHA G8RC:$reg, tglobaladdr:$disp))]>,
763 isPPC64;
764 def ADDIdtprelL : Pseudo<(outs G8RC:$rD), (ins G8RC:$reg, symbolLo64:$disp),
765 "#ADDIdtprelL",
766 [(set G8RC:$rD,
767 (PPCaddiDtprelL G8RC:$reg, tglobaladdr:$disp))]>,
768 isPPC64;
739769
740770 let PPC970_Unit = 2 in {
741771 // Truncating stores.
9595 def PPCaddisTlsgdHA : SDNode<"PPCISD::ADDIS_TLSGD_HA", SDTIntBinOp>;
9696 def PPCaddiTlsgdL : SDNode<"PPCISD::ADDI_TLSGD_L", SDTIntBinOp>;
9797 def PPCgetTlsAddr : SDNode<"PPCISD::GET_TLS_ADDR", SDTIntBinOp>;
98 def PPCaddisTlsldHA : SDNode<"PPCISD::ADDIS_TLSLD_HA", SDTIntBinOp>;
99 def PPCaddiTlsldL : SDNode<"PPCISD::ADDI_TLSLD_L", SDTIntBinOp>;
100 def PPCgetTlsldAddr : SDNode<"PPCISD::GET_TLSLD_ADDR", SDTIntBinOp>;
101 def PPCaddisDtprelHA : SDNode<"PPCISD::ADDIS_DTPREL_HA", SDTIntBinOp,
102 [SDNPHasChain]>;
103 def PPCaddiDtprelL : SDNode<"PPCISD::ADDI_DTPREL_L", SDTIntBinOp>;
98104
99105 def PPCvperm : SDNode<"PPCISD::VPERM", SDT_PPCvperm, []>;
100106
0 ; RUN: llc -mcpu=pwr7 -O0 -filetype=obj -relocation-model=pic %s -o - | \
1 ; RUN: elf-dump --dump-section-data | FileCheck %s
2
3 ; Test correct relocation generation for thread-local storage using
4 ; the local dynamic model.
5
6 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
7 target triple = "powerpc64-unknown-linux-gnu"
8
9 @a = hidden thread_local global i32 0, align 4
10
11 define signext i32 @main() nounwind {
12 entry:
13 %retval = alloca i32, align 4
14 store i32 0, i32* %retval
15 %0 = load i32* @a, align 4
16 ret i32 %0
17 }
18
19 ; Verify generation of R_PPC64_GOT_TLSGD16_HA, R_PPC64_GOT_TLSGD16_LO,
20 ; and R_PPC64_TLSGD for accessing external variable a, and R_PPC64_REL24
21 ; for the call to __tls_get_addr.
22 ;
23 ; CHECK: '.rela.text'
24 ; CHECK: Relocation 0
25 ; CHECK-NEXT: 'r_offset'
26 ; CHECK-NEXT: 'r_sym', 0x[[SYM1:[0-9a-f]+]]
27 ; CHECK-NEXT: 'r_type', 0x00000056
28 ; CHECK: Relocation 1
29 ; CHECK-NEXT: 'r_offset'
30 ; CHECK-NEXT: 'r_sym', 0x[[SYM1]]
31 ; CHECK-NEXT: 'r_type', 0x00000054
32 ; CHECK: Relocation 2
33 ; CHECK-NEXT: 'r_offset'
34 ; CHECK-NEXT: 'r_sym', 0x[[SYM1]]
35 ; CHECK-NEXT: 'r_type', 0x0000006c
36 ; CHECK: Relocation 3
37 ; CHECK-NEXT: 'r_offset'
38 ; CHECK-NEXT: 'r_sym', 0x{{[0-9a-f]+}}
39 ; CHECK-NEXT: 'r_type', 0x0000000a
40 ; CHECK: Relocation 4
41 ; CHECK-NEXT: 'r_offset'
42 ; CHECK-NEXT: 'r_sym', 0x[[SYM1]]
43 ; CHECK-NEXT: 'r_type', 0x0000004d
44 ; CHECK: Relocation 5
45 ; CHECK-NEXT: 'r_offset'
46 ; CHECK-NEXT: 'r_sym', 0x[[SYM1]]
47 ; CHECK-NEXT: 'r_type', 0x0000004b
48
0 ; RUN: llc -mcpu=pwr7 -O0 -relocation-model=pic < %s | FileCheck %s
1
2 ; Test correct assembly code generation for thread-local storage using
3 ; the local dynamic model.
4
5 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
6 target triple = "powerpc64-unknown-linux-gnu"
7
8 @a = hidden thread_local global i32 0, align 4
9
10 define signext i32 @main() nounwind {
11 entry:
12 %retval = alloca i32, align 4
13 store i32 0, i32* %retval
14 %0 = load i32* @a, align 4
15 ret i32 %0
16 }
17
18 ; CHECK: addis [[REG:[0-9]+]], 2, a@got@tlsld@ha
19 ; CHECK-NEXT: addi 3, [[REG]], a@got@tlsld@l
20 ; CHECK-NEXT: bl __tls_get_addr(a@tlsld)
21 ; CHECK-NEXT: nop
22 ; CHECK-NEXT: addis [[REG2:[0-9]+]], 3, a@dtprel@ha
23 ; CHECK-NEXT: addi {{[0-9]+}}, [[REG2]], a@dtprel@l