llvm.org GIT mirror llvm / 3457506
Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201507 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 6 years ago
2 changed file(s) with 27 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
11661166
11671167 switch (base) {
11681168 case 0x5:
1169 case 0xd:
11691170 switch (modFromModRM(insn->modRM)) {
11701171 case 0x0:
11711172 insn->eaDisplacement = EA_DISP_32;
11731174 break;
11741175 case 0x1:
11751176 insn->eaDisplacement = EA_DISP_8;
1176 insn->sibBase = (insn->addressSize == 4 ?
1177 SIB_BASE_EBP : SIB_BASE_RBP);
1177 insn->sibBase = (SIBBase)(sibBaseBase + base);
11781178 break;
11791179 case 0x2:
11801180 insn->eaDisplacement = EA_DISP_32;
1181 insn->sibBase = (insn->addressSize == 4 ?
1182 SIB_BASE_EBP : SIB_BASE_RBP);
1181 insn->sibBase = (SIBBase)(sibBaseBase + base);
11831182 break;
11841183 case 0x3:
11851184 debug("Cannot have Mod = 0b11 and a SIB byte");
240240
241241 # CHECK: pextrw $3, %xmm3, (%rax)
242242 0x66 0x0f 0x3a 0x15 0x18 0x03
243
244 # CHECK: $0, 305419896(,%r8)
245 0x43 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00
246
247 # CHECK: $0, 305419896(%r13,%r8)
248 0x43 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00
249
250 # CHECK: $0, 305419896(,%r8)
251 0x42 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00
252
253 # CHECK: $0, 305419896(%rbp,%r8)
254 0x42 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00
255
256 # CHECK: $0, 305419896(,%r12)
257 0x42 0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00
258
259 # CHECK: $0, 305419896(%rbp,%r12)
260 0x42 0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00
261
262 # CHECK: $0, 305419896
263 0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00
264
265 # CHECK: $0, 305419896(%rbp)
266 0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00