llvm.org GIT mirror llvm / 34448ae
[ms-inline asm] Add support in the X86AsmPrinter for printing memory references in the Intel syntax. The MC layer supports emitting in the Intel syntax, but this would require the inline assembly MachineInstr to be lowered to an MCInst before emission. This is potential future work, but for now emitting directly from the MachineInstr suffices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165173 91177308-0d34-0410-b5e6-96231b3b80d8 Chad Rosier 8 years ago
3 changed file(s) with 70 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
364364 printLeaMemReference(MI, Op, O, Modifier);
365365 }
366366
367 void X86AsmPrinter::printIntelMemReference(const MachineInstr *MI, unsigned Op,
368 raw_ostream &O, const char *Modifier,
369 unsigned AsmVariant){
370 const MachineOperand &BaseReg = MI->getOperand(Op);
371 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
372 const MachineOperand &IndexReg = MI->getOperand(Op+2);
373 const MachineOperand &DispSpec = MI->getOperand(Op+3);
374 const MachineOperand &SegReg = MI->getOperand(Op+4);
375
376 // If this has a segment register, print it.
377 if (SegReg.getReg()) {
378 printOperand(MI, Op+4, O, Modifier, AsmVariant);
379 O << ':';
380 }
381
382 O << '[';
383
384 bool NeedPlus = false;
385 if (BaseReg.getReg()) {
386 printOperand(MI, Op, O, Modifier, AsmVariant);
387 NeedPlus = true;
388 }
389
390 if (IndexReg.getReg()) {
391 if (NeedPlus) O << " + ";
392 if (ScaleVal != 1)
393 O << ScaleVal << '*';
394 printOperand(MI, Op+2, O, Modifier, AsmVariant);
395 NeedPlus = true;
396 }
397
398 assert (DispSpec.isImm() && "Displacement is not an immediate!");
399 int64_t DispVal = DispSpec.getImm();
400 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
401 if (NeedPlus) {
402 if (DispVal > 0)
403 O << " + ";
404 else {
405 O << " - ";
406 DispVal = -DispVal;
407 }
408 }
409 O << DispVal;
410 }
411 O << ']';
412 }
413
367414 void X86AsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op,
368415 raw_ostream &O) {
369416 O << *MF->getPICBaseSymbol() << '\n';
480527 unsigned OpNo, unsigned AsmVariant,
481528 const char *ExtraCode,
482529 raw_ostream &O) {
530 if (AsmVariant) {
531 printIntelMemReference(MI, OpNo, O);
532 return false;
533 }
534
483535 if (ExtraCode && ExtraCode[0]) {
484536 if (ExtraCode[1] != 0) return true; // Unknown modifier.
485537
6969
7070 void printPICLabel(const MachineInstr *MI, unsigned Op, raw_ostream &O);
7171
72 void printIntelMemReference(const MachineInstr *MI, unsigned Op,
73 raw_ostream &O, const char *Modifier=NULL,
74 unsigned AsmVariant = 1);
75
7276 bool runOnMachineFunction(MachineFunction &F);
7377
7478 void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
2323 ; CHECK: .att_syntax
2424 ; CHECK: {{## InlineAsm End|#NO_APP}}
2525 }
26
27 define void @t3(i32 %V) nounwind {
28 entry:
29 %V.addr = alloca i32, align 4
30 store i32 %V, i32* %V.addr, align 4
31 call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %V.addr) nounwind
32 ret void
33 ; CHECK: t3
34 ; CHECK: {{## InlineAsm Start|#APP}}
35 ; CHECK: .intel_syntax
36 ; CHECK: mov eax, DWORD PTR {{[[esp]}}
37 ; CHECK: .att_syntax
38 ; CHECK: {{## InlineAsm End|#NO_APP}}
39 }