llvm.org GIT mirror llvm / 334dc1f
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 12 years ago
21 changed file(s) with 159 addition(s) and 577 deletion(s). Raw diff Collapse all Expand all
1616 #define LLVM_CODEGEN_MACHINEINSTR_H
1717
1818 #include "llvm/CodeGen/MachineOperand.h"
19 #include "llvm/CodeGen/MemOperand.h"
2019
2120 namespace llvm {
2221
3534 // are determined at construction time).
3635
3736 std::vector Operands; // the operands
38 std::vector MemOperands; // information on memory references
3937 MachineInstr *Prev, *Next; // Links for MBB's intrusive list.
4038 MachineBasicBlock *Parent; // Pointer to the owning basic block.
4139
9593 ///
9694 unsigned getNumExplicitOperands() const;
9795
98 /// Access to memory operands of the instruction
99 unsigned getNumMemOperands() const { return MemOperands.size(); }
100
101 const MemOperand& getMemOperand(unsigned i) const {
102 assert(i < getNumMemOperands() && "getMemOperand() out of range!");
103 return MemOperands[i];
104 }
105 MemOperand& getMemOperand(unsigned i) {
106 assert(i < getNumMemOperands() && "getMemOperand() out of range!");
107 return MemOperands[i];
108 }
109
11096 /// isIdenticalTo - Return true if this instruction is identical to (same
11197 /// opcode and same operands as) the specified instruction.
11298 bool isIdenticalTo(const MachineInstr *Other) const {
209195 ///
210196 void RemoveOperand(unsigned i);
211197
212 /// addMemOperand - Add a MemOperand to the machine instruction, referencing
213 /// arbitrary storage.
214 void addMemOperand(const MemOperand &MO) {
215 MemOperands.push_back(MO);
216 }
217
218198 private:
219199 /// getRegInfo - If this instruction is embedded into a MachineFunction,
220200 /// return the MachineRegisterInfo object for the current function, otherwise
8282 MI->addOperand(MachineOperand::CreateES(FnName, 0));
8383 return *this;
8484 }
85
86 /// addMemOperand - Add a memory operand to the machine instruction.
87 const MachineInstrBuilder &addMemOperand(const MemOperand &MO) const {
88 MI->addMemOperand(MO);
89 return *this;
90 }
9185 };
9286
9387 /// BuildMI - Builder interface. Specify how to create the initial instruction
None //===-- llvm/CodeGen/MemOperand.h - MemOperand class ------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the declaration of the MemOperand class, which is a
10 // description of a memory reference. It is used to help track dependencies
11 // in the backend.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_CODEGEN_MEMOPERAND_H
16 #define LLVM_CODEGEN_MEMOPERAND_H
17
18 namespace llvm {
19
20 class Value;
21
22 //===----------------------------------------------------------------------===//
23 /// MemOperand - A description of a memory reference used in the backend.
24 /// Instead of holding a StoreInst or LoadInst, this class holds the address
25 /// Value of the reference along with a byte size and offset. This allows it
26 /// to describe lowered loads and stores. Also, the special PseudoSourceValue
27 /// objects can be used to represent loads and stores to memory locations
28 /// that aren't explicit in the regular LLVM IR.
29 ///
30 class MemOperand {
31 const Value *V;
32 unsigned int Flags;
33 int Offset;
34 int Size;
35 unsigned int Alignment;
36
37 public:
38 /// Flags values. These may be or'd together.
39 enum MemOperandFlags {
40 /// The memory access reads data.
41 MOLoad = 1,
42 /// The memory access writes data.
43 MOStore = 2,
44 /// The memory access is volatile.
45 MOVolatile = 4
46 };
47
48 /// MemOperand - Construct an MemOperand object with the specified
49 /// address Value, flags, offset, size, and alignment.
50 MemOperand(const Value *v, unsigned int f, int o, int s, unsigned int a)
51 : V(v), Flags(f), Offset(o), Size(s), Alignment(a) {}
52
53 /// getValue - Return the base address of the memory access.
54 /// Special values are PseudoSourceValue::FPRel, PseudoSourceValue::SPRel,
55 /// and the other PseudoSourceValue members which indicate references to
56 /// frame/stack pointer relative references and other special references.
57 const Value *getValue() const { return V; }
58
59 /// getFlags - Return the raw flags of the source value, \see MemOperandFlags.
60 unsigned int getFlags() const { return Flags; }
61
62 /// getOffset - For normal values, this is a byte offset added to the base
63 /// address. For PseudoSourceValue::FPRel values, this is the FrameIndex
64 /// number.
65 int getOffset() const { return Offset; }
66
67 /// getSize - Return the size in bytes of the memory reference.
68 int getSize() const { return Size; }
69
70 /// getAlignment - Return the minimum known alignment in bytes of the
71 /// memory reference.
72 unsigned int getAlignment() const { return Alignment; }
73
74 bool isLoad() const { return Flags & MOLoad; }
75 bool isStore() const { return Flags & MOStore; }
76 bool isVolatile() const { return Flags & MOVolatile; }
77 };
78
79 } // End llvm namespace
80
81 #endif
None //===-- llvm/CodeGen/PseudoSourceValue.h ------------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the declaration of the PseudoSourceValue class.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef LLVM_CODEGEN_PSEUDOSOURCEVALUE_H
14 #define LLVM_CODEGEN_PSEUDOSOURCEVALUE_H
15
16 #include "llvm/Value.h"
17
18 namespace llvm {
19 /// PseudoSourceValue - Special value supplied for machine level alias
20 /// analysis. It indicates that the a memory access references the functions
21 /// stack frame (e.g., a spill slot), below the stack frame (e.g., argument
22 /// space), or constant pool.
23 class PseudoSourceValue : public Value {
24 const char *name;
25 public:
26 explicit PseudoSourceValue(const char *_name);
27
28 virtual void print(std::ostream &OS) const;
29
30 /// classof - Methods for support type inquiry through isa, cast, and
31 /// dyn_cast:
32 ///
33 static inline bool classof(const PseudoSourceValue *) { return true; }
34 static inline bool classof(const Value *V) {
35 return V->getValueID() == PseudoSourceValueVal;
36 }
37
38 /// A pseudo source value referencing to the stack frame of a function,
39 /// e.g., a spill slot.
40 static const PseudoSourceValue FPRel;
41
42 /// A source value referencing the area below the stack frame of a function,
43 /// e.g., the argument space.
44 static const PseudoSourceValue SPRel;
45
46 /// A source value referencing the global offset table (or something the
47 /// like).
48 static const PseudoSourceValue GPRel;
49
50 /// A source value relative to some kind of thread id/pointer.
51 static const PseudoSourceValue TPRel;
52
53 /// A SV referencing the constant pool
54 static const PseudoSourceValue CPRel;
55
56 /// A SV referencing the jump table
57 static const PseudoSourceValue JTRel;
58 };
59 } // End llvm namespace
60
61 #endif
278278 if (isa(Node)) return true;
279279 if (isa(Node)) return true;
280280 if (isa(Node)) return true;
281 if (isa(Node)) return true;
282281 return false;
283282 }
284283
312311 /// (which do not go into the machine instrs.)
313312 static unsigned CountResults(SDNode *Node);
314313
315 /// CountOperands - The inputs to target nodes have any actual inputs first,
316 /// followed by optional memory operands chain operand, then flag operands.
317 /// Compute the number of actual operands that will go into the machine
318 /// instr.
314 /// CountOperands The inputs to target nodes have any actual inputs first,
315 /// followed by an optional chain operand, then flag operands. Compute the
316 /// number of actual operands that will go into the machine instr.
319317 static unsigned CountOperands(SDNode *Node);
320
321 /// CountMemOperands - Find the index of the last MemOperandSDNode
322 static unsigned CountMemOperands(SDNode *Node);
323318
324319 /// EmitNode - Generate machine code for an node and needed dependencies.
325320 /// VRBaseMap contains, for each already emitted node, the first virtual
361356 void AddOperand(MachineInstr *MI, SDOperand Op, unsigned IIOpNum,
362357 const TargetInstrDesc *II,
363358 DenseMap &VRBaseMap);
364
365 void AddMemOperand(MachineInstr *MI, const MemOperand &MO);
366359 };
367360
368361 /// createBURRListDAGScheduler - This creates a bottom up register usage
380380 SDOperand getIndexedStore(SDOperand OrigStoe, SDOperand Base,
381381 SDOperand Offset, ISD::MemIndexedMode AM);
382382
383 // getSrcValue - Construct a node to track a Value* through the backend.
384 SDOperand getSrcValue(const Value *v);
385
386 // getMemOperand - Construct a node to track a memory reference
387 // through the backend.
388 SDOperand getMemOperand(const MemOperand &MO);
383 // getSrcValue - construct a node to track a Value* through the backend
384 SDOperand getSrcValue(const Value* I, int offset = 0);
389385
390386 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
391387 /// specified operands. If the resultant node already exists in the DAG,
2424 #include "llvm/ADT/iterator"
2525 #include "llvm/ADT/APFloat.h"
2626 #include "llvm/CodeGen/ValueTypes.h"
27 #include "llvm/CodeGen/MemOperand.h"
2827 #include "llvm/Support/DataTypes.h"
2928 #include
3029
536535 // pointer, and a SRCVALUE.
537536 VAEND, VASTART,
538537
539 // SRCVALUE - This is a node type that holds a Value* that is used to
540 // make reference to a value in the LLVM IR.
538 // SRCVALUE - This corresponds to a Value*, and is used to associate memory
539 // locations with their value. This allows one use alias analysis
540 // information in the backend.
541541 SRCVALUE,
542
543 // MEMOPERAND - This is a node that contains a MemOperand which records
544 // information about a memory reference. This is used to make AliasAnalysis
545 // queries from the backend.
546 MEMOPERAND,
547542
548543 // PCMARKER - This corresponds to the pcmarker intrinsic.
549544 PCMARKER,
13891384
13901385 class SrcValueSDNode : public SDNode {
13911386 const Value *V;
1387 int offset;
13921388 virtual void ANCHOR(); // Out-of-line virtual method to give class a home.
13931389 protected:
13941390 friend class SelectionDAG;
1395 /// Create a SrcValue for a general value.
1396 explicit SrcValueSDNode(const Value *v)
1397 : SDNode(ISD::SRCVALUE, getSDVTList(MVT::Other)), V(v) {}
1398
1399 public:
1400 /// getValue - return the contained Value.
1391 SrcValueSDNode(const Value* v, int o)
1392 : SDNode(ISD::SRCVALUE, getSDVTList(MVT::Other)), V(v), offset(o) {
1393 }
1394
1395 public:
14011396 const Value *getValue() const { return V; }
1397 int getOffset() const { return offset; }
14021398
14031399 static bool classof(const SrcValueSDNode *) { return true; }
14041400 static bool classof(const SDNode *N) {
14051401 return N->getOpcode() == ISD::SRCVALUE;
1406 }
1407 };
1408
1409
1410 /// MemOperandSDNode - An SDNode that holds a MemOperand. This is
1411 /// used to represent a reference to memory after ISD::LOAD
1412 /// and ISD::STORE have been lowered.
1413 ///
1414 class MemOperandSDNode : public SDNode {
1415 virtual void ANCHOR(); // Out-of-line virtual method to give class a home.
1416 protected:
1417 friend class SelectionDAG;
1418 /// Create a MemOperand node
1419 explicit MemOperandSDNode(MemOperand mo)
1420 : SDNode(ISD::MEMOPERAND, getSDVTList(MVT::Other)), MO(mo) {}
1421
1422 public:
1423 /// MO - The contained MemOperand.
1424 const MemOperand MO;
1425
1426 static bool classof(const MemOperandSDNode *) { return true; }
1427 static bool classof(const SDNode *N) {
1428 return N->getOpcode() == ISD::MEMOPERAND;
14291402 }
14301403 };
14311404
15791552 /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
15801553 bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
15811554
1582 /// getMemOperand - Return a MemOperand object describing the memory
1583 /// reference performed by this load or store.
1584 MemOperand getMemOperand() const;
1585
15861555 static bool classof(const LSBaseSDNode *N) { return true; }
15871556 static bool classof(const SDNode *N) {
15881557 return N->getOpcode() == ISD::LOAD ||
187187 ConstantPointerNullVal, // This is an instance of ConstantPointerNull
188188 InlineAsmVal, // This is an instance of InlineAsm
189189 InstructionVal, // This is an instance of Instruction
190 PseudoSourceValueVal, // This is an instance of PseudoSourceValue
191190
192191 // Markers:
193192 ConstantFirstVal = FunctionVal,
1414 #include "llvm/Value.h"
1515 #include "llvm/CodeGen/MachineFunction.h"
1616 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/CodeGen/PseudoSourceValue.h"
18 #include "llvm/CodeGen/SelectionDAGNodes.h"
1917 #include "llvm/Target/TargetMachine.h"
2018 #include "llvm/Target/TargetInstrInfo.h"
2119 #include "llvm/Target/TargetInstrDesc.h"
293291 TID = &MI.getDesc();
294292 NumImplicitOps = MI.NumImplicitOps;
295293 Operands.reserve(MI.getNumOperands());
296 MemOperands = MI.MemOperands;
297294
298295 // Add operands
299296 for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
627624 OS << ",";
628625 OS << " ";
629626 getOperand(i).print(OS, TM);
630 }
631
632 if (getNumMemOperands() > 0) {
633 OS << ", SV:";
634 for (unsigned i = 0; i < getNumMemOperands(); i++) {
635 const MemOperand &MRO = getMemOperand(i);
636 const Value *V = MRO.getValue();
637
638 assert(V && "SV missing.");
639 assert((MRO.isLoad() || MRO.isStore()) &&
640 "SV has to be a load, store or both.");
641
642 if (MRO.isVolatile())
643 OS << "Volatile";
644 if (MRO.isLoad())
645 OS << "LD";
646 if (MRO.isStore())
647 OS << "ST";
648
649 OS << MRO.getSize();
650
651 if (!V->getName().empty())
652 OS << "[" << V->getName() << " + " << MRO.getOffset() << "]";
653 else if (isa(V))
654 OS << "[" << *V << " + " << MRO.getOffset() << "]";
655 else
656 OS << "[" << V << " + " << MRO.getOffset() << "]";
657 }
658627 }
659628
660629 OS << "\n";
None //===-- llvm/CodeGen/PseudoSourceValue.cpp ----------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the PseudoSourceValue class.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "llvm/CodeGen/PseudoSourceValue.h"
14 #include "llvm/DerivedTypes.h"
15
16 namespace llvm {
17 const PseudoSourceValue PseudoSourceValue::FPRel("FPRel");
18 const PseudoSourceValue PseudoSourceValue::SPRel("SPRel");
19 const PseudoSourceValue PseudoSourceValue::GPRel("GPRel");
20 const PseudoSourceValue PseudoSourceValue::TPRel("TPRel");
21 const PseudoSourceValue PseudoSourceValue::CPRel("CPRel");
22 const PseudoSourceValue PseudoSourceValue::JTRel("JTRel");
23
24 PseudoSourceValue::PseudoSourceValue(const char *_name) :
25 Value(PointerType::getUnqual(Type::Int8Ty), PseudoSourceValueVal),
26 name(_name) {
27 }
28
29 void PseudoSourceValue::print(std::ostream &OS) const {
30 OS << name;
31 }
32 }
1515 #include "llvm/CodeGen/MachineFrameInfo.h"
1616 #include "llvm/CodeGen/MachineJumpTableInfo.h"
1717 #include "llvm/CodeGen/MachineModuleInfo.h"
18 #include "llvm/CodeGen/PseudoSourceValue.h"
1918 #include "llvm/Target/TargetFrameInfo.h"
2019 #include "llvm/Target/TargetLowering.h"
2120 #include "llvm/Target/TargetData.h"
509508 SDOperand CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy());
510509 if (Extend) {
511510 return DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(),
512 CPIdx, &PseudoSourceValue::CPRel, 0, MVT::f32);
511 CPIdx, NULL, 0, MVT::f32);
513512 } else {
514 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
515 &PseudoSourceValue::CPRel, 0);
513 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0);
516514 }
517515 }
518516
797795 case ISD::TargetExternalSymbol:
798796 case ISD::VALUETYPE:
799797 case ISD::SRCVALUE:
800 case ISD::MEMOPERAND:
801798 case ISD::STRING:
802799 case ISD::CONDCODE:
803800 // Primitives must all be legal.
13051302 MVT::ValueType IdxVT = Tmp3.getValueType();
13061303 MVT::ValueType PtrVT = TLI.getPointerTy();
13071304 SDOperand StackPtr = DAG.CreateStackTemporary(VT);
1308
1309 FrameIndexSDNode *StackPtrFI = dyn_cast(StackPtr.Val);
1310 assert(StackPtrFI);
1311 int SPFI = StackPtrFI->getIndex();
1312
13131305 // Store the vector.
1314 SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr,
1315 &PseudoSourceValue::FPRel, SPFI);
1306 SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr, NULL, 0);
13161307
13171308 // Truncate or zero extend offset to target pointer type.
13181309 unsigned CastOpc = (IdxVT > PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
13221313 Tmp3 = DAG.getNode(ISD::MUL, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT));
13231314 SDOperand StackPtr2 = DAG.getNode(ISD::ADD, IdxVT, Tmp3, StackPtr);
13241315 // Store the scalar value.
1325 Ch = DAG.getStore(Ch, Tmp2, StackPtr2, &PseudoSourceValue::FPRel, SPFI);
1316 Ch = DAG.getStore(Ch, Tmp2, StackPtr2, NULL, 0);
13261317 // Load the updated vector.
1327 Result = DAG.getLoad(VT, Ch, StackPtr, &PseudoSourceValue::FPRel, SPFI);
1318 Result = DAG.getLoad(VT, Ch, StackPtr, NULL, 0);
13281319 break;
13291320 }
13301321 }
16731664 SDOperand LD;
16741665 switch (EntrySize) {
16751666 default: assert(0 && "Size of jump table not supported yet."); break;
1676 case 4: LD = DAG.getLoad(MVT::i32, Chain, Addr,
1677 &PseudoSourceValue::JTRel, 0); break;
1678 case 8: LD = DAG.getLoad(MVT::i64, Chain, Addr,
1679 &PseudoSourceValue::JTRel, 0); break;
1667 case 4: LD = DAG.getLoad(MVT::i32, Chain, Addr, NULL, 0); break;
1668 case 8: LD = DAG.getLoad(MVT::i64, Chain, Addr, NULL, 0); break;
16801669 }
16811670
16821671 Addr = LD;
32373226 }
32383227 break;
32393228 case TargetLowering::Expand: {
3240 const Value *V = cast(Node->getOperand(2))->getValue();
3241 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, V, 0);
3229 SrcValueSDNode *SV = cast(Node->getOperand(2));
3230 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2,
3231 SV->getValue(), SV->getOffset());
32423232 // Increment the pointer, VAList, to the next vaarg
32433233 Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList,
32443234 DAG.getConstant(MVT::getSizeInBits(VT)/8,
32453235 TLI.getPointerTy()));
32463236 // Store the incremented VAList to the legalized pointer
3247 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, V, 0);
3237 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, SV->getValue(),
3238 SV->getOffset());
32483239 // Load the actual argument out of the pointer VAList
32493240 Result = DAG.getLoad(VT, Tmp3, VAList, NULL, 0);
32503241 Tmp1 = LegalizeOp(Result.getValue(1));
32803271 case TargetLowering::Expand:
32813272 // This defaults to loading a pointer from the input and storing it to the
32823273 // output, returning the chain.
3283 const Value *VD = cast(Node->getOperand(3))->getValue();
3284 const Value *VS = cast(Node->getOperand(4))->getValue();
3285 Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, VD, 0);
3286 Result = DAG.getStore(Tmp4.getValue(1), Tmp4, Tmp2, VS, 0);
3274 SrcValueSDNode *SVD = cast(Node->getOperand(3));
3275 SrcValueSDNode *SVS = cast(Node->getOperand(4));
3276 Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, SVD->getValue(),
3277 SVD->getOffset());
3278 Result = DAG.getStore(Tmp4.getValue(1), Tmp4, Tmp2, SVS->getValue(),
3279 SVS->getOffset());
32873280 break;
32883281 }
32893282 break;
42784271 Tmp3 = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2));
42794272 Result = TLI.CustomPromoteOperation(Tmp3, DAG);
42804273 } else {
4281 const Value *V = cast(Node->getOperand(2))->getValue();
4282 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, V, 0);
4274 SrcValueSDNode *SV = cast(Node->getOperand(2));
4275 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2,
4276 SV->getValue(), SV->getOffset());
42834277 // Increment the pointer, VAList, to the next vaarg
42844278 Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList,
42854279 DAG.getConstant(MVT::getSizeInBits(VT)/8,
42864280 TLI.getPointerTy()));
42874281 // Store the incremented VAList to the legalized pointer
4288 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, V, 0);
4282 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, SV->getValue(),
4283 SV->getOffset());
42894284 // Load the actual argument out of the pointer VAList
42904285 Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp3, VAList, NULL, 0, VT);
42914286 }
47414736 // Create the stack frame object.
47424737 SDOperand FIPtr = DAG.CreateStackTemporary(SlotVT);
47434738
4744 FrameIndexSDNode *StackPtrFI = dyn_cast(FIPtr);
4745 assert(StackPtrFI);
4746 int SPFI = StackPtrFI->getIndex();
4747
47484739 unsigned SrcSize = MVT::getSizeInBits(SrcOp.getValueType());
47494740 unsigned SlotSize = MVT::getSizeInBits(SlotVT);
47504741 unsigned DestSize = MVT::getSizeInBits(DestVT);
47534744 // later than DestVT.
47544745 SDOperand Store;
47554746 if (SrcSize > SlotSize)
4756 Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr,
4757 &PseudoSourceValue::FPRel, SPFI, SlotVT);
4747 Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0,SlotVT);
47584748 else {
47594749 assert(SrcSize == SlotSize && "Invalid store");
4760 Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr,
4761 &PseudoSourceValue::FPRel, SPFI, SlotVT);
4750 Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0);
47624751 }
47634752
47644753 // Result is a load from the stack slot.
47734762 // Create a vector sized/aligned stack slot, store the value to element #0,
47744763 // then load the whole vector back out.
47754764 SDOperand StackPtr = DAG.CreateStackTemporary(Node->getValueType(0));
4776
4777 FrameIndexSDNode *StackPtrFI = dyn_cast(StackPtr);
4778 assert(StackPtrFI);
4779 int SPFI = StackPtrFI->getIndex();
4780
47814765 SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Node->getOperand(0), StackPtr,
4782 &PseudoSourceValue::FPRel, SPFI);
4783 return DAG.getLoad(Node->getValueType(0), Ch, StackPtr,
4784 &PseudoSourceValue::FPRel, SPFI);
4766 NULL, 0);
4767 return DAG.getLoad(Node->getValueType(0), Ch, StackPtr, NULL, 0);
47854768 }
47864769
47874770
48454828 }
48464829 Constant *CP = ConstantVector::get(CV);
48474830 SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
4848 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4849 &PseudoSourceValue::CPRel, 0);
4831 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0);
48504832 }
48514833
48524834 if (SplatValue.Val) { // Splat of one value?
51885170 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
51895171 SDOperand FudgeInReg;
51905172 if (DestTy == MVT::f32)
5191 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
5192 &PseudoSourceValue::CPRel, 0);
5173 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
51935174 else if (MVT::getSizeInBits(DestTy) > MVT::getSizeInBits(MVT::f32))
51945175 // FIXME: Avoid the extend by construction the right constantpool?
51955176 FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestTy, DAG.getEntryNode(),
5196 CPIdx, &PseudoSourceValue::CPRel, 0,
5197 MVT::f32);
5177 CPIdx, NULL, 0, MVT::f32);
51985178 else
51995179 assert(0 && "Unexpected conversion");
52005180
53365316 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
53375317 SDOperand FudgeInReg;
53385318 if (DestVT == MVT::f32)
5339 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
5340 &PseudoSourceValue::CPRel, 0);
5319 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
53415320 else {
53425321 FudgeInReg = LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, DestVT,
53435322 DAG.getEntryNode(), CPIdx,
5344 &PseudoSourceValue::CPRel, 0,
5345 MVT::f32));
5323 NULL, 0, MVT::f32));
53465324 }
53475325
53485326 return DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg);
67516729 // Lower to a store/load so that it can be split.
67526730 // FIXME: this could be improved probably.
67536731 SDOperand Ptr = DAG.CreateStackTemporary(InOp.getValueType());
6754 FrameIndexSDNode *FI = dyn_cast(Ptr.Val);
6755 assert(FI && "Expecting CreateStackTemporary to return a frame index.\n");
67566732
67576733 SDOperand St = DAG.getStore(DAG.getEntryNode(),
6758 InOp, Ptr,
6759 &PseudoSourceValue::FPRel, FI->getIndex());
6760 InOp = DAG.getLoad(Op.getValueType(), St, Ptr,
6761 &PseudoSourceValue::FPRel, FI->getIndex());
6734 InOp, Ptr, NULL, 0);
6735 InOp = DAG.getLoad(Op.getValueType(), St, Ptr, NULL, 0);
67626736 }
67636737 // Split the vector and convert each of the pieces now.
67646738 SplitVectorOp(InOp, Lo, Hi);
276276 return N;
277277 }
278278
279 /// CountOperands - The inputs to target nodes have any actual inputs first,
280 /// followed by optional memory operands chain operand, then flag operands.
281 /// Compute the number of actual operands that will go into the machine istr.
279 /// CountOperands The inputs to target nodes have any actual inputs first,
280 /// followed by an optional chain operand, then flag operands. Compute the
281 /// number of actual operands that will go into the machine instr.
282282 unsigned ScheduleDAG::CountOperands(SDNode *Node) {
283 unsigned N = Node->getNumOperands();
284 while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
285 --N;
286 if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
287 --N; // Ignore chain if it exists.
288 while (N && MemOperandSDNode::classof(Node->getOperand(N - 1).Val))
289 --N; // Ignore MemOperand nodes
290 return N;
291 }
292
293 /// CountMemOperands - Find the index of the last MemOperandSDNode operand
294 unsigned ScheduleDAG::CountMemOperands(SDNode *Node) {
295283 unsigned N = Node->getNumOperands();
296284 while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
297285 --N;
528516
529517 }
530518
531 void ScheduleDAG::AddMemOperand(MachineInstr *MI, const MemOperand &MO) {
532 MI->addMemOperand(MO);
533 }
534
535519 // Returns the Register Class of a subregister
536520 static const TargetRegisterClass *getSubRegisterRegClass(
537521 const TargetRegisterClass *TRC,
690674
691675 unsigned NumResults = CountResults(Node);
692676 unsigned NodeOperands = CountOperands(Node);
693 unsigned NodeMemOperands = CountMemOperands(Node);
694677 unsigned NumMIOperands = NodeOperands + NumResults;
695678 bool HasPhysRegOuts = (NumResults > II.getNumDefs()) &&
696679 II.getImplicitDefs() != 0;
712695 // instruction as appropriate.
713696 for (unsigned i = 0; i != NodeOperands; ++i)
714697 AddOperand(MI, Node->getOperand(i), i+II.getNumDefs(), &II, VRBaseMap);
715
716 // Emit all of the memory operands of this instruction
717 for (unsigned i = NodeOperands; i != NodeMemOperands; ++i)
718 AddMemOperand(MI, cast(Node->getOperand(i))->MO);
719698
720699 // Commute node if it has been determined to be profitable.
721700 if (CommuteSet.count(Node)) {
777756 case ISD::EntryToken: // fall thru
778757 case ISD::TokenFactor:
779758 case ISD::LABEL:
780 case ISD::SRCVALUE:
781759 break;
782760 case ISD::CopyToReg: {
783761 unsigned InReg;
1919 #include "llvm/CodeGen/MachineBasicBlock.h"
2020 #include "llvm/CodeGen/MachineConstantPool.h"
2121 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/PseudoSourceValue.h"
2322 #include "llvm/Support/MathExtras.h"
2423 #include "llvm/Target/MRegisterInfo.h"
2524 #include "llvm/Target/TargetData.h"
358357 case ISD::Register:
359358 ID.AddInteger(cast(N)->getReg());
360359 break;
361 case ISD::SRCVALUE:
362 ID.AddPointer(cast(N)->getValue());
363 break;
364 case ISD::MEMOPERAND: {
365 const MemOperand &MO = cast(N)->MO;
366 ID.AddPointer(MO.getValue());
367 ID.AddInteger(MO.getFlags());
368 ID.AddInteger(MO.getOffset());
369 ID.AddInteger(MO.getSize());
370 ID.AddInteger(MO.getAlignment());
360 case ISD::SRCVALUE: {
361 SrcValueSDNode *SV = cast(N);
362 ID.AddPointer(SV->getValue());
363 ID.AddInteger(SV->getOffset());
371364 break;
372365 }
373366 case ISD::FrameIndex:
938931 return SDOperand(N, 0);
939932 }
940933
941 SDOperand SelectionDAG::getSrcValue(const Value *V) {
934 SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
942935 assert((!V || isa(V->getType())) &&
943936 "SrcValue is not a pointer?");
944937
945938 FoldingSetNodeID ID;
946939 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
947940 ID.AddPointer(V);
948
941 ID.AddInteger(Offset);
949942 void *IP = 0;
950943 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
951944 return SDOperand(E, 0);
952
953 SDNode *N = new SrcValueSDNode(V);
954 CSEMap.InsertNode(N, IP);
955 AllNodes.push_back(N);
956 return SDOperand(N, 0);
957 }
958
959 SDOperand SelectionDAG::getMemOperand(const MemOperand &MO) {
960 const Value *v = MO.getValue();
961 assert((!v || isa(v->getType())) &&
962 "SrcValue is not a pointer?");
963
964 FoldingSetNodeID ID;
965 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
966 ID.AddPointer(v);
967 ID.AddInteger(MO.getFlags());
968 ID.AddInteger(MO.getOffset());
969 ID.AddInteger(MO.getSize());
970 ID.AddInteger(MO.getAlignment());
971
972 void *IP = 0;
973 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
974 return SDOperand(E, 0);
975
976 SDNode *N = new MemOperandSDNode(MO);
945 SDNode *N = new SrcValueSDNode(V, Offset);
977946 CSEMap.InsertNode(N, IP);
978947 AllNodes.push_back(N);
979948 return SDOperand(N, 0);
34633432 void ConstantPoolSDNode::ANCHOR() {}
34643433 void BasicBlockSDNode::ANCHOR() {}
34653434 void SrcValueSDNode::ANCHOR() {}
3466 void MemOperandSDNode::ANCHOR() {}
34673435 void RegisterSDNode::ANCHOR() {}
34683436 void ExternalSymbolSDNode::ANCHOR() {}
34693437 void CondCodeSDNode::ANCHOR() {}
34883456 TheGlobal = const_cast(GA);
34893457 }
34903458
3491 /// getMemOperand - Return a MemOperand object describing the memory
3492 /// reference performed by this load or store.
3493 MemOperand LSBaseSDNode::getMemOperand() const {
3494 int Size = (MVT::getSizeInBits(getMemoryVT()) + 7) >> 3;
3495 int Flags =
3496 getOpcode() == ISD::LOAD ? MemOperand::MOLoad : MemOperand::MOStore;
3497 if (IsVolatile) Flags |= MemOperand::MOVolatile;
3498
3499 // Check if the load references a frame index, and does not have
3500 // an SV attached.
3501 const FrameIndexSDNode *FI =
3502 dyn_cast(getBasePtr().Val);
3503 if (!getSrcValue() && FI)
3504 return MemOperand(&PseudoSourceValue::FPRel, Flags,
3505 FI->getIndex(), Size, Alignment);
3506 else
3507 return MemOperand(getSrcValue(), Flags,
3508 getSrcValueOffset(), Size, Alignment);
3509 }
3510
35113459 /// Profile - Gather unique data for the node.
35123460 ///
35133461 void SDNode::Profile(FoldingSetNodeID &ID) {
37003648 case ISD::PCMARKER: return "PCMarker";
37013649 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
37023650 case ISD::SRCVALUE: return "SrcValue";
3703 case ISD::MEMOPERAND: return "MemOperand";
37043651 case ISD::EntryToken: return "EntryToken";
37053652 case ISD::TokenFactor: return "TokenFactor";
37063653 case ISD::AssertSext: return "AssertSext";
40053952 cerr << "'" << ES->getSymbol() << "'";
40063953 } else if (const SrcValueSDNode *M = dyn_cast(this)) {
40073954 if (M->getValue())
4008 cerr << "<" << M->getValue() << ">";
3955 cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
40093956 else
4010 cerr << "";
4011 } else if (const MemOperandSDNode *M = dyn_cast(this)) {
4012 if (M->MO.getValue())
4013 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
4014 else
4015 cerr << "MO.getOffset() << ">";
3957 cerr << "getOffset() << ">";
40163958 } else if (const VTSDNode *N = dyn_cast(this)) {
40173959 cerr << ":" << MVT::getValueTypeString(N->getVT());
40183960 } else if (const LoadSDNode *LD = dyn_cast(this)) {
141141 Op += "'" + std::string(ES->getSymbol()) + "'";
142142 } else if (const SrcValueSDNode *M = dyn_cast(Node)) {
143143 if (M->getValue())
144 Op += "<" + M->getValue()->getName() + ">";
144 Op += "<" + M->getValue()->getName() + ":" + itostr(M->getOffset()) + ">";
145145 else
146 Op += "";
147 } else if (const MemOperandSDNode *M = dyn_cast(Node)) {
148 if (M->MO.getValue())
149 Op += "<" + M->MO.getValue()->getName() + ":" + itostr(M->MO.getOffset()) + ">";
150 else
151 Op += "MO.getOffset()) + ">";
146 Op += "getOffset()) + ">";
152147 } else if (const VTSDNode *N = dyn_cast(Node)) {
153148 Op = Op + " VT=" + MVT::getValueTypeString(N->getVT());
154149 } else if (const StringSDNode *N = dyn_cast(Node)) {
910910 // memory location argument.
911911 MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
912912 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
913 const Value *SV = cast(Op.getOperand(2))->getValue();
914 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
913 SrcValueSDNode *SV = cast(Op.getOperand(2));
914 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV->getValue(),
915 SV->getOffset());
915916 }
916917
917918 static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
490490 case ISD::VAARG: {
491491 SDOperand Chain = Op.getOperand(0);
492492 SDOperand VAListP = Op.getOperand(1);
493 const Value *VAListS = cast(Op.getOperand(2))->getValue();
493 SrcValueSDNode *VAListS = cast(Op.getOperand(2));
494494
495 SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS, 0);
495 SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS->getValue(),
496 VAListS->getOffset());
496497 SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
497498 DAG.getConstant(8, MVT::i64));
498499 SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1),
525526 SDOperand Chain = Op.getOperand(0);
526527 SDOperand DestP = Op.getOperand(1);
527528 SDOperand SrcP = Op.getOperand(2);
528 const Value *DestS = cast(Op.getOperand(3))->getValue();
529 const Value *SrcS = cast(Op.getOperand(4))->getValue();
529 SrcValueSDNode *DestS = cast(Op.getOperand(3));
530 SrcValueSDNode *SrcS = cast(Op.getOperand(4));
530531
531 SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, SrcS, 0);
532 SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS, 0);
532 SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP,
533 SrcS->getValue(), SrcS->getOffset());
534 SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS->getValue(),
535 DestS->getOffset());
533536 SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP,
534537 DAG.getConstant(8, MVT::i64));
535538 Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, NULL,0, MVT::i32);
540543 case ISD::VASTART: {
541544 SDOperand Chain = Op.getOperand(0);
542545 SDOperand VAListP = Op.getOperand(1);
543 const Value *VAListS = cast(Op.getOperand(2))->getValue();
546 SrcValueSDNode *VAListS = cast(Op.getOperand(2));
544547
545548 // vastart stores the address of the VarArgsBase and VarArgsOffset
546549 SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64);
547 SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS, 0);
550 SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS->getValue(),
551 VAListS->getOffset());
548552 SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
549553 DAG.getConstant(8, MVT::i64));
550554 return DAG.getTruncStore(S1, DAG.getConstant(VarArgsOffset, MVT::i64),
580580 }
581581 case ISD::VAARG: {
582582 MVT::ValueType VT = getPointerTy();
583 const Value *SV = cast(Op.getOperand(2))->getValue();
583 SrcValueSDNode *SV = cast(Op.getOperand(2));
584584 SDOperand VAList = DAG.getLoad(VT, Op.getOperand(0), Op.getOperand(1),
585 SV, 0);
585 SV->getValue(), SV->getOffset());
586586 // Increment the pointer, VAList, to the next vaarg
587587 SDOperand VAIncr = DAG.getNode(ISD::ADD, VT, VAList,
588588 DAG.getConstant(MVT::getSizeInBits(VT)/8,
589589 VT));
590590 // Store the incremented VAList to the legalized pointer
591591 VAIncr = DAG.getStore(VAList.getValue(1), VAIncr,
592 Op.getOperand(1), SV, 0);
592 Op.getOperand(1), SV->getValue(), SV->getOffset());
593593 // Load the actual argument out of the pointer VAList
594594 return DAG.getLoad(Op.getValueType(), VAIncr, VAList, NULL, 0);
595595 }
597597 // vastart just stores the address of the VarArgsFrameIndex slot into the
598598 // memory location argument.
599599 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64);
600 const Value *SV = cast(Op.getOperand(2))->getValue();
601 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
600 SrcValueSDNode *SV = cast(Op.getOperand(2));
601 return DAG.getStore(Op.getOperand(0), FR,
602 Op.getOperand(1), SV->getValue(), SV->getOffset());
602603 }
603604 // Frame & Return address. Currently unimplemented
604605 case ISD::RETURNADDR: break;
2323 #include "llvm/CodeGen/MachineFunction.h"
2424 #include "llvm/CodeGen/MachineInstrBuilder.h"
2525 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
2726 #include "llvm/CodeGen/SelectionDAG.h"
2827 #include "llvm/Constants.h"
2928 #include "llvm/Function.h"
11721171 // memory location argument.
11731172 MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
11741173 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
1175 const Value *SV = cast(Op.getOperand(2))->getValue();
1176 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
1174 SrcValueSDNode *SV = cast(Op.getOperand(2));
1175 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV->getValue(),
1176 SV->getOffset());
11771177 }
11781178
11791179 // For ELF 32 ABI we follow the layout of the va_list struct.
12071207
12081208 MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
12091209
1210 SDOperand StackOffsetFI = DAG.getFrameIndex(VarArgsStackOffset, PtrVT);
1210 SDOperand StackOffset = DAG.getFrameIndex(VarArgsStackOffset, PtrVT);
12111211 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
12121212
1213 uint64_t FrameOffset = MVT::getSizeInBits(PtrVT)/8;
1214 SDOperand ConstFrameOffset = DAG.getConstant(FrameOffset, PtrVT);
1215
1216 uint64_t StackOffset = MVT::getSizeInBits(PtrVT)/8 - 1;
1217 SDOperand ConstStackOffset = DAG.getConstant(StackOffset, PtrVT);
1218
1219 uint64_t FPROffset = 1;
1220 SDOperand ConstFPROffset = DAG.getConstant(FPROffset, PtrVT);
1221
1222 const Value *SV = cast(Op.getOperand(2))->getValue();
1213 SDOperand ConstFrameOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8,
1214 PtrVT);
1215 SDOperand ConstStackOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8 - 1,
1216 PtrVT);
1217 SDOperand ConstFPROffset = DAG.getConstant(1, PtrVT);
1218
1219 SrcValueSDNode *SV = cast(Op.getOperand(2));
12231220
12241221 // Store first byte : number of int regs
12251222 SDOperand firstStore = DAG.getStore(Op.getOperand(0), ArgGPR,
1226 Op.getOperand(1), SV, 0);
1227 uint64_t nextOffset = FPROffset;
1223 Op.getOperand(1), SV->getValue(),
1224 SV->getOffset());
12281225 SDOperand nextPtr = DAG.getNode(ISD::ADD, PtrVT, Op.getOperand(1),
12291226 ConstFPROffset);
12301227
12311228 // Store second byte : number of float regs
1232 SDOperand secondStore =
1233 DAG.getStore(firstStore, ArgFPR, nextPtr, SV, nextOffset);
1234 nextOffset += StackOffset;
1229 SDOperand secondStore = DAG.getStore(firstStore, ArgFPR, nextPtr,
1230 SV->getValue(), SV->getOffset());
12351231 nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstStackOffset);
12361232
12371233 // Store second word : arguments given on stack
1238 SDOperand thirdStore =
1239 DAG.getStore(secondStore, StackOffsetFI, nextPtr, SV, nextOffset);
1240 nextOffset += FrameOffset;
1234 SDOperand thirdStore = DAG.getStore(secondStore, StackOffset, nextPtr,
1235 SV->getValue(), SV->getOffset());
12411236 nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstFrameOffset);
12421237
12431238 // Store third word : arguments given in registers
1244 return DAG.getStore(thirdStore, FR, nextPtr, SV, nextOffset);
1239 return DAG.getStore(thirdStore, FR, nextPtr, SV->getValue(),
1240 SV->getOffset());
12451241
12461242 }
12471243
21992195 Op.getOperand(0));
22002196
22012197 // STD the extended value into the stack slot.
2202 MemOperand MO(&PseudoSourceValue::FPRel,
2203 MemOperand::MOStore, FrameIdx, 8, 8);
22042198 SDOperand Store = DAG.getNode(PPCISD::STD_32, MVT::Other,
22052199 DAG.getEntryNode(), Ext64, FIdx,
2206 DAG.getMemOperand(MO));
2200 DAG.getSrcValue(NULL));
22072201 // Load the value as a double.
22082202 SDOperand Ld = DAG.getLoad(MVT::f64, Store, FIdx, NULL, 0);
22092203
33023296 std::vector VTs;
33033297 VTs.push_back(MVT::i32);
33043298 VTs.push_back(MVT::Other);
3305 SDOperand MO = DAG.getMemOperand(LD->getMemOperand());
3299 SDOperand SV = DAG.getSrcValue(LD->getSrcValue(), LD->getSrcValueOffset());
33063300 SDOperand Ops[] = {
33073301 LD->getChain(), // Chain
33083302 LD->getBasePtr(), // Ptr
3309 MO, // MemOperand
3303 SV, // SrcValue
33103304 DAG.getValueType(N->getValueType(0)) // VT
33113305 };
33123306 SDOperand BSLoad = DAG.getNode(PPCISD::LBRX, VTs, Ops, 4);
803803 SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32,
804804 DAG.getRegister(SP::I6, MVT::i32),
805805 DAG.getConstant(VarArgsFrameOffset, MVT::i32));
806 const Value *SV = cast(Op.getOperand(2))->getValue();
807 return DAG.getStore(Op.getOperand(0), Offset, Op.getOperand(1), SV, 0);
806 SrcValueSDNode *SV = cast(Op.getOperand(2));
807 return DAG.getStore(Op.getOperand(0), Offset,
808 Op.getOperand(1), SV->getValue(), SV->getOffset());
808809 }
809810 case ISD::VAARG: {
810811 SDNode *Node = Op.Val;
811812 MVT::ValueType VT = Node->getValueType(0);
812813 SDOperand InChain = Node->getOperand(0);
813814 SDOperand VAListPtr = Node->getOperand(1);
814 const Value *SV = cast(Node->getOperand(2))->getValue();
815 SDOperand VAList = DAG.getLoad(getPointerTy(), InChain, VAListPtr, SV, 0);
815 SrcValueSDNode *SV = cast(Node->getOperand(2));
816 SDOperand VAList = DAG.getLoad(getPointerTy(), InChain, VAListPtr,
817 SV->getValue(), SV->getOffset());
816818 // Increment the pointer, VAList, to the next vaarg
817819 SDOperand NextPtr = DAG.getNode(ISD::ADD, getPointerTy(), VAList,
818820 DAG.getConstant(MVT::getSizeInBits(VT)/8,
819821 getPointerTy()));
820822 // Store the incremented VAList to the legalized pointer
821823 InChain = DAG.getStore(VAList.getValue(1), NextPtr,
822 VAListPtr, SV, 0);
824 VAListPtr, SV->getValue(), SV->getOffset());
823825 // Load the actual argument out of the pointer VAList, unless this is an
824826 // f64 load.
825827 if (VT != MVT::f64) {
3030 #include "llvm/CodeGen/MachineFunction.h"
3131 #include "llvm/CodeGen/MachineInstrBuilder.h"
3232 #include "llvm/CodeGen/MachineRegisterInfo.h"
33 #include "llvm/CodeGen/PseudoSourceValue.h"
3433 #include "llvm/CodeGen/SelectionDAG.h"
3534 #include "llvm/Support/MathExtras.h"
3635 #include "llvm/Support/Debug.h"
10881087 SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
10891088 if (isByVal)
10901089 return FIN;
1091 return DAG.getLoad(VA.getValVT(), Root, FIN,
1092 &PseudoSourceValue::FPRel, FI);
1090 return DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0);
10931091 }
10941092
10951093 SDOperand
12171215 unsigned VReg = AddLiveIn(MF, GPR64ArgRegs[NumIntRegs],
12181216 X86::GR64RegisterClass);
12191217 SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64);
1220 SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
1221 &PseudoSourceValue::FPRel,
1222 RegSaveFrameIndex);
1218 SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
12231219 MemOps.push_back(Store);
12241220 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
12251221 DAG.getIntPtrConstant(8));
12321228 unsigned VReg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs],
12331229 X86::VR128RegisterClass);
12341230 SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32);
1235 SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
1236 &PseudoSourceValue::FPRel,
1237 RegSaveFrameIndex);
1231 SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
12381232 MemOps.push_back(Store);
12391233 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
12401234 DAG.getIntPtrConstant(16));
15631557 Flags, DAG));
15641558 } else {
15651559 // Store relative to framepointer.
1566 MemOpChains2.push_back(DAG.getStore(Chain, Source, FIN,
1567 &PseudoSourceValue::FPRel, FI));
1560 MemOpChains2.push_back(DAG.getStore(Chain, Source, FIN, NULL, 0));
15681561 }
15691562 }
15701563 }
37903783 // the GV offset field. Platform check is inside GVRequiresExtraLoad() call
37913784 // The same applies for external symbols during PIC codegen
37923785 if (Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false))
3793 Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result,
3794 &PseudoSourceValue::GPRel, 0);
3786 Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result, NULL, 0);
37953787
37963788 return Result;
37973789 }
38493841 SDOperand Offset = DAG.getNode(X86ISD::Wrapper, PtrVT, TGA);
38503842
38513843 if (GA->getGlobal()->isDeclaration()) // initial exec TLS model
3852 Offset = DAG.getLoad(PtrVT, DAG.getEntryNode(), Offset,
3853 &PseudoSourceValue::TPRel, 0);
3844 Offset = DAG.getLoad(PtrVT, DAG.getEntryNode(), Offset, NULL, 0);
38543845
38553846 // The address of the thread local variable is the add of the thread
38563847 // pointer with the offset of the variable.
39823973 int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
39833974 SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
39843975 SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0),
3985 StackSlot, &PseudoSourceValue::FPRel, SSFI);
3976 StackSlot, NULL, 0);
39863977
39873978 // These are really Legal; caller falls through into that case.
39883979 if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType()))
40234014 Ops.push_back(DAG.getValueType(Op.getValueType()));
40244015 Ops.push_back(InFlag);
40254016 Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size());
4026 Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot,
4027 &PseudoSourceValue::FPRel, SSFI);
4017 Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot, NULL, 0);
40284018 }
40294019
40304020 return Result;
40624052 SDOperand Value = Op.getOperand(0);
40634053 if (isScalarFPTypeInSSEReg(Op.getOperand(0).getValueType())) {
40644054 assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!");
4065 Chain = DAG.getStore(Chain, Value, StackSlot,
4066 &PseudoSourceValue::FPRel, SSFI);
4055 Chain = DAG.getStore(Chain, Value, StackSlot, NULL, 0);
40674056 SDVTList Tys = DAG.getVTList(Op.getOperand(0).getValueType(), MVT::Other);
40684057 SDOperand Ops[] = {
40694058 Chain, StackSlot, DAG.getValueType(Op.getOperand(0).getValueType())
41224111 }
41234112 Constant *C = ConstantVector::get(CV);
41244113 SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4125 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4126 &PseudoSourceValue::CPRel, 0,
4114 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
41274115 false, 16);
41284116 return DAG.getNode(X86ISD::FAND, VT, Op.getOperand(0), Mask);
41294117 }
41514139 }
41524140 Constant *C = ConstantVector::get(CV);
41534141 SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4154 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4155 &PseudoSourceValue::CPRel, 0,
4142 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
41564143 false, 16);
41574144 if (MVT::isVector(VT)) {
41584145 return DAG.getNode(ISD::BIT_CONVERT, VT,
42004187 }
42014188 Constant *C = ConstantVector::get(CV);
42024189 SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4203 SDOperand Mask1 = DAG.getLoad(SrcVT, DAG.getEntryNode(), CPIdx,
4204 &PseudoSourceValue::CPRel, 0,
4190 SDOperand Mask1 = DAG.getLoad(SrcVT, DAG.getEntryNode(), CPIdx, NULL, 0,
42054191 false, 16);
42064192 SDOperand SignBit = DAG.getNode(X86ISD::FAND, SrcVT, Op1, Mask1);
42074193
42294215 }
42304216 C = ConstantVector::get(CV);
42314217 CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4232 SDOperand Mask2 = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4233 &PseudoSourceValue::CPRel, 0,
4218 SDOperand Mask2 = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
42344219 false, 16);
42354220 SDOperand Val = DAG.getNode(X86ISD::FAND, VT, Op0, Mask2);
42364221
46864671 }
46874672
46884673 SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) {
4689 const Value *SV = cast(Op.getOperand(2))->getValue();
4674 SrcValueSDNode *SV = cast(Op.getOperand(2));
46904675
46914676 if (!Subtarget->is64Bit()) {
46924677 // vastart just stores the address of the VarArgsFrameIndex slot into the
46934678 // memory location argument.
46944679 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
4695 return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV, 0);
4680 return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV->getValue(),
4681 SV->getOffset());
46964682 }
46974683
46984684 // __va_list_tag:
47054691 // Store gp_offset
47064692 SDOperand Store = DAG.getStore(Op.getOperand(0),
47074693 DAG.getConstant(VarArgsGPOffset, MVT::i32),
4708 FIN, SV, 0);
4694 FIN, SV->getValue(), SV->getOffset());
47094695 MemOps.push_back(Store);
47104696
47114697 // Store fp_offset
47124698 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(4));
47134699 Store = DAG.getStore(Op.getOperand(0),
47144700 DAG.getConstant(VarArgsFPOffset, MVT::i32),
4715 FIN, SV, 0);
4701 FIN, SV->getValue(), SV->getOffset());
47164702 MemOps.push_back(Store);
47174703
47184704 // Store ptr to overflow_arg_area
47194705 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(4));
47204706 SDOperand OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
4721 Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV, 0);
4707 Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV->getValue(),
4708 SV->getOffset());
47224709 MemOps.push_back(Store);
47234710
47244711 // Store ptr to reg_save_area.
47254712 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(8));
47264713 SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy());
4727 Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV, 0);
4714 Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV->getValue(),
4715 SV->getOffset());
47284716 MemOps.push_back(Store);
47294717 return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size());
47304718 }
47344722 SDOperand Chain = Op.getOperand(0);
47354723 SDOperand DstPtr = Op.getOperand(1);
47364724 SDOperand SrcPtr = Op.getOperand(2);
4737 const Value *DstSV = cast(Op.getOperand(3))->getValue();
4738 const Value *SrcSV = cast(Op.getOperand(4))->getValue();
4739
4740 SrcPtr = DAG.getLoad(getPointerTy(), Chain, SrcPtr, SrcSV, 0);
4725 SrcValueSDNode *DstSV = cast(Op.getOperand(3));
4726 SrcValueSDNode *SrcSV = cast(Op.getOperand(4));
4727
4728 SrcPtr = DAG.getLoad(getPointerTy(), Chain, SrcPtr,
4729 SrcSV->getValue(), SrcSV->getOffset());
47414730 Chain = SrcPtr.getValue(1);
47424731 for (unsigned i = 0; i < 3; ++i) {
4743 SDOperand Val = DAG.getLoad(MVT::i64, Chain, SrcPtr, SrcSV, 0);
4732 SDOperand Val = DAG.getLoad(MVT::i64, Chain, SrcPtr,
4733 SrcSV->getValue(), SrcSV->getOffset());
47444734 Chain = Val.getValue(1);
4745 Chain = DAG.getStore(Chain, Val, DstPtr, DstSV, 0);
4735 Chain = DAG.getStore(Chain, Val, DstPtr,
4736 DstSV->getValue(), DstSV->getOffset());
47464737 if (i == 2)
47474738 break;
47484739 SrcPtr = DAG.getNode(ISD::ADD, getPointerTy(), SrcPtr,
49224913 SDOperand FPtr = Op.getOperand(2); // nested function
49234914 SDOperand Nest = Op.getOperand(3); // 'nest' parameter value
49244915
4925 const Value *TrmpAddr = cast(Op.getOperand(4))->getValue();
4916 SrcValueSDNode *TrmpSV = cast(Op.getOperand(4));
49264917
49274918 const X86InstrInfo *TII =
49284919 ((X86TargetMachine&)getTargetMachine()).getInstrInfo();
49464937 unsigned OpCode = ((MOV64ri | N86R11) << 8) | REX_WB; // movabsq r11
49474938 SDOperand Addr = Trmp;
49484939 OutChains[0] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
4949 TrmpAddr, 0);
4940 TrmpSV->getValue(), TrmpSV->getOffset());
49504941
49514942 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(2, MVT::i64));
4952 OutChains[1] = DAG.getStore(Root, FPtr, Addr, TrmpAddr, 2, false, 2);
4943 OutChains[1] = DAG.getStore(Root, FPtr, Addr, TrmpSV->getValue(),
4944 TrmpSV->getOffset() + 2, false, 2);
49534945
49544946 // Load the 'nest' parameter value into R10.
49554947 // R10 is specified in X86CallingConv.td
49564948 OpCode = ((MOV64ri | N86R10) << 8) | REX_WB; // movabsq r10
49574949 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(10, MVT::i64));
49584950 OutChains[2] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
4959 TrmpAddr, 10);
4951 TrmpSV->getValue(), TrmpSV->getOffset() + 10);
49604952
49614953 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(12, MVT::i64));
4962 OutChains[3] = DAG.getStore(Root, Nest, Addr, TrmpAddr, 12, false, 2);
4954 OutChains[3] = DAG.getStore(Root, Nest, Addr, TrmpSV->getValue(),
4955 TrmpSV->getOffset() + 12, false, 2);
49634956
49644957 // Jump to the nested function.
49654958 OpCode = (JMP64r << 8) | REX_WB; // jmpq *...
49664959 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(20, MVT::i64));
49674960 OutChains[4] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
4968 TrmpAddr, 20);
4961 TrmpSV->getValue(), TrmpSV->getOffset() + 20);
49694962
49704963 unsigned char ModRM = N86R11 | (4 << 3) | (3 << 6); // ...r11
49714964 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(22, MVT::i64));
49724965 OutChains[5] = DAG.getStore(Root, DAG.getConstant(ModRM, MVT::i8), Addr,
4973 TrmpAddr, 22);
4966 TrmpSV->getValue(), TrmpSV->getOffset() + 22);
49744967
49754968 SDOperand Ops[] =
49764969 { Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 6) };
50285021 const unsigned char N86Reg =
50295022 ((X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
50305023 OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
5031 Trmp, TrmpAddr, 0);
5024 Trmp, TrmpSV->getValue(), TrmpSV->getOffset());
50325025
50335026 Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(1, MVT::i32));
5034 OutChains[1] = DAG.getStore(Root, Nest, Addr, TrmpAddr, 1, false, 1);
5027 OutChains[1] = DAG.getStore(Root, Nest, Addr, TrmpSV->getValue(),
5028 TrmpSV->getOffset() + 1, false, 1);
50355029
50365030 const unsigned char JMP = TII->getBaseOpcodeFor(X86::JMP);
50375031 Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(5, MVT::i32));
50385032 OutChains[2] = DAG.getStore(Root, DAG.getConstant(JMP, MVT::i8), Addr,
5039 TrmpAddr, 5, false, 1);
5033 TrmpSV->getValue() + 5, TrmpSV->getOffset());
50405034
50415035 Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(6, MVT::i32));
5042 OutChains[3] = DAG.getStore(Root, Disp, Addr, TrmpAddr, 6, false, 1);
5036 OutChains[3] = DAG.getStore(Root, Disp, Addr, TrmpSV->getValue(),
5037 TrmpSV->getOffset() + 6, false, 1);
50435038
50445039 SDOperand Ops[] =
50455040 { Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 4) };
310310 std::vector > OrigChains;
311311 std::set Duplicates;
312312
313 /// LSI - Load/Store information.
314 /// Save loads/stores matched by a pattern, and generate a MemOperandSDNode
315 /// for each memory access. This facilitates the use of AliasAnalysis in
316 /// the backend.
317 std::vector LSI;
318
319313 /// GeneratedCode - This is the buffer that we emit code to. The first int
320314 /// indicates whether this is an exit predicate (something that should be
321315 /// tested, and if true, the match fails) [when 1], or normal code to emit
376370 void EmitMatchCode(TreePatternNode *N, TreePatternNode *P,
377371 const std::string &RootName, const std::string &ChainSuffix,
378372 bool &FoundChain) {
379
380 // Save loads/stores matched by a pattern.
381 if (!N->isLeaf() && N->getName().empty() &&
382 ((N->getOperator()->getName() == "ld") ||
383 (N->getOperator()->getName() == "st") ||
384 (N->getOperator()->getName() == "ist"))) {
385 LSI.push_back(RootName);
386 }
387
388373 bool isRoot = (P == NULL);
389374 // Emit instruction predicates. Each predicate is just a string for now.
390375 if (isRoot) {
947932 }
948933 }
949934
950 // Generate MemOperandSDNodes nodes for each memory accesses covered by this
951 // pattern.
952 if (isRoot) {
953 std::vector::const_iterator mi, mie;
954 for (mi = LSI.begin(), mie = LSI.end(); mi != mie; ++mi) {
955 emitCode("SDOperand LSI_" + *mi + " = "
956 "CurDAG->getMemOperand(cast(" +
957 *mi + ")->getMemOperand());");
958 AllOps.push_back("LSI_" + *mi);
959 }
960 }
961
962935 // Emit all the chain and CopyToReg stuff.
963936 bool ChainEmitted = NodeHasChain;
964937 if (NodeHasChain)