llvm.org GIT mirror llvm / 32c2910
Merging r230147: ------------------------------------------------------------------------ r230147 | Matthew.Arsenault | 2015-02-21 16:29:04 -0500 (Sat, 21 Feb 2015) | 2 lines R600/SI: Don't crash when getting immediate operand size ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@236022 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 5 years ago
1 changed file(s) with 21 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
246246 /// the register class of its machine operand.
247247 /// to infer the correct register class base on the other operands.
248248 const TargetRegisterClass *getOpRegClass(const MachineInstr &MI,
249 unsigned OpNo) const;\
249 unsigned OpNo) const;
250
251 /// \brief Return the size in bytes of the operand OpNo on the given
252 // instruction opcode.
253 unsigned getOpSize(uint16_t Opcode, unsigned OpNo) const {
254 const MCOperandInfo &OpInfo = get(Opcode).OpInfo[OpNo];
255
256 if (OpInfo.RegClass == -1) {
257 // If this is an immediate operand, this must be a 32-bit literal.
258 assert(OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE);
259 return 4;
260 }
261
262 return RI.getRegClass(OpInfo.RegClass)->getSize();
263 }
264
265 /// \brief This form should usually be preferred since it handles operands
266 /// with unknown register classes.
267 unsigned getOpSize(const MachineInstr &MI, unsigned OpNo) const {
268 return getOpRegClass(MI, OpNo)->getSize();
269 }
250270
251271 /// \returns true if it is legal for the operand at index \p OpNo
252272 /// to read a VGPR.