llvm.org GIT mirror llvm / 31ab6e3
Eliminate uses of %prcontext. - I'd appreciate it if someone else eyeballs my changes to make sure I captured the intent of the test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81083 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Dunbar 11 years ago
16 changed file(s) with 67 addition(s) and 27 deletion(s). Raw diff Collapse all Expand all
None ; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -mattr=-sse41,-sse3,+sse2 | \
1 ; RUN: %prcontext {14} 2 | grep {(%ebp)} | count 1
0 ; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic \
1 ; RUN: -disable-fp-elim -mattr=-sse41,-sse3,+sse2 < %s | \
2 ; RUN: FileCheck %s
23 ; rdar://6808032
4
5 ; CHECK: pextrw $14
6 ; CHECK-NEXT: movzbl
7 ; CHECK-NEXT: (%ebp)
8 ; CHECK-NEXT: pinsrw
39
410 define void @update(i8** %args_list) nounwind {
511 entry:
None ; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext {setne %al} 1 | grep test | count 2
0 ; RUN: llc -march=x86-64 < %s | FileCheck %s
11 ; PR4814
22
33 ; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional
55 ; move with control flow may clobber EFLAGS (e.g., with xor, to set the
66 ; register to zero).
77
8 ; The prcontext usage above is a little awkward; the important part is that
9 ; there's a test before the setne.
8 ; The test is a little awkward; the important part is that there's a test before the
9 ; setne.
1010
1111 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
1212
3333 %4 = volatile load i8* @g_100, align 1 ; [#uses=0]
3434 br label %func_4.exit.i
3535
36 ; CHECK: _g_100
37 ; CHECK: testb
38 ; CHECK: testb %al, %al
39 ; CHECK-NEXT: setne %al
40 ; CHECK-NEXT: testb
41
3642 func_4.exit.i: ; preds = %bb.i.i.i, %entry
3743 %.not.i = xor i1 %2, true ; [#uses=1]
3844 %brmerge.i = or i1 %3, %.not.i ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=x86 | %prcontext jmp 1 | grep align
0 ; RUN: llc -march=x86 < %s | FileCheck %s
11
22 @Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
33 @Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]
1111 %tmp15 = add i32 %r, -1 ; [#uses=1]
1212 %tmp.16 = zext i32 %tmp15 to i64 ; [#uses=2]
1313 br label %bb
14 ; CHECK: jmp
15 ; CHECK-NEXT: align
1416
1517 bb: ; preds = %bb1, %entry
1618 %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb1 ] ; [#uses=3]
None ; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext test 1 | grep j
0 ; RUN: llc -march=x86-64 < %s | FileCheck %s
11 ; PR3701
22
33 define i64 @t(i64* %arg) nounwind {
66 ;
77 %2 = icmp eq i64* null, %arg ; [#uses=1]
88 %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0]
9 ; CHECK: test
10 ; CHECK-NEXT: j
911 br i1 %2, label %4, label %5
1012
1113 ;
None ; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext decq 1 | grep jne
0 ; RUN: llc -march=x86-64 < %s | FileCheck %s
1
2 ; CHECK: decq
3 ; CHECK-NEXT: jne
14
25 @Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
36 @Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]
None ; RUN: llvm-as < %s | opt -constmerge | llvm-dis | %prcontext foo 2 | grep bar
0 ; RUN: opt -S -constmerge %s | FileCheck %s
11
2 ; CHECK: @foo = constant i32 6
3 ; CHECK: @bar = constant i32 6
24 @foo = constant i32 6 ; [#uses=0]
35 @bar = constant i32 6 ; [#uses=0]
46
None ; RUN: llvm-as < %s | opt -gvn -enable-load-pre | llvm-dis > %t
1 ; RUN: %prcontext bb1: 2 < %t | grep phi
2 ; RUN: %prcontext bb1: 2 < %t | not grep load
0 ; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s
31 ;
42 ; The partially redundant load in bb1 should be hoisted to "bb". This comes
53 ; from this C code (GCC PR 23455):
2927 br label %bb1
3028
3129 bb1: ; preds = %bb, %entry
30 ; CHECK: bb1:
31 ; CHECK-NEXT: phi
32 ; CHECK-NEXT: getelementptr
3233 %4 = load i32* @outcnt, align 4 ; [#uses=1]
3334 %5 = getelementptr i8* %outbuf, i32 %4 ; [#uses=1]
3435 store i8 %bi_buf, i8* %5, align 1
None ; RUN: llvm-as < %s | opt -gvn -enable-load-pre | llvm-dis > %t
1 ; RUN: %prcontext bb3.backedge: 2 < %t | grep phi
2 ; RUN: %prcontext bb3.backedge: 2 < %t | not grep load
0 ; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s
31 ;
42 ; Make sure the load in bb3.backedge is removed and moved into bb1 after the
53 ; call. This makes the non-call case faster.
4240 br label %bb3.backedge
4341
4442 bb3.backedge: ; preds = %bb, %bb1
43 ; CHECK: bb3.backedge:
44 ; CHECK-NEXT: phi
45 ; CHECK-NEXT: icmp
4546 %7 = load i32* %0, align 4 ; [#uses=2]
4647 %8 = icmp eq i32 %7, 0 ; [#uses=1]
4748 br i1 %8, label %return, label %bb
None ; RUN: llvm-as < %s | opt -indvars | llvm-dis | %prcontext ^Loop: 1 | grep %Canonical
0 ; RUN: opt -S -indvars %s | FileCheck %s
11
22 ; The indvar simplification code should ensure that the first PHI in the block
33 ; is the canonical one!
77 br label %Loop
88
99 Loop: ; preds = %Loop, %0
10 ; CHECK: Loop:
11 ; CHECK-NEXT: Canonical
1012 %NonIndvar = phi i32 [ 200, %0 ], [ %NonIndvarNext, %Loop ] ; [#uses=1]
1113 %Canonical = phi i32 [ 0, %0 ], [ %CanonicalNext, %Loop ] ; [#uses=2]
1214 store i32 %Canonical, i32* null
0 ; This test ensures that alloca instructions in the entry block for an inlined
11 ; function are moved to the top of the function they are inlined into.
22 ;
3 ; RUN: llvm-as < %s | opt -inline | llvm-dis | %prcontext alloca 1 | grep Entry:
3 ; RUN: opt -S -inline %s | FileCheck %s
44
55 define i32 @func(i32 %i) {
66 %X = alloca i32 ; [#uses=1]
1212
1313 define i32 @main(i32 %argc) {
1414 Entry:
15 ; CHECK: Entry
16 ; CHECK-NEXT: alloca
1517 call void @bar( )
1618 %X = call i32 @func( i32 7 ) ; [#uses=1]
1719 %Y = add i32 %X, %argc ; [#uses=1]
None ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | %prcontext strlen 1 | not grep ret
0 ; RUN: opt -S -instcombine %s | FileCheck %s
11 ; PR2297
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
33 target triple = "i386-apple-darwin8"
1010 store i8 0, i8* %tmp3, align 1
1111 %tmp5 = getelementptr i8* %tmp1, i32 0 ; [#uses=1]
1212 store i8 1, i8* %tmp5, align 1
13 ; CHECK: store
14 ; CHECK: store
15 ; CHECK-NEXT: strlen
16 ; CHECK-NEXT: store
1317 %tmp7 = call i32 @strlen( i8* %tmp1 ) nounwind readonly ; [#uses=1]
1418 %tmp9 = getelementptr i8* %tmp1, i32 0 ; [#uses=1]
1519 store i8 0, i8* %tmp9, align 1
None ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
1 ; RUN: %prcontext div 1 | grep then:
0 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | FileCheck %s
21
32 ;; This tests that the div is hoisted into the then block.
43 define i32 @foo(i1 %C, i32 %A, i32 %B) {
65 br i1 %C, label %then, label %endif
76
87 then: ; preds = %entry
8 ; CHECK: then:
9 ; CHECK-NEXT: sdiv i32
910 br label %endif
1011
1112 endif: ; preds = %then, %entry
None ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
1 ; RUN: %prcontext div 1 | grep ret
0 ; RUN: opt -instcombine %s | llvm-dis | FileCheck %s
21
32 ;; This tests that the instructions in the entry blocks are sunk into each
43 ;; arm of the 'if'.
1312 ret i32 %tmp.9
1413
1514 endif: ; preds = %entry
15 ; CHECK: sdiv i32
16 ; CHECK-NEXT: ret i32
1617 ret i32 %tmp.2
1718 }
1819
11 ; having overlapping live ranges that result in copies. We want the setcc
22 ; instruction immediately before the conditional branch.
33 ;
4 ; RUN: llvm-as < %s | opt -loop-reduce | llvm-dis | \
5 ; RUN: %prcontext {br i1} 1 | grep icmp
4 ; RUN: opt -S -loop-reduce %s | FileCheck %s
65
76 define void @foo(float* %D, i32 %E) {
87 entry:
1110 %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ] ; [#uses=1]
1211 volatile store float 0.000000e+00, float* %D
1312 %indvar.next = add i32 %indvar, 1 ; [#uses=2]
13 ; CHECK: icmp
14 ; CHECK: br i1
1415 %exitcond = icmp eq i32 %indvar.next, %E ; [#uses=1]
1516 br i1 %exitcond, label %loopexit, label %no_exit
1617 loopexit: ; preds = %no_exit
None ; RUN: llvm-as < %s | opt -simplify-libcalls-halfpowr | llvm-dis | %prcontext {mul float} 1 | grep {mul float} | count 8
0 ; RUN: opt -simplify-libcalls-halfpowr %s | llvm-dis | FileCheck %s
11
22 define float @__half_powrf4(float %f, float %g) nounwind readnone {
33 entry:
1111 bb1: ; preds = %bb, %entry
1212 %f_addr.0 = phi float [ %1, %bb ], [ %f, %entry ] ; [#uses=1]
1313 %2 = fmul float %f_addr.0, %g ; [#uses=1]
14 ; CHECK: fmul float %f_addr
15 ; CHECK: fmul float %f_addr
16 ; CHECK: fmul float %f_addr
17 ; CHECK: fmul float %f_addr
18
1419 ret float %2
1520 }
1621
None ; RUN: llvm-as < %s | opt -tailcallelim | llvm-dis | \
1 ; RUN: %prcontext alloca 1 | grep {i32 @foo}
0 ; RUN: opt -tailcallelim %s | llvm-dis | FileCheck %s
21
32 declare void @bar(i32*)
43
54 define i32 @foo() {
5 ; CHECK: i32 @foo()
6 ; CHECK: alloca
67 %A = alloca i32 ; [#uses=2]
78 store i32 17, i32* %A
89 call void @bar( i32* %A )