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[TableGen] Allow shift operators to take bits<n> Convert the operand to int if possible, i.e. if the value is properly initialized. (I suppose there is further room for improvement here to also peform the shift if the uninitialized bits are shifted out.) With this little change we can now compute the scaling factor for compressed displacement with pure tablegen code in the X86 backend. This is useful because both the X86-disassembler-specific part of tablegen and the assembler need this and TD is the natural sharing place. The patch also adds the missing documentation for the shift and add operator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213277 91177308-0d34-0410-b5e6-96231b3b80d8 Adam Nemet 5 years ago
3 changed file(s) with 20 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
206206 'bit 1' if string a is equal to string b, 0 otherwise. This only operates
207207 on string, int and bit objects. Use !cast to compare other types of
208208 objects.
209
210 ``!shl(a,b)``
211 ``!srl(a,b)``
212 ``!sra(a,b)``
213 ``!add(a,b)``
214 The usual logical and arithmetic operators.
209215
210216 Note that all of the values have rules specifying how they convert to values
211217 for different types. These rules allow you to assign a value like "``7``"
954954 case SHL:
955955 case SRA:
956956 case SRL: {
957 IntInit *LHSi = dyn_cast(LHS);
958 IntInit *RHSi = dyn_cast(RHS);
957 IntInit *LHSi =
958 dyn_cast_or_null(LHS->convertInitializerTo(IntRecTy::get()));
959 IntInit *RHSi =
960 dyn_cast_or_null(RHS->convertInitializerTo(IntRecTy::get()));
959961 if (LHSi && RHSi) {
960962 int64_t LHSv = LHSi->getValue(), RHSv = RHSi->getValue();
961963 int64_t Result;
0 // RUN: llvm-tblgen %s | FileCheck %s
11 // XFAIL: vg_leak
2
3 def shifts {
4 bits<2> b = 0b10;
5 int i = 2;
6 int shifted_b = !shl(b, 2);
7 int shifted_i = !shl(i, 2);
8 }
9 // CHECK: def shifts
10 // CHECK: shifted_b = 8
11 // CHECK: shifted_i = 8
212
313 class Int {
414 int Value = value;