llvm.org GIT mirror llvm / 3001340
Attempt to fix the mingw32 bot. This should hopefully fix http://lab.llvm.org:8011/builders/clang-x86_64-darwin11-self-mingw32 Merged from r182446 Author: Rafael Espindola <rafael.espindola@gmail.com> Date: Wed May 22 02:30:47 2013 +0000 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@190579 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 7 years ago
1 changed file(s) with 4 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
337337 return Chain;
338338 }
339339
340 #define RSRC_DATA_FORMAT 0xf00000000000
341
342340 SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
341 const uint64_t RSRC_DATA_FORMAT = 0xf00000000000LL;
343342 StoreSDNode *StoreNode = cast(Op);
344343 SDValue Chain = Op.getOperand(0);
345344 SDValue Value = Op.getOperand(1);
350349 return SDValue();
351350 }
352351
353 SDValue SrcSrc = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i128,
354 DAG.getConstant(0, MVT::i64),
355 DAG.getConstant(RSRC_DATA_FORMAT, MVT::i64));
352 SDValue Zero = DAG.getConstant(0, MVT::i64);
353 SDValue Format = DAG.getConstant(RSRC_DATA_FORMAT, MVT::i64);
354 SDValue SrcSrc = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i128, Zero, Format);
356355
357356 SDValue Ops[2];
358357 Ops[0] = DAG.getNode(AMDGPUISD::BUFFER_STORE, DL, MVT::Other, Chain,