llvm.org GIT mirror llvm / 2f801fa
MIR Serialization: Serialize machine instruction names. This commit implements initial machine instruction serialization. It serializes machine instruction names. The instructions are represented using a YAML sequence of string literals and are a part of machine basic block YAML mapping. This commit introduces a class called 'MIParser' which will be used to parse the machine instructions and operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10481 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240295 91177308-0d34-0410-b5e6-96231b3b80d8 Alex Lorenz 5 years ago
9 changed file(s) with 236 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
2121 #include "llvm/Support/YAMLTraits.h"
2222 #include
2323
24 LLVM_YAML_IS_SEQUENCE_VECTOR(std::string)
25
2426 namespace llvm {
2527 namespace yaml {
2628
3032 bool IsLandingPad = false;
3133 bool AddressTaken = false;
3234 // TODO: Serialize the successors and liveins.
33 // TODO: Serialize machine instructions.
35
36 std::vector Instructions;
3437 };
3538
3639 template <> struct MappingTraits {
4043 YamlIO.mapOptional("alignment", MBB.Alignment);
4144 YamlIO.mapOptional("isLandingPad", MBB.IsLandingPad);
4245 YamlIO.mapOptional("addressTaken", MBB.AddressTaken);
46 YamlIO.mapOptional("instructions", MBB.Instructions);
4347 }
4448 };
4549
0 add_llvm_library(LLVMMIRParser
1 MIParser.cpp
12 MIRParser.cpp
23 )
34
0 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the parsing of machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "MIParser.h"
14 #include "llvm/ADT/StringMap.h"
15 #include "llvm/CodeGen/MachineBasicBlock.h"
16 #include "llvm/CodeGen/MachineFunction.h"
17 #include "llvm/CodeGen/MachineInstr.h"
18 #include "llvm/Support/raw_ostream.h"
19 #include "llvm/Support/SourceMgr.h"
20 #include "llvm/Target/TargetSubtargetInfo.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22
23 using namespace llvm;
24
25 namespace {
26
27 class MIParser {
28 SourceMgr &SM;
29 MachineFunction &MF;
30 SMDiagnostic &Error;
31 StringRef Source;
32 /// Maps from instruction names to op codes.
33 StringMap Names2InstrOpCodes;
34
35 public:
36 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
37 StringRef Source);
38
39 /// Report an error at the current location with the given message.
40 ///
41 /// This function always return true.
42 bool error(const Twine &Msg);
43
44 MachineInstr *parse();
45
46 private:
47 void initNames2InstrOpCodes();
48
49 /// Try to convert an instruction name to an opcode. Return true if the
50 /// instruction name is invalid.
51 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
52 };
53
54 } // end anonymous namespace
55
56 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
57 StringRef Source)
58 : SM(SM), MF(MF), Error(Error), Source(Source) {}
59
60 bool MIParser::error(const Twine &Msg) {
61 // TODO: Get the proper location in the MIR file, not just a location inside
62 // the string.
63 Error =
64 SMDiagnostic(SM, SMLoc(), SM.getMemoryBuffer(SM.getMainFileID())
65 ->getBufferIdentifier(),
66 1, 0, SourceMgr::DK_Error, Msg.str(), Source, None, None);
67 return true;
68 }
69
70 MachineInstr *MIParser::parse() {
71 StringRef InstrName = Source;
72 unsigned OpCode;
73 if (parseInstrName(InstrName, OpCode)) {
74 error(Twine("unknown machine instruction name '") + InstrName + "'");
75 return nullptr;
76 }
77
78 // TODO: Parse the rest of instruction - machine operands, etc.
79 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
80 auto *MI = MF.CreateMachineInstr(MCID, DebugLoc());
81 return MI;
82 }
83
84 void MIParser::initNames2InstrOpCodes() {
85 if (!Names2InstrOpCodes.empty())
86 return;
87 const auto *TII = MF.getSubtarget().getInstrInfo();
88 assert(TII && "Expected target instruction info");
89 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
90 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
91 }
92
93 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
94 initNames2InstrOpCodes();
95 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
96 if (InstrInfo == Names2InstrOpCodes.end())
97 return true;
98 OpCode = InstrInfo->getValue();
99 return false;
100 }
101
102 MachineInstr *llvm::parseMachineInstr(SourceMgr &SM, MachineFunction &MF,
103 StringRef Src, SMDiagnostic &Error) {
104 return MIParser(SM, MF, Error, Src).parse();
105 }
0 //===- MIParser.h - Machine Instructions Parser ---------------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the function that parses the machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
14 #define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
15
16 #include "llvm/ADT/StringRef.h"
17
18 namespace llvm {
19
20 class MachineInstr;
21 class MachineFunction;
22 class SMDiagnostic;
23 class SourceMgr;
24
25 MachineInstr *parseMachineInstr(SourceMgr &SM, MachineFunction &MF,
26 StringRef Src, SMDiagnostic &Error);
27
28 } // end namespace llvm
29
30 #endif
1212 //===----------------------------------------------------------------------===//
1313
1414 #include "llvm/CodeGen/MIRParser/MIRParser.h"
15 #include "MIParser.h"
1516 #include "llvm/ADT/StringRef.h"
1617 #include "llvm/ADT/StringMap.h"
1718 #include "llvm/ADT/STLExtras.h"
7879 /// Initialize the machine basic block using it's YAML representation.
7980 ///
8081 /// Return true if an error occurred.
81 bool initializeMachineBasicBlock(MachineBasicBlock &MBB,
82 bool initializeMachineBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB,
8283 const yaml::MachineBasicBlock &YamlMBB);
8384
8485 private:
217218 }
218219 auto *MBB = MF.CreateMachineBasicBlock(BB);
219220 MF.insert(MF.end(), MBB);
220 if (initializeMachineBasicBlock(*MBB, YamlMBB))
221 if (initializeMachineBasicBlock(MF, *MBB, YamlMBB))
221222 return true;
222223 }
223224 return false;
224225 }
225226
226227 bool MIRParserImpl::initializeMachineBasicBlock(
227 MachineBasicBlock &MBB, const yaml::MachineBasicBlock &YamlMBB) {
228 MachineFunction &MF, MachineBasicBlock &MBB,
229 const yaml::MachineBasicBlock &YamlMBB) {
228230 MBB.setAlignment(YamlMBB.Alignment);
229231 if (YamlMBB.AddressTaken)
230232 MBB.setHasAddressTaken();
231233 MBB.setIsLandingPad(YamlMBB.IsLandingPad);
234 // Parse the instructions.
235 for (const auto &MISource : YamlMBB.Instructions) {
236 SMDiagnostic Error;
237 if (auto *MI = parseMachineInstr(SM, MF, MISource, Error)) {
238 MBB.insert(MBB.end(), MI);
239 continue;
240 }
241 reportDiagnostic(Error);
242 return true;
243 }
232244 return false;
233245 }
234246
2020 #include "llvm/Support/MemoryBuffer.h"
2121 #include "llvm/Support/raw_ostream.h"
2222 #include "llvm/Support/YAMLTraits.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
2325
2426 using namespace llvm;
2527
3638 void print(const MachineFunction &MF);
3739
3840 void convert(yaml::MachineBasicBlock &YamlMBB, const MachineBasicBlock &MBB);
41 };
42
43 /// This class prints out the machine instructions using the MIR serialization
44 /// format.
45 class MIPrinter {
46 raw_ostream &OS;
47
48 public:
49 MIPrinter(raw_ostream &OS) : OS(OS) {}
50
51 void print(const MachineInstr &MI);
3952 };
4053
4154 } // end anonymous namespace
8295 YamlMBB.Alignment = MBB.getAlignment();
8396 YamlMBB.AddressTaken = MBB.hasAddressTaken();
8497 YamlMBB.IsLandingPad = MBB.isLandingPad();
98
99 // Print the machine instructions.
100 YamlMBB.Instructions.reserve(MBB.size());
101 std::string Str;
102 for (const auto &MI : MBB) {
103 raw_string_ostream StrOS(Str);
104 MIPrinter(StrOS).print(MI);
105 YamlMBB.Instructions.push_back(StrOS.str());
106 Str.clear();
107 }
108 }
109
110 void MIPrinter::print(const MachineInstr &MI) {
111 const auto &SubTarget = MI.getParent()->getParent()->getSubtarget();
112 const auto *TII = SubTarget.getInstrInfo();
113 assert(TII && "Expected target instruction info");
114
115 OS << TII->getName(MI.getOpcode());
116 // TODO: Print the instruction flags, machine operands, machine mem operands.
85117 }
86118
87119 void llvm::printMIR(raw_ostream &OS, const Module &M) {
0 if not 'X86' in config.root.targets:
1 config.unsupported = True
0 # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
1 # This test ensures that the MIR parser parses X86 machine instructions
2 # correctly.
3
4 --- |
5
6 define i32 @inc(i32 %a) {
7 entry:
8 %b = mul i32 %a, 11
9 ret i32 %b
10 }
11
12 ...
13 ---
14 # CHECK: name: inc
15 name: inc
16 body:
17 - name: entry
18 instructions:
19 # CHECK: - IMUL32rri8
20 # CHECK-NEXT: - RETQ
21 - IMUL32rri8
22 - RETQ
23 ...
0 # RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
1 # This test ensures that an error is reported when an unknown instruction is
2 # encountered.
3
4 --- |
5
6 define i32 @foo() {
7 entry:
8 ret i32 0
9 }
10
11 ...
12 ---
13 name: foo
14 body:
15 - name: entry
16 instructions:
17 # CHECK: 1:1: unknown machine instruction name 'retJust0'
18 - retJust0
19 ...