llvm.org GIT mirror llvm / 2f6bcf0
[X86][TBM] Add tests showing failure to fold RFLAGS result into TBM instructions. And fails to select TBM instructions at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310790 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 2 years ago
2 changed file(s) with 353 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
2323 ret i32 %0
2424 }
2525
26 define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
27 ; CHECK-LABEL: test_x86_tbm_bextri_u32_z:
28 ; CHECK: # BB#0: # %entry
29 ; CHECK-NEXT: bextr $2814, %edi, %eax # imm = 0xAFE
30 ; CHECK-NEXT: testl %eax, %eax
31 ; CHECK-NEXT: cmovel %esi, %eax
32 ; CHECK-NEXT: retq
33 entry:
34 %0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
35 %1 = icmp eq i32 %0, 0
36 %2 = select i1 %1, i32 %b, i32 %0
37 ret i32 %2
38 }
39
2640 define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
2741 ; CHECK-LABEL: test_x86_tbm_bextri_u64:
2842 ; CHECK: # BB#0: # %entry
4559 %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 2814)
4660 ret i64 %0
4761 }
62
63 define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind readnone {
64 ; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
65 ; CHECK: # BB#0: # %entry
66 ; CHECK-NEXT: bextr $2814, %rdi, %rax # imm = 0xAFE
67 ; CHECK-NEXT: testq %rax, %rax
68 ; CHECK-NEXT: cmoveq %rsi, %rax
69 ; CHECK-NEXT: retq
70 entry:
71 %0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
72 %1 = icmp eq i64 %0, 0
73 %2 = select i1 %1, i64 %b, i64 %0
74 ret i64 %2
75 }
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
2
3 ; TODO - Patterns fail to fold with ZF flags and prevents TBM instruction selection.
24
35 define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind {
46 ; CHECK-LABEL: test_x86_tbm_bextri_u32:
2123 ret i32 %t2
2224 }
2325
26 define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind {
27 ; CHECK-LABEL: test_x86_tbm_bextri_u32_z:
28 ; CHECK: # BB#0:
29 ; CHECK-NEXT: shrl $4, %edi
30 ; CHECK-NEXT: andl $4095, %edi # imm = 0xFFF
31 ; CHECK-NEXT: cmovel %esi, %edi
32 ; CHECK-NEXT: movl %edi, %eax
33 ; CHECK-NEXT: retq
34 %t0 = lshr i32 %a, 4
35 %t1 = and i32 %t0, 4095
36 %t2 = icmp eq i32 %t1, 0
37 %t3 = select i1 %t2, i32 %b, i32 %t1
38 ret i32 %t3
39 }
40
2441 define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind {
2542 ; CHECK-LABEL: test_x86_tbm_bextri_u64:
2643 ; CHECK: # BB#0:
4259 ret i64 %t2
4360 }
4461
62 define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind {
63 ; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
64 ; CHECK: # BB#0:
65 ; CHECK-NEXT: shrl $4, %edi
66 ; CHECK-NEXT: andl $4095, %edi # imm = 0xFFF
67 ; CHECK-NEXT: cmoveq %rsi, %rdi
68 ; CHECK-NEXT: movq %rdi, %rax
69 ; CHECK-NEXT: retq
70 %t0 = lshr i64 %a, 4
71 %t1 = and i64 %t0, 4095
72 %t2 = icmp eq i64 %t1, 0
73 %t3 = select i1 %t2, i64 %b, i64 %t1
74 ret i64 %t3
75 }
76
4577 define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind {
4678 ; CHECK-LABEL: test_x86_tbm_blcfill_u32:
4779 ; CHECK: # BB#0:
5284 ret i32 %t1
5385 }
5486
87 define i32 @test_x86_tbm_blcfill_u32_z(i32 %a, i32 %b) nounwind {
88 ; CHECK-LABEL: test_x86_tbm_blcfill_u32_z:
89 ; CHECK: # BB#0:
90 ; CHECK-NEXT: # kill: %EDI %EDI %RDI
91 ; CHECK-NEXT: leal 1(%rdi), %eax
92 ; CHECK-NEXT: andl %edi, %eax
93 ; CHECK-NEXT: cmovel %esi, %eax
94 ; CHECK-NEXT: retq
95 %t0 = add i32 %a, 1
96 %t1 = and i32 %t0, %a
97 %t2 = icmp eq i32 %t1, 0
98 %t3 = select i1 %t2, i32 %b, i32 %t1
99 ret i32 %t3
100 }
101
55102 define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind {
56103 ; CHECK-LABEL: test_x86_tbm_blcfill_u64:
57104 ; CHECK: # BB#0:
60107 %t0 = add i64 %a, 1
61108 %t1 = and i64 %t0, %a
62109 ret i64 %t1
110 }
111
112 define i64 @test_x86_tbm_blcfill_u64_z(i64 %a, i64 %b) nounwind {
113 ; CHECK-LABEL: test_x86_tbm_blcfill_u64_z:
114 ; CHECK: # BB#0:
115 ; CHECK-NEXT: leaq 1(%rdi), %rax
116 ; CHECK-NEXT: andq %rdi, %rax
117 ; CHECK-NEXT: cmoveq %rsi, %rax
118 ; CHECK-NEXT: retq
119 %t0 = add i64 %a, 1
120 %t1 = and i64 %t0, %a
121 %t2 = icmp eq i64 %t1, 0
122 %t3 = select i1 %t2, i64 %b, i64 %t1
123 ret i64 %t3
63124 }
64125
65126 define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind {
73134 ret i32 %t2
74135 }
75136
137 define i32 @test_x86_tbm_blci_u32_z(i32 %a, i32 %b) nounwind {
138 ; CHECK-LABEL: test_x86_tbm_blci_u32_z:
139 ; CHECK: # BB#0:
140 ; CHECK-NEXT: # kill: %EDI %EDI %RDI
141 ; CHECK-NEXT: leal 1(%rdi), %eax
142 ; CHECK-NEXT: notl %eax
143 ; CHECK-NEXT: orl %edi, %eax
144 ; CHECK-NEXT: cmovel %esi, %eax
145 ; CHECK-NEXT: retq
146 %t0 = add i32 1, %a
147 %t1 = xor i32 %t0, -1
148 %t2 = or i32 %t1, %a
149 %t3 = icmp eq i32 %t2, 0
150 %t4 = select i1 %t3, i32 %b, i32 %t2
151 ret i32 %t4
152 }
153
76154 define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind {
77155 ; CHECK-LABEL: test_x86_tbm_blci_u64:
78156 ; CHECK: # BB#0:
84162 ret i64 %t2
85163 }
86164
165 define i64 @test_x86_tbm_blci_u64_z(i64 %a, i64 %b) nounwind {
166 ; CHECK-LABEL: test_x86_tbm_blci_u64_z:
167 ; CHECK: # BB#0:
168 ; CHECK-NEXT: leaq 1(%rdi), %rax
169 ; CHECK-NEXT: notq %rax
170 ; CHECK-NEXT: orq %rdi, %rax
171 ; CHECK-NEXT: cmoveq %rsi, %rax
172 ; CHECK-NEXT: retq
173 %t0 = add i64 1, %a
174 %t1 = xor i64 %t0, -1
175 %t2 = or i64 %t1, %a
176 %t3 = icmp eq i64 %t2, 0
177 %t4 = select i1 %t3, i64 %b, i64 %t2
178 ret i64 %t4
179 }
180
87181 define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind {
88182 ; CHECK-LABEL: test_x86_tbm_blci_u32_b:
89183 ; CHECK: # BB#0:
115209 ret i32 %t2
116210 }
117211
212 define i32 @test_x86_tbm_blcic_u32_z(i32 %a, i32 %b) nounwind {
213 ; CHECK-LABEL: test_x86_tbm_blcic_u32_z:
214 ; CHECK: # BB#0:
215 ; CHECK-NEXT: # kill: %EDI %EDI %RDI
216 ; CHECK-NEXT: leal 1(%rdi), %eax
217 ; CHECK-NEXT: movl %edi, %ecx
218 ; CHECK-NEXT: notl %ecx
219 ; CHECK-NEXT: andl %ecx, %eax
220 ; CHECK-NEXT: cmovel %esi, %eax
221 ; CHECK-NEXT: retq
222 %t0 = xor i32 %a, -1
223 %t1 = add i32 %a, 1
224 %t2 = and i32 %t1, %t0
225 %t3 = icmp eq i32 %t2, 0
226 %t4 = select i1 %t3, i32 %b, i32 %t2
227 ret i32 %t4
228 }
229
118230 define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind {
119231 ; CHECK-LABEL: test_x86_tbm_blcic_u64:
120232 ; CHECK: # BB#0:
126238 ret i64 %t2
127239 }
128240
241 define i64 @test_x86_tbm_blcic_u64_z(i64 %a, i64 %b) nounwind {
242 ; CHECK-LABEL: test_x86_tbm_blcic_u64_z:
243 ; CHECK: # BB#0:
244 ; CHECK-NEXT: leaq 1(%rdi), %rax
245 ; CHECK-NEXT: notq %rdi
246 ; CHECK-NEXT: andq %rdi, %rax
247 ; CHECK-NEXT: cmoveq %rsi, %rax
248 ; CHECK-NEXT: retq
249 %t0 = xor i64 %a, -1
250 %t1 = add i64 %a, 1
251 %t2 = and i64 %t1, %t0
252 %t3 = icmp eq i64 %t2, 0
253 %t4 = select i1 %t3, i64 %b, i64 %t2
254 ret i64 %t4
255 }
256
129257 define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind {
130258 ; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
131259 ; CHECK: # BB#0:
136264 ret i32 %t1
137265 }
138266
267 define i32 @test_x86_tbm_blcmsk_u32_z(i32 %a, i32 %b) nounwind {
268 ; CHECK-LABEL: test_x86_tbm_blcmsk_u32_z:
269 ; CHECK: # BB#0:
270 ; CHECK-NEXT: # kill: %EDI %EDI %RDI
271 ; CHECK-NEXT: leal 1(%rdi), %eax
272 ; CHECK-NEXT: xorl %edi, %eax
273 ; CHECK-NEXT: cmovel %esi, %eax
274 ; CHECK-NEXT: retq
275 %t0 = add i32 %a, 1
276 %t1 = xor i32 %t0, %a
277 %t2 = icmp eq i32 %t1, 0
278 %t3 = select i1 %t2, i32 %b, i32 %t1
279 ret i32 %t3
280 }
281
139282 define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind {
140283 ; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
141284 ; CHECK: # BB#0:
146289 ret i64 %t1
147290 }
148291
292 define i64 @test_x86_tbm_blcmsk_u64_z(i64 %a, i64 %b) nounwind {
293 ; CHECK-LABEL: test_x86_tbm_blcmsk_u64_z:
294 ; CHECK: # BB#0:
295 ; CHECK-NEXT: leaq 1(%rdi), %rax
296 ; CHECK-NEXT: xorq %rdi, %rax
297 ; CHECK-NEXT: cmoveq %rsi, %rax
298 ; CHECK-NEXT: retq
299 %t0 = add i64 %a, 1
300 %t1 = xor i64 %t0, %a
301 %t2 = icmp eq i64 %t1, 0
302 %t3 = select i1 %t2, i64 %b, i64 %t1
303 ret i64 %t3
304 }
305
149306 define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind {
150307 ; CHECK-LABEL: test_x86_tbm_blcs_u32:
151308 ; CHECK: # BB#0:
156313 ret i32 %t1
157314 }
158315
316 define i32 @test_x86_tbm_blcs_u32_z(i32 %a, i32 %b) nounwind {
317 ; CHECK-LABEL: test_x86_tbm_blcs_u32_z:
318 ; CHECK: # BB#0:
319 ; CHECK-NEXT: # kill: %EDI %EDI %RDI
320 ; CHECK-NEXT: leal 1(%rdi), %eax
321 ; CHECK-NEXT: orl %edi, %eax
322 ; CHECK-NEXT: cmovel %esi, %eax
323 ; CHECK-NEXT: retq
324 %t0 = add i32 %a, 1
325 %t1 = or i32 %t0, %a
326 %t2 = icmp eq i32 %t1, 0
327 %t3 = select i1 %t2, i32 %b, i32 %t1
328 ret i32 %t3
329 }
330
159331 define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind {
160332 ; CHECK-LABEL: test_x86_tbm_blcs_u64:
161333 ; CHECK: # BB#0:
166338 ret i64 %t1
167339 }
168340
341 define i64 @test_x86_tbm_blcs_u64_z(i64 %a, i64 %b) nounwind {
342 ; CHECK-LABEL: test_x86_tbm_blcs_u64_z:
343 ; CHECK: # BB#0:
344 ; CHECK-NEXT: leaq 1(%rdi), %rax
345 ; CHECK-NEXT: orq %rdi, %rax
346 ; CHECK-NEXT: cmoveq %rsi, %rax
347 ; CHECK-NEXT: retq
348 %t0 = add i64 %a, 1
349 %t1 = or i64 %t0, %a
350 %t2 = icmp eq i64 %t1, 0
351 %t3 = select i1 %t2, i64 %b, i64 %t1
352 ret i64 %t3
353 }
354
169355 define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind {
170356 ; CHECK-LABEL: test_x86_tbm_blsfill_u32:
171357 ; CHECK: # BB#0:
176362 ret i32 %t1
177363 }
178364
365 define i32 @test_x86_tbm_blsfill_u32_z(i32 %a, i32 %b) nounwind {
366 ; CHECK-LABEL: test_x86_tbm_blsfill_u32_z:
367 ; CHECK: # BB#0:
368 ; CHECK-NEXT: # kill: %EDI %EDI %RDI
369 ; CHECK-NEXT: leal -1(%rdi), %eax
370 ; CHECK-NEXT: orl %edi, %eax
371 ; CHECK-NEXT: cmovel %esi, %eax
372 ; CHECK-NEXT: retq
373 %t0 = add i32 %a, -1
374 %t1 = or i32 %t0, %a
375 %t2 = icmp eq i32 %t1, 0
376 %t3 = select i1 %t2, i32 %b, i32 %t1
377 ret i32 %t3
378 }
379
179380 define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind {
180381 ; CHECK-LABEL: test_x86_tbm_blsfill_u64:
181382 ; CHECK: # BB#0:
186387 ret i64 %t1
187388 }
188389
390 define i64 @test_x86_tbm_blsfill_u64_z(i64 %a, i64 %b) nounwind {
391 ; CHECK-LABEL: test_x86_tbm_blsfill_u64_z:
392 ; CHECK: # BB#0:
393 ; CHECK-NEXT: leaq -1(%rdi), %rax
394 ; CHECK-NEXT: orq %rdi, %rax
395 ; CHECK-NEXT: cmoveq %rsi, %rax
396 ; CHECK-NEXT: retq
397 %t0 = add i64 %a, -1
398 %t1 = or i64 %t0, %a
399 %t2 = icmp eq i64 %t1, 0
400 %t3 = select i1 %t2, i64 %b, i64 %t1
401 ret i64 %t3
402 }
403
189404 define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind {
190405 ; CHECK-LABEL: test_x86_tbm_blsic_u32:
191406 ; CHECK: # BB#0:
197412 ret i32 %t2
198413 }
199414
415 define i32 @test_x86_tbm_blsic_u32_z(i32 %a, i32 %b) nounwind {
416 ; CHECK-LABEL: test_x86_tbm_blsic_u32_z:
417 ; CHECK: # BB#0:
418 ; CHECK-NEXT: movl %edi, %eax
419 ; CHECK-NEXT: notl %eax
420 ; CHECK-NEXT: decl %edi
421 ; CHECK-NEXT: orl %eax, %edi
422 ; CHECK-NEXT: cmovel %esi, %edi
423 ; CHECK-NEXT: movl %edi, %eax
424 ; CHECK-NEXT: retq
425 %t0 = xor i32 %a, -1
426 %t1 = add i32 %a, -1
427 %t2 = or i32 %t0, %t1
428 %t3 = icmp eq i32 %t2, 0
429 %t4 = select i1 %t3, i32 %b, i32 %t2
430 ret i32 %t4
431 }
432
200433 define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind {
201434 ; CHECK-LABEL: test_x86_tbm_blsic_u64:
202435 ; CHECK: # BB#0:
208441 ret i64 %t2
209442 }
210443
444 define i64 @test_x86_tbm_blsic_u64_z(i64 %a, i64 %b) nounwind {
445 ; CHECK-LABEL: test_x86_tbm_blsic_u64_z:
446 ; CHECK: # BB#0:
447 ; CHECK-NEXT: movq %rdi, %rax
448 ; CHECK-NEXT: notq %rax
449 ; CHECK-NEXT: decq %rdi
450 ; CHECK-NEXT: orq %rax, %rdi
451 ; CHECK-NEXT: cmoveq %rsi, %rdi
452 ; CHECK-NEXT: movq %rdi, %rax
453 ; CHECK-NEXT: retq
454 %t0 = xor i64 %a, -1
455 %t1 = add i64 %a, -1
456 %t2 = or i64 %t0, %t1
457 %t3 = icmp eq i64 %t2, 0
458 %t4 = select i1 %t3, i64 %b, i64 %t2
459 ret i64 %t4
460 }
461
211462 define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind {
212463 ; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
213464 ; CHECK: # BB#0:
219470 ret i32 %t2
220471 }
221472
222 define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind {
223 ; CHECK-LABEL: Ttest_x86_tbm_t1mskc_u64:
473 define i32 @test_x86_tbm_t1mskc_u32_z(i32 %a, i32 %b) nounwind {
474 ; CHECK-LABEL: test_x86_tbm_t1mskc_u32_z:
475 ; CHECK: # BB#0:
476 ; CHECK-NEXT: movl %edi, %eax
477 ; CHECK-NEXT: notl %eax
478 ; CHECK-NEXT: incl %edi
479 ; CHECK-NEXT: orl %eax, %edi
480 ; CHECK-NEXT: cmovel %esi, %edi
481 ; CHECK-NEXT: movl %edi, %eax
482 ; CHECK-NEXT: retq
483 %t0 = xor i32 %a, -1
484 %t1 = add i32 %a, 1
485 %t2 = or i32 %t0, %t1
486 %t3 = icmp eq i32 %t2, 0
487 %t4 = select i1 %t3, i32 %b, i32 %t2
488 ret i32 %t4
489 }
490
491 define i64 @test_x86_tbm_t1mskc_u64(i64 %a) nounwind {
492 ; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
224493 ; CHECK: # BB#0:
225494 ; CHECK-NEXT: t1mskc %rdi, %rax
226495 ; CHECK-NEXT: retq
230499 ret i64 %t2
231500 }
232501
502 define i64 @test_x86_tbm_t1mskc_u64_z(i64 %a, i64 %b) nounwind {
503 ; CHECK-LABEL: test_x86_tbm_t1mskc_u64_z:
504 ; CHECK: # BB#0:
505 ; CHECK-NEXT: movq %rdi, %rax
506 ; CHECK-NEXT: notq %rax
507 ; CHECK-NEXT: incq %rdi
508 ; CHECK-NEXT: orq %rax, %rdi
509 ; CHECK-NEXT: cmoveq %rsi, %rdi
510 ; CHECK-NEXT: movq %rdi, %rax
511 ; CHECK-NEXT: retq
512 %t0 = xor i64 %a, -1
513 %t1 = add i64 %a, 1
514 %t2 = or i64 %t0, %t1
515 %t3 = icmp eq i64 %t2, 0
516 %t4 = select i1 %t3, i64 %b, i64 %t2
517 ret i64 %t4
518 }
519
233520 define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind {
234521 ; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
235522 ; CHECK: # BB#0:
241528 ret i32 %t2
242529 }
243530
531 define i32 @test_x86_tbm_tzmsk_u32_z(i32 %a, i32 %b) nounwind {
532 ; CHECK-LABEL: test_x86_tbm_tzmsk_u32_z:
533 ; CHECK: # BB#0:
534 ; CHECK-NEXT: movl %edi, %eax
535 ; CHECK-NEXT: notl %eax
536 ; CHECK-NEXT: decl %edi
537 ; CHECK-NEXT: andl %eax, %edi
538 ; CHECK-NEXT: cmovel %esi, %edi
539 ; CHECK-NEXT: movl %edi, %eax
540 ; CHECK-NEXT: retq
541 %t0 = xor i32 %a, -1
542 %t1 = add i32 %a, -1
543 %t2 = and i32 %t0, %t1
544 %t3 = icmp eq i32 %t2, 0
545 %t4 = select i1 %t3, i32 %b, i32 %t2
546 ret i32 %t4
547 }
548
244549 define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind {
245550 ; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
246551 ; CHECK: # BB#0:
250555 %t1 = add i64 %a, -1
251556 %t2 = and i64 %t0, %t1
252557 ret i64 %t2
558 }
559
560 define i64 @test_x86_tbm_tzmsk_u64_z(i64 %a, i64 %b) nounwind {
561 ; CHECK-LABEL: test_x86_tbm_tzmsk_u64_z:
562 ; CHECK: # BB#0:
563 ; CHECK-NEXT: movq %rdi, %rax
564 ; CHECK-NEXT: notq %rax
565 ; CHECK-NEXT: decq %rdi
566 ; CHECK-NEXT: andq %rax, %rdi
567 ; CHECK-NEXT: cmoveq %rsi, %rdi
568 ; CHECK-NEXT: movq %rdi, %rax
569 ; CHECK-NEXT: retq
570 %t0 = xor i64 %a, -1
571 %t1 = add i64 %a, -1
572 %t2 = and i64 %t0, %t1
573 %t3 = icmp eq i64 %t2, 0
574 %t4 = select i1 %t3, i64 %b, i64 %t2
575 ret i64 %t4
253576 }
254577
255578 define i64 @test_and_large_constant_mask(i64 %x) {