llvm.org GIT mirror llvm / 2e35047
Add dominance check for the instruction being hoisted. For example, MachineLICM should not hoist a load that is not guaranteed to be executed. Radar 10254254. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141689 91177308-0d34-0410-b5e6-96231b3b80d8 Devang Patel 8 years ago
5 changed file(s) with 89 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
9090 // For each opcode, keep a list of potential CSE instructions.
9191 DenseMap > CSEMap;
9292
93 // If a MBB does not dominate loop exiting blocks then it may not safe
94 // to hoist loads from this block.
95 bool CurrentMBBDominatesLoopExitingBlocks;
96 bool NeedToCheckMBBDominance;
97
9398 public:
9499 static char ID; // Pass identification, replacement for typeid
95100 MachineLICM() :
192197 /// IsProfitableToHoist - Return true if it is potentially profitable to
193198 /// hoist the given loop invariant.
194199 bool IsProfitableToHoist(MachineInstr &MI);
200
201 /// IsGuaranteedToExecute - Check if this mbb is guaranteed to execute.
202 /// If not then a load from this mbb may not be safe to hoist.
203 bool IsGuaranteedToExecute(MachineBasicBlock *BB);
195204
196205 /// HoistRegion - Walk the specified region of the CFG (defined by all
197206 /// blocks dominated by the specified block, and that are in the current
294303 MRI = &MF.getRegInfo();
295304 InstrItins = TM->getInstrItineraryData();
296305 AllocatableSet = TRI->getAllocatableSet(MF);
306 // Stay conservative.
307 CurrentMBBDominatesLoopExitingBlocks = false;
308 NeedToCheckMBBDominance = true;
297309
298310 if (PreRegAlloc) {
299311 // Estimate register pressure during pre-regalloc pass.
458470 ++PhysRegDefs[*AS];
459471 }
460472
473 NeedToCheckMBBDominance = true;
461474 for (MachineBasicBlock::iterator
462475 MII = BB->begin(), E = BB->end(); MII != E; ++MII) {
463476 MachineInstr *MI = &*MII;
551564 Changed = true;
552565 }
553566
567 // IsGuaranteedToExecute - Check if this mbb is guaranteed to execute.
568 // If not then a load from this mbb may not be safe to hoist.
569 bool MachineLICM::IsGuaranteedToExecute(MachineBasicBlock *BB) {
570 // Do not check if we already have checked it once.
571 if (NeedToCheckMBBDominance == false)
572 return CurrentMBBDominatesLoopExitingBlocks;
573
574 NeedToCheckMBBDominance = false;
575
576 if (BB != CurLoop->getHeader()) {
577 // Check loop exiting blocks.
578 SmallVector CurrentLoopExitingBlocks;
579 CurLoop->getExitingBlocks(CurrentLoopExitingBlocks);
580 for (unsigned i = 0, e = CurrentLoopExitingBlocks.size(); i != e; ++i)
581 if (!DT->dominates(BB, CurrentLoopExitingBlocks[i])) {
582 CurrentMBBDominatesLoopExitingBlocks = false;
583 return CurrentMBBDominatesLoopExitingBlocks;
584 }
585 }
586
587 CurrentMBBDominatesLoopExitingBlocks = true;
588 return CurrentMBBDominatesLoopExitingBlocks;
589 }
590
554591 /// HoistRegion - Walk the specified region of the CFG (defined by all blocks
555592 /// dominated by the specified block, and that are in the current loop) in depth
556593 /// first order w.r.t the DominatorTree. This allows us to visit definitions
577614 // Remember livein register pressure.
578615 BackTrace.push_back(RegPressure);
579616
617 NeedToCheckMBBDominance = true;
580618 for (MachineBasicBlock::iterator
581619 MII = BB->begin(), E = BB->end(); MII != E; ) {
582620 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
710748 bool DontMoveAcrossStore = true;
711749 if (!I.isSafeToMove(TII, AA, DontMoveAcrossStore))
712750 return false;
713
751
752 // If it is load then check if it is guaranteed to execute by making sure that
753 // it dominates all exiting blocks. If it doesn't, then there is a path out of
754 // the loop which does not execute this load, so we can't hoist it.
755 // Stores and side effects are already checked by isSafeToMove.
756 if (I.getDesc().mayLoad() && !IsGuaranteedToExecute(I.getParent()))
757 return false;
758
714759 return true;
715760 }
716761
33 ; register pressure and therefore spilling. There is more room for improvement
44 ; here.
55
6 ; CHECK: sub sp, #{{32|28|24}}
6 ; CHECK: sub sp, #{{40|32|28|24}}
77
88 ; CHECK: %for.inc
9 ; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, #
109 ; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, #
1110 ; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, #
1211 ; CHECK: add
0 ; RUN: llc -asm-verbose=false < %s | FileCheck %s
1
2 ; MachineLICM should check dominance before hoisting instructions.
3 ; CHECK: jne LBB0_3
4 ; CHECK-NEXT: xorb %al, %al
5 ; CHECK-NEXT: testb %al, %al
6
7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
8 target triple = "x86_64-apple-macosx10.7.2"
9
10 define void @CMSColorWorldCreateParametricData() nounwind uwtable optsize ssp {
11 entry:
12 br label %for.body.i
13
14 for.body.i:
15 br i1 undef, label %for.inc.i, label %if.then26.i
16
17 if.then26.i:
18 br i1 undef, label %if.else.i.i, label %lor.lhs.false.i.i
19
20 if.else.i.i:
21 br i1 undef, label %lor.lhs.false.i.i, label %if.then116.i.i
22
23 lor.lhs.false.i.i:
24 br i1 undef, label %for.inc.i, label %if.then116.i.i
25
26 if.then116.i.i:
27 unreachable
28
29 for.inc.i:
30 %cmp17.i = icmp ult i64 undef, undef
31 br i1 %cmp17.i, label %for.body.i, label %if.end28.i
32
33 if.end28.i:
34 ret void
35 }
None ; RUN: llc -mtriple=x86_64-apple-darwin -march=x86-64 < %s -o /dev/null -stats -info-output-file - | grep machine-licm | grep 3
0 ; RUN: llc -mtriple=x86_64-apple-darwin -march=x86-64 < %s -o /dev/null -stats -info-output-file - | grep machine-licm | grep 2
11
22 ; MachineLICM should be able to hoist the symbolic addresses out of
33 ; the inner loops.
101101 br label %bb60
102102
103103 bb: ; preds = %bb60
104 %i.0 = phi i32 [ 0, %bb60 ] ; [#uses=2]
104105 %0 = bitcast float* %x_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1]
105106 %1 = load <4 x float>* %0, align 16 ; <<4 x float>> [#uses=4]
106107 %tmp20 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1]
128129 %5 = getelementptr float* %x_addr.0, i64 4 ; [#uses=1]
129130 %6 = getelementptr float* %y_addr.0, i64 4 ; [#uses=1]
130131 %7 = add i32 %i.0, 4 ; [#uses=1]
131 br label %bb60
132 %8 = load i32* %n, align 4 ; [#uses=1]
133 %9 = icmp sgt i32 %8, %7 ; [#uses=1]
134 br i1 %9, label %bb60, label %return
132135
133136 bb60: ; preds = %bb, %entry
134 %i.0 = phi i32 [ 0, %entry ], [ %7, %bb ] ; [#uses=2]
135137 %x_addr.0 = phi float* [ %x, %entry ], [ %5, %bb ] ; [#uses=2]
136138 %y_addr.0 = phi float* [ %y, %entry ], [ %6, %bb ] ; [#uses=2]
137 %8 = load i32* %n, align 4 ; [#uses=1]
138 %9 = icmp sgt i32 %8, %i.0 ; [#uses=1]
139 br i1 %9, label %bb, label %return
139 br label %bb
140140
141141 return: ; preds = %bb60
142142 ret void