llvm.org GIT mirror llvm / 2d17293
Make the spiller responsible for updating the LiveStacks analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117337 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 9 years ago
4 changed file(s) with 23 addition(s) and 34 deletion(s). Raw diff Collapse all Expand all
6565
6666 extern char &PreAllocSplittingID;
6767
68 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
69 extern char &LiveStacksID;
70
6871 /// SimpleRegisterCoalescing pass. Aggressively coalesces every register
6972 /// copy it can.
7073 ///
2626 char LiveStacks::ID = 0;
2727 INITIALIZE_PASS(LiveStacks, "livestacks",
2828 "Live Stack Slot Analysis", false, false)
29
30 char &llvm::LiveStacksID = LiveStacks::ID;
2931
3032 void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
3133 AU.setPreservesAll();
1717 #include "llvm/Function.h"
1818 #include "llvm/CodeGen/CalcSpillWeights.h"
1919 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
20 #include "llvm/CodeGen/LiveStackAnalysis.h"
2120 #include "llvm/CodeGen/MachineFunctionPass.h"
2221 #include "llvm/CodeGen/MachineInstr.h"
2322 #include "llvm/CodeGen/MachineLoopInfo.h"
137136 BitVector allocatableRegs_;
138137 BitVector reservedRegs_;
139138 LiveIntervals* li_;
140 LiveStacks* ls_;
141139 MachineLoopInfo *loopInfo;
142140
143141 /// handled_ - Intervals are added to the handled_ set in the order of their
203201 AU.addRequired();
204202 if (PreSplitIntervals)
205203 AU.addRequiredID(PreAllocSplittingID);
206 AU.addRequired();
207 AU.addPreserved();
204 AU.addRequiredID(LiveStacksID);
205 AU.addPreservedID(LiveStacksID);
208206 AU.addRequired();
209207 AU.addPreserved();
210208 AU.addRequired();
497495 allocatableRegs_ = tri_->getAllocatableSet(fn);
498496 reservedRegs_ = tri_->getReservedRegs(fn);
499497 li_ = &getAnalysis();
500 ls_ = &getAnalysis();
501498 loopInfo = &getAnalysis();
502499
503500 // We don't run the coalescer here because we have no reason to
657654
658655 // Look for physical registers that end up not being allocated even though
659656 // register allocator had to spill other registers in its register class.
660 if (ls_->getNumIntervals() == 0)
661 return;
662657 if (!vrm_->FindUnusedRegisters(li_))
663658 return;
664659 }
801796 if (I != IP.first->begin()) --I;
802797 IP.second = I;
803798 }
804 }
805
806 /// addStackInterval - Create a LiveInterval for stack if the specified live
807 /// interval has been spilled.
808 static void addStackInterval(LiveInterval *cur, LiveStacks *ls_,
809 LiveIntervals *li_,
810 MachineRegisterInfo* mri_, VirtRegMap &vrm_) {
811 int SS = vrm_.getStackSlot(cur->reg);
812 if (SS == VirtRegMap::NO_STACK_SLOT)
813 return;
814
815 const TargetRegisterClass *RC = mri_->getRegClass(cur->reg);
816 LiveInterval &SI = ls_->getOrCreateInterval(SS, RC);
817
818 VNInfo *VNI;
819 if (SI.hasAtLeastOneValue())
820 VNI = SI.getValNumInfo(0);
821 else
822 VNI = SI.getNextValue(SlotIndex(), 0,
823 ls_->getVNInfoAllocator());
824
825 LiveInterval &RI = li_->getInterval(cur->reg);
826 // FIXME: This may be overly conservative.
827 SI.MergeRangesInAsValue(RI, VNI);
828799 }
829800
830801 /// getConflictWeight - Return the number of conflicts between cur
12431214 spiller_->spill(cur, added, spillIs);
12441215
12451216 std::sort(added.begin(), added.end(), LISorter());
1246 addStackInterval(cur, ls_, li_, mri_, *vrm_);
12471217 if (added.empty())
12481218 return; // Early exit if all spills were folded.
12491219
13181288 if (sli->beginIndex() < earliestStart)
13191289 earliestStart = sli->beginIndex();
13201290 spiller_->spill(sli, added, spillIs);
1321 addStackInterval(sli, ls_, li_, mri_, *vrm_);
13221291 spilled.insert(sli->reg);
13231292 }
13241293
1111 #include "Spiller.h"
1212 #include "VirtRegMap.h"
1313 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
14 #include "llvm/CodeGen/LiveStackAnalysis.h"
1415 #include "llvm/CodeGen/MachineFrameInfo.h"
1516 #include "llvm/CodeGen/MachineFunction.h"
1617 #include "llvm/CodeGen/MachineInstrBuilder.h"
194195 /// Falls back on LiveIntervals::addIntervalsForSpills.
195196 class StandardSpiller : public Spiller {
196197 protected:
198 MachineFunction *mf;
197199 LiveIntervals *lis;
200 LiveStacks *lss;
198201 MachineLoopInfo *loopInfo;
199202 VirtRegMap *vrm;
200203 public:
201204 StandardSpiller(MachineFunctionPass &pass, MachineFunction &mf,
202205 VirtRegMap &vrm)
203 : lis(&pass.getAnalysis()),
206 : mf(&mf),
207 lis(&pass.getAnalysis()),
208 lss(&pass.getAnalysis()),
204209 loopInfo(pass.getAnalysisIfAvailable()),
205210 vrm(&vrm) {}
206211
211216 std::vector added =
212217 lis->addIntervalsForSpills(*li, spillIs, loopInfo, *vrm);
213218 newIntervals.insert(newIntervals.end(), added.begin(), added.end());
219
220 // Update LiveStacks.
221 int SS = vrm->getStackSlot(li->reg);
222 if (SS == VirtRegMap::NO_STACK_SLOT)
223 return;
224 const TargetRegisterClass *RC = mf->getRegInfo().getRegClass(li->reg);
225 LiveInterval &SI = lss->getOrCreateInterval(SS, RC);
226 if (!SI.hasAtLeastOneValue())
227 SI.getNextValue(SlotIndex(), 0, lss->getVNInfoAllocator());
228 SI.MergeRangesInAsValue(*li, SI.getValNumInfo(0));
214229 }
215230 };
216231