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Use Align for TFL::TransientStackAlignment Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: arsenm, dschuff, jyknight, sdardis, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, fedor.sergeev, jrtc27, atanasyan, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69216 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375398 91177308-0d34-0410-b5e6-96231b3b80d8 Guillaume Chatelet 1 year, 1 month ago
14 changed file(s) with 17 addition(s) and 17 deletion(s). Raw diff Collapse all Expand all
5454 private:
5555 StackDirection StackDir;
5656 Align StackAlignment;
57 unsigned TransientStackAlignment;
57 Align TransientStackAlignment;
5858 int LocalAreaOffset;
5959 bool StackRealignable;
6060 public:
6161 TargetFrameLowering(StackDirection D, Align StackAl, int LAO,
62 unsigned TransAl = 1, bool StackReal = true)
62 Align TransAl = Align::None(), bool StackReal = true)
6363 : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
6464 LocalAreaOffset(LAO), StackRealignable(StackReal) {}
6565
9595 /// calls.
9696 ///
9797 unsigned getTransientStackAlignment() const {
98 return TransientStackAlignment;
98 return TransientStackAlignment.value();
9999 }
100100
101101 /// isStackRealignable - This method returns whether the stack can be
1035510355 case ICmpInst::ICMP_UGE:
1035610356 std::swap(LHS, RHS);
1035710357 LLVM_FALLTHROUGH;
10358 case ICmpInst::ICMP_ULE: {
10358 case ICmpInst::ICMP_ULE: {
1035910359 // If operand >=s 0 then ZExt == SExt. If operand
1036010360 const SCEVZeroExtendExpr *ZExt = dyn_cast(LHS);
1036110361 const SCEVSignExtendExpr *SExt = dyn_cast(RHS);
2020 class AArch64FrameLowering : public TargetFrameLowering {
2121 public:
2222 explicit AArch64FrameLowering()
23 : TargetFrameLowering(StackGrowsDown, Align(16), 0, 16,
23 : TargetFrameLowering(StackGrowsDown, Align(16), 0, Align(16),
2424 true /*StackRealignable*/) {}
2525
2626 void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
1313
1414 using namespace llvm;
1515 AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, Align StackAl,
16 int LAO, unsigned TransAl)
16 int LAO, Align TransAl)
1717 : TargetFrameLowering(D, StackAl, LAO, TransAl) {}
1818
1919 AMDGPUFrameLowering::~AMDGPUFrameLowering() = default;
2525 class AMDGPUFrameLowering : public TargetFrameLowering {
2626 public:
2727 AMDGPUFrameLowering(StackDirection D, Align StackAl, int LAO,
28 unsigned TransAl = 1);
28 Align TransAl = Align::None());
2929 ~AMDGPUFrameLowering() override;
3030
3131 /// \returns The number of 32-bit sub-registers that are used when storing
1515 class R600FrameLowering : public AMDGPUFrameLowering {
1616 public:
1717 R600FrameLowering(StackDirection D, Align StackAl, int LAO,
18 unsigned TransAl = 1)
18 Align TransAl = Align::None())
1919 : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
2020 ~R600FrameLowering() override;
2121
2020 class SIFrameLowering final : public AMDGPUFrameLowering {
2121 public:
2222 SIFrameLowering(StackDirection D, Align StackAl, int LAO,
23 unsigned TransAl = 1)
23 Align TransAl = Align::None())
2424 : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
2525 ~SIFrameLowering() override = default;
2626
7575 unsigned NumAlignedDPRCS2Regs);
7676
7777 ARMFrameLowering::ARMFrameLowering(const ARMSubtarget &sti)
78 : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, 4),
78 : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, Align(4)),
7979 STI(sti) {}
8080
8181 bool ARMFrameLowering::keepFramePointer(const MachineFunction &MF) const {
2929 class HexagonFrameLowering : public TargetFrameLowering {
3030 public:
3131 explicit HexagonFrameLowering()
32 : TargetFrameLowering(StackGrowsDown, Align(8), 0, 1, true) {}
32 : TargetFrameLowering(StackGrowsDown, Align(8), 0, Align::None(), true) {}
3333
3434 // All of the prolog/epilog functionality, including saving and restoring
3535 // callee-saved registers is handled in emitPrologue. This is to have the
2222 public:
2323 explicit MSP430FrameLowering()
2424 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(2), -2,
25 2) {}
25 Align(2)) {}
2626
2727 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
2828 /// the function.
2424
2525 public:
2626 explicit MipsFrameLowering(const MipsSubtarget &sti, Align Alignment)
27 : TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment.value()),
28 STI(sti) {}
27 : TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment), STI(sti) {
28 }
2929
3030 static const MipsFrameLowering *create(const MipsSubtarget &ST);
3131
3434 SparcFrameLowering::SparcFrameLowering(const SparcSubtarget &ST)
3535 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
3636 ST.is64Bit() ? Align(16) : Align(8), 0,
37 ST.is64Bit() ? 16 : 8) {}
37 ST.is64Bit() ? Align(16) : Align(8)) {}
3838
3939 void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
4040 MachineBasicBlock &MBB,
4646
4747 SystemZFrameLowering::SystemZFrameLowering()
4848 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8),
49 -SystemZMC::CallFrameSize, 8,
49 -SystemZMC::CallFrameSize, Align(8),
5050 false /* StackRealignable */) {
5151 // Create a mapping from register number to save slot offset.
5252 RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
3030 WebAssemblyFrameLowering()
3131 : TargetFrameLowering(StackGrowsDown, /*StackAlignment=*/Align(16),
3232 /*LocalAreaOffset=*/0,
33 /*TransientStackAlignment=*/16,
33 /*TransientStackAlignment=*/Align(16),
3434 /*StackRealignable=*/true) {}
3535
3636 MachineBasicBlock::iterator