llvm.org GIT mirror llvm / 2a600be
merge constraint type analysis stuff together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36545 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 13 years ago
1 changed file(s) with 21 addition(s) and 14 deletion(s). Raw diff Collapse all Expand all
31773177 struct AsmOperandInfo : public InlineAsm::ConstraintInfo {
31783178 /// ConstraintCode - This contains the actual string for the code, like "m".
31793179 std::string ConstraintCode;
3180
3181 /// ConstraintType - Information about the constraint code, e.g. Register,
3182 /// RegisterClass, Memory, Other, Unknown.
3183 TargetLowering::ConstraintType ConstraintType;
31803184
31813185 /// CallOperand/CallOperandval - If this is the result output operand or a
31823186 /// clobber, this is null, otherwise it is the incoming operand to the
31883192 MVT::ValueType ConstraintVT;
31893193
31903194 AsmOperandInfo(const InlineAsm::ConstraintInfo &info)
3191 : InlineAsm::ConstraintInfo(info),
3195 : InlineAsm::ConstraintInfo(info),
3196 ConstraintType(TargetLowering::C_Unknown),
31923197 CallOperand(0,0), CallOperandVal(0), ConstraintVT(MVT::Other) {
31933198 }
31943199 };
32153220 for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
32163221 ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
32173222 AsmOperandInfo &OpInfo = ConstraintOperands.back();
3218
3219 // Compute the constraint code to use.
3220 OpInfo.ConstraintCode = GetMostGeneralConstraint(OpInfo.Codes, TLI);
32213223
32223224 MVT::ValueType OpVT = MVT::Other;
32233225
32543256 }
32553257
32563258 OpInfo.ConstraintVT = OpVT;
3259
3260 // Compute the constraint code to use.
3261 OpInfo.ConstraintCode = GetMostGeneralConstraint(OpInfo.Codes, TLI);
3262
3263 // Compute the constraint type.
3264 // FIXME: merge this into GetMostGeneralConstraint.
3265 OpInfo.ConstraintType = TLI.getConstraintType(OpInfo.ConstraintCode);
32573266
32583267 if (TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, OpVT).first ==0)
32593268 continue; // Not assigned a fixed reg.
33143323 if (OpInfo.ConstraintCode.size() == 1) // not a physreg name.
33153324 CTy = TLI.getConstraintType(OpInfo.ConstraintCode);
33163325
3317 if (CTy != TargetLowering::C_RegisterClass) {
3326 if (CTy != TargetLowering::C_RegisterClass &&
3327 CTy != TargetLowering::C_Register) {
33183328 // Memory output, or 'other' output (e.g. 'X' constraint).
33193329 SDOperand InOperandVal = OpInfo.CallOperand;
33203330
33323342 break;
33333343 }
33343344
3335 // Otherwise, this is a register output.
3336 assert(CTy == TargetLowering::C_RegisterClass && "Unknown op type!");
3345 // Otherwise, this is a register or register class output.
33373346
33383347 // If this is an early-clobber output, or if there is an input
33393348 // constraint that matches this, we need to reserve the input register
34153424 }
34163425 }
34173426
3418 TargetLowering::ConstraintType CTy = TargetLowering::C_RegisterClass;
3419 if (OpInfo.ConstraintCode.size() == 1) // not a physreg name.
3420 CTy = TLI.getConstraintType(OpInfo.ConstraintCode);
3421
3422 if (CTy == TargetLowering::C_Other) {
3427 if (OpInfo.ConstraintType == TargetLowering::C_Other) {
34233428 assert(!OpInfo.isIndirect &&
34243429 "Don't know how to handle indirect other inputs yet!");
34253430
34373442 AsmNodeOperands.push_back(DAG.getConstant(ResOpType, MVT::i32));
34383443 AsmNodeOperands.push_back(InOperandVal);
34393444 break;
3440 } else if (CTy == TargetLowering::C_Memory) {
3445 } else if (OpInfo.ConstraintType == TargetLowering::C_Memory) {
34413446 // Memory input. Memory operands really want the address of the value,
34423447 // so we want an indirect input. If we don't have an indirect input,
34433448 // spill the value somewhere if we can, otherwise spill it to a stack
34743479 break;
34753480 }
34763481
3477 assert(CTy == TargetLowering::C_RegisterClass && "Unknown op type!");
3482 assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass ||
3483 OpInfo.ConstraintType == TargetLowering::C_Register) &&
3484 "Unknown constraint type!");
34783485 assert(!OpInfo.isIndirect &&
34793486 "Don't know how to handle indirect register inputs yet!");
34803487