llvm.org GIT mirror llvm / 29df540
[DSE] Regenerate tests with update_test_checks.py (NFC) Summary: In preparation for a future commit, this regenerates the test checks for test/Transforms/DeadStoreElimination/OverwriteStoreBegin.ll test/Transforms/DeadStoreElimination/OverwriteStoreEnd.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329839 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Neilson 1 year, 5 months ago
2 changed file(s) with 135 addition(s) and 24 deletion(s). Raw diff Collapse all Expand all
0 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1 ; RUN: opt < %s -basicaa -dse -S | FileCheck %s
12
23 define void @write4to7(i32* nocapture %p) {
34 ; CHECK-LABEL: @write4to7(
5 ; CHECK-NEXT: entry:
6 ; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1
7 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[ARRAYIDX0]] to i8*
8 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, i8* [[P3]], i64 4
9 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TMP0]], i8 0, i64 24, i1 false)
10 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 1
11 ; CHECK-NEXT: store i32 1, i32* [[ARRAYIDX1]], align 4
12 ; CHECK-NEXT: ret void
13 ;
414 entry:
515 %arrayidx0 = getelementptr inbounds i32, i32* %p, i64 1
616 %p3 = bitcast i32* %arrayidx0 to i8*
7 ; CHECK: [[GEP:%[0-9]+]] = getelementptr inbounds i8, i8* %p3, i64 4
8 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 [[GEP]], i8 0, i64 24, i1 false)
917 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i1 false)
1018 %arrayidx1 = getelementptr inbounds i32, i32* %p, i64 1
1119 store i32 1, i32* %arrayidx1, align 4
1422
1523 define void @write0to3(i32* nocapture %p) {
1624 ; CHECK-LABEL: @write0to3(
25 ; CHECK-NEXT: entry:
26 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
27 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, i8* [[P3]], i64 4
28 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TMP0]], i8 0, i64 24, i1 false)
29 ; CHECK-NEXT: store i32 1, i32* [[P]], align 4
30 ; CHECK-NEXT: ret void
31 ;
1732 entry:
1833 %p3 = bitcast i32* %p to i8*
19 ; CHECK: [[GEP:%[0-9]+]] = getelementptr inbounds i8, i8* %p3, i64 4
20 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 [[GEP]], i8 0, i64 24, i1 false)
2134 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i1 false)
2235 store i32 1, i32* %p, align 4
2336 ret void
2538
2639 define void @write0to7(i32* nocapture %p) {
2740 ; CHECK-LABEL: @write0to7(
41 ; CHECK-NEXT: entry:
42 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
43 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, i8* [[P3]], i64 8
44 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TMP0]], i8 0, i64 24, i1 false)
45 ; CHECK-NEXT: [[P4:%.*]] = bitcast i32* [[P]] to i64*
46 ; CHECK-NEXT: store i64 1, i64* [[P4]], align 8
47 ; CHECK-NEXT: ret void
48 ;
2849 entry:
2950 %p3 = bitcast i32* %p to i8*
30 ; CHECK: [[GEP:%[0-9]+]] = getelementptr inbounds i8, i8* %p3, i64 8
31 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 [[GEP]], i8 0, i64 24, i1 false)
3251 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i1 false)
3352 %p4 = bitcast i32* %p to i64*
3453 store i64 1, i64* %p4, align 8
3756
3857 define void @write0to7_2(i32* nocapture %p) {
3958 ; CHECK-LABEL: @write0to7_2(
59 ; CHECK-NEXT: entry:
60 ; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1
61 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[ARRAYIDX0]] to i8*
62 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, i8* [[P3]], i64 4
63 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TMP0]], i8 0, i64 24, i1 false)
64 ; CHECK-NEXT: [[P4:%.*]] = bitcast i32* [[P]] to i64*
65 ; CHECK-NEXT: store i64 1, i64* [[P4]], align 8
66 ; CHECK-NEXT: ret void
67 ;
4068 entry:
4169 %arrayidx0 = getelementptr inbounds i32, i32* %p, i64 1
4270 %p3 = bitcast i32* %arrayidx0 to i8*
43 ; CHECK: [[GEP:%[0-9]+]] = getelementptr inbounds i8, i8* %p3, i64 4
44 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 [[GEP]], i8 0, i64 24, i1 false)
4571 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i1 false)
4672 %p4 = bitcast i32* %p to i64*
4773 store i64 1, i64* %p4, align 8
5278 ; start pointer is changed.
5379 define void @dontwrite0to3_align8(i32* nocapture %p) {
5480 ; CHECK-LABEL: @dontwrite0to3_align8(
81 ; CHECK-NEXT: entry:
82 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
83 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[P3]], i8 0, i64 32, i1 false)
84 ; CHECK-NEXT: store i32 1, i32* [[P]], align 4
85 ; CHECK-NEXT: ret void
86 ;
5587 entry:
5688 %p3 = bitcast i32* %p to i8*
57 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 8 %p3, i8 0, i64 32, i1 false)
5889 call void @llvm.memset.p0i8.i64(i8* align 8 %p3, i8 0, i64 32, i1 false)
5990 store i32 1, i32* %p, align 4
6091 ret void
6293
6394 define void @dontwrite0to1(i32* nocapture %p) {
6495 ; CHECK-LABEL: @dontwrite0to1(
96 ; CHECK-NEXT: entry:
97 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
98 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[P3]], i8 0, i64 32, i1 false)
99 ; CHECK-NEXT: [[P4:%.*]] = bitcast i32* [[P]] to i16*
100 ; CHECK-NEXT: store i16 1, i16* [[P4]], align 4
101 ; CHECK-NEXT: ret void
102 ;
65103 entry:
66104 %p3 = bitcast i32* %p to i8*
67 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i1 false)
68105 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i1 false)
69106 %p4 = bitcast i32* %p to i16*
70107 store i16 1, i16* %p4, align 4
73110
74111 define void @dontwrite2to9(i32* nocapture %p) {
75112 ; CHECK-LABEL: @dontwrite2to9(
113 ; CHECK-NEXT: entry:
114 ; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1
115 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[ARRAYIDX0]] to i8*
116 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[P3]], i8 0, i64 32, i1 false)
117 ; CHECK-NEXT: [[P4:%.*]] = bitcast i32* [[P]] to i16*
118 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[P4]], i64 1
119 ; CHECK-NEXT: [[P5:%.*]] = bitcast i16* [[ARRAYIDX2]] to i64*
120 ; CHECK-NEXT: store i64 1, i64* [[P5]], align 8
121 ; CHECK-NEXT: ret void
122 ;
76123 entry:
77124 %arrayidx0 = getelementptr inbounds i32, i32* %p, i64 1
78125 %p3 = bitcast i32* %arrayidx0 to i8*
79 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i1 false)
80126 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i1 false)
81127 %p4 = bitcast i32* %p to i16*
82128 %arrayidx2 = getelementptr inbounds i16, i16* %p4, i64 1
86132 }
87133
88134 define void @write8To15AndThen0To7(i64* nocapture %P) {
135 ; CHECK-LABEL: @write8To15AndThen0To7(
136 ; CHECK-NEXT: entry:
137 ; CHECK-NEXT: [[BASE0:%.*]] = bitcast i64* [[P:%.*]] to i8*
138 ; CHECK-NEXT: [[MYBASE0:%.*]] = getelementptr inbounds i8, i8* [[BASE0]], i64 0
139 ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, i8* [[MYBASE0]], i64 16
140 ; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP0]], i8 0, i64 16, i1 false)
141 ; CHECK-NEXT: [[BASE64_0:%.*]] = getelementptr inbounds i64, i64* [[P]], i64 0
142 ; CHECK-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, i64* [[P]], i64 1
143 ; CHECK-NEXT: store i64 1, i64* [[BASE64_1]]
144 ; CHECK-NEXT: store i64 2, i64* [[BASE64_0]]
145 ; CHECK-NEXT: ret void
146 ;
89147 entry:
90 ; CHECK-LABEL: @write8To15AndThen0To7(
91 ; CHECK: [[GEP:%[0-9]+]] = getelementptr inbounds i8, i8* %mybase0, i64 16
92 ; CHECK: tail call void @llvm.memset.p0i8.i64(i8* align 8 [[GEP]], i8 0, i64 16, i1 false)
93148
94149 %base0 = bitcast i64* %P to i8*
95150 %mybase0 = getelementptr inbounds i8, i8* %base0, i64 0
0 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1 ; RUN: opt < %s -basicaa -dse -S | FileCheck %s
12 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
23
89
910 define void @write24to28(i32* nocapture %p) nounwind uwtable ssp {
1011 ; CHECK-LABEL: @write24to28(
12 ; CHECK-NEXT: entry:
13 ; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1
14 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[ARRAYIDX0]] to i8*
15 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[P3]], i8 0, i64 24, i1 false)
16 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 7
17 ; CHECK-NEXT: store i32 1, i32* [[ARRAYIDX1]], align 4
18 ; CHECK-NEXT: ret void
19 ;
1120 entry:
1221 %arrayidx0 = getelementptr inbounds i32, i32* %p, i64 1
1322 %p3 = bitcast i32* %arrayidx0 to i8*
14 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 24, i1 false)
1523 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i1 false)
1624 %arrayidx1 = getelementptr inbounds i32, i32* %p, i64 7
1725 store i32 1, i32* %arrayidx1, align 4
2028
2129 define void @write28to32(i32* nocapture %p) nounwind uwtable ssp {
2230 ; CHECK-LABEL: @write28to32(
31 ; CHECK-NEXT: entry:
32 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
33 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[P3]], i8 0, i64 28, i1 false)
34 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 7
35 ; CHECK-NEXT: store i32 1, i32* [[ARRAYIDX1]], align 4
36 ; CHECK-NEXT: ret void
37 ;
2338 entry:
2439 %p3 = bitcast i32* %p to i8*
25 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 28, i1 false)
2640 call void @llvm.memset.p0i8.i64(i8* align 4 %p3, i8 0, i64 32, i1 false)
2741 %arrayidx1 = getelementptr inbounds i32, i32* %p, i64 7
2842 store i32 1, i32* %arrayidx1, align 4
3145
3246 define void @dontwrite28to32memset(i32* nocapture %p) nounwind uwtable ssp {
3347 ; CHECK-LABEL: @dontwrite28to32memset(
48 ; CHECK-NEXT: entry:
49 ; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
50 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 16 [[P3]], i8 0, i64 32, i1 false)
51 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 7
52 ; CHECK-NEXT: store i32 1, i32* [[ARRAYIDX1]], align 4
53 ; CHECK-NEXT: ret void
54 ;
3455 entry:
3556 %p3 = bitcast i32* %p to i8*
36 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 16 %p3, i8 0, i64 32, i1 false)
3757 call void @llvm.memset.p0i8.i64(i8* align 16 %p3, i8 0, i64 32, i1 false)
3858 %arrayidx1 = getelementptr inbounds i32, i32* %p, i64 7
3959 store i32 1, i32* %arrayidx1, align 4
4262
4363 define void @write32to36(%struct.vec2plusi* nocapture %p) nounwind uwtable ssp {
4464 ; CHECK-LABEL: @write32to36(
65 ; CHECK-NEXT: entry:
66 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct.vec2plusi* [[P:%.*]] to i8*
67 ; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 bitcast (%struct.vec2plusi* @glob2 to i8*), i64 32, i1 false)
68 ; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_VEC2PLUSI:%.*]], %struct.vec2plusi* [[P]], i64 0, i32 2
69 ; CHECK-NEXT: store i32 1, i32* [[C]], align 4
70 ; CHECK-NEXT: ret void
71 ;
4572 entry:
4673 %0 = bitcast %struct.vec2plusi* %p to i8*
47 ; CHECK: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.vec2plusi* @glob2 to i8*), i64 32, i1 false)
4874 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.vec2plusi* @glob2 to i8*), i64 36, i1 false)
4975 %c = getelementptr inbounds %struct.vec2plusi, %struct.vec2plusi* %p, i64 0, i32 2
5076 store i32 1, i32* %c, align 4
5379
5480 define void @write16to32(%struct.vec2* nocapture %p) nounwind uwtable ssp {
5581 ; CHECK-LABEL: @write16to32(
82 ; CHECK-NEXT: entry:
83 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct.vec2* [[P:%.*]] to i8*
84 ; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 bitcast (%struct.vec2* @glob1 to i8*), i64 16, i1 false)
85 ; CHECK-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_VEC2:%.*]], %struct.vec2* [[P]], i64 0, i32 1
86 ; CHECK-NEXT: store <4 x i32> , <4 x i32>* [[C]], align 4
87 ; CHECK-NEXT: ret void
88 ;
5689 entry:
5790 %0 = bitcast %struct.vec2* %p to i8*
58 ; CHECK: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.vec2* @glob1 to i8*), i64 16, i1 false)
5991 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.vec2* @glob1 to i8*), i64 32, i1 false)
6092 %c = getelementptr inbounds %struct.vec2, %struct.vec2* %p, i64 0, i32 1
6193 store <4 x i32> , <4 x i32>* %c, align 4
6496
6597 define void @dontwrite28to32memcpy(%struct.vec2* nocapture %p) nounwind uwtable ssp {
6698 ; CHECK-LABEL: @dontwrite28to32memcpy(
99 ; CHECK-NEXT: entry:
100 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct.vec2* [[P:%.*]] to i8*
101 ; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 bitcast (%struct.vec2* @glob1 to i8*), i64 32, i1 false)
102 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [[STRUCT_VEC2:%.*]], %struct.vec2* [[P]], i64 0, i32 0, i64 7
103 ; CHECK-NEXT: store i32 1, i32* [[ARRAYIDX1]], align 4
104 ; CHECK-NEXT: ret void
105 ;
67106 entry:
68107 %0 = bitcast %struct.vec2* %p to i8*
69 ; CHECK: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.vec2* @glob1 to i8*), i64 32, i1 false)
70108 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %0, i8* align 16 bitcast (%struct.vec2* @glob1 to i8*), i64 32, i1 false)
71109 %arrayidx1 = getelementptr inbounds %struct.vec2, %struct.vec2* %p, i64 0, i32 0, i64 7
72110 store i32 1, i32* %arrayidx1, align 4
79117 %struct.trapframe = type { i64, i64, i64 }
80118
81119 ; bugzilla 11455 - make sure negative GEP's don't break this optimisation
120 define void @cpu_lwp_fork(%struct.trapframe* %md_regs, i64 %pcb_rsp0) nounwind uwtable noinline ssp {
82121 ; CHECK-LABEL: @cpu_lwp_fork(
83 define void @cpu_lwp_fork(%struct.trapframe* %md_regs, i64 %pcb_rsp0) nounwind uwtable noinline ssp {
122 ; CHECK-NEXT: entry:
123 ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[PCB_RSP0:%.*]] to %struct.trapframe*
124 ; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds [[STRUCT_TRAPFRAME:%.*]], %struct.trapframe* [[TMP0]], i64 -1
125 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast %struct.trapframe* [[ADD_PTR]] to i8*
126 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast %struct.trapframe* [[MD_REGS:%.*]] to i8*
127 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[TMP1]], i8* [[TMP2]], i64 24, i1 false)
128 ; CHECK-NEXT: [[TF_TRAPNO:%.*]] = getelementptr inbounds [[STRUCT_TRAPFRAME]], %struct.trapframe* [[TMP0]], i64 -1, i32 1
129 ; CHECK-NEXT: store i64 3, i64* [[TF_TRAPNO]], align 8
130 ; CHECK-NEXT: ret void
131 ;
84132 entry:
85133 %0 = inttoptr i64 %pcb_rsp0 to %struct.trapframe*
86134 %add.ptr = getelementptr inbounds %struct.trapframe, %struct.trapframe* %0, i64 -1
87135 %1 = bitcast %struct.trapframe* %add.ptr to i8*
88136 %2 = bitcast %struct.trapframe* %md_regs to i8*
89 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %2, i64 24, i1 false)
90137 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %2, i64 24, i1 false)
91138 %tf_trapno = getelementptr inbounds %struct.trapframe, %struct.trapframe* %0, i64 -1, i32 1
92139 store i64 3, i64* %tf_trapno, align 8
94141 }
95142
96143 define void @write16To23AndThen24To31(i64* nocapture %P, i64 %n64, i32 %n32, i16 %n16, i8 %n8) {
144 ; CHECK-LABEL: @write16To23AndThen24To31(
145 ; CHECK-NEXT: entry:
146 ; CHECK-NEXT: [[BASE0:%.*]] = bitcast i64* [[P:%.*]] to i8*
147 ; CHECK-NEXT: [[MYBASE0:%.*]] = getelementptr inbounds i8, i8* [[BASE0]], i64 0
148 ; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* align 8 [[MYBASE0]], i8 0, i64 16, i1 false)
149 ; CHECK-NEXT: [[BASE64_2:%.*]] = getelementptr inbounds i64, i64* [[P]], i64 2
150 ; CHECK-NEXT: [[BASE64_3:%.*]] = getelementptr inbounds i64, i64* [[P]], i64 3
151 ; CHECK-NEXT: store i64 3, i64* [[BASE64_2]]
152 ; CHECK-NEXT: store i64 3, i64* [[BASE64_3]]
153 ; CHECK-NEXT: ret void
154 ;
97155 entry:
98 ; CHECK-LABEL: @write16To23AndThen24To31(
99 ; CHECK: tail call void @llvm.memset.p0i8.i64(i8* align 8 %mybase0, i8 0, i64 16, i1 false)
100156
101157 %base0 = bitcast i64* %P to i8*
102158 %mybase0 = getelementptr inbounds i8, i8* %base0, i64 0