llvm.org GIT mirror llvm / 2992ea0
[mips] Replace MipsABIEnum with a MipsABIInfo class. Summary: No functional change yet, it's just an object replacement for an enum. It will allow us to gather ABI information in a single place so that we can start testing for properties of the ABI's instead of the ABI itself. For example we will eventually be able to use: ABI.MinStackAlignmentInBytes() instead of: (isABI_N32() || isABI_N64()) ? 16 : 8 which is clearer and more maintainable. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://reviews.llvm.org/D3341 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220568 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 6 years ago
7 changed file(s) with 70 addition(s) and 32 deletion(s). Raw diff Collapse all Expand all
6868 "IEEE 754-2008 NaN encoding.">;
6969 def FeatureSingleFloat : SubtargetFeature<"single-float", "IsSingleFloat",
7070 "true", "Only supports single precision float">;
71 def FeatureO32 : SubtargetFeature<"o32", "MipsABI", "O32",
71 def FeatureO32 : SubtargetFeature<"o32", "ABI", "MipsABIInfo::O32()",
7272 "Enable o32 ABI">;
73 def FeatureN32 : SubtargetFeature<"n32", "MipsABI", "N32",
73 def FeatureN32 : SubtargetFeature<"n32", "ABI", "MipsABIInfo::N32()",
7474 "Enable n32 ABI">;
75 def FeatureN64 : SubtargetFeature<"n64", "MipsABI", "N64",
75 def FeatureN64 : SubtargetFeature<"n64", "ABI", "MipsABIInfo::N64()",
7676 "Enable n64 ABI">;
77 def FeatureEABI : SubtargetFeature<"eabi", "MipsABI", "EABI",
77 def FeatureEABI : SubtargetFeature<"eabi", "ABI", "MipsABIInfo::EABI()",
7878 "Enable eabi ABI">;
7979 def FeatureNoOddSPReg : SubtargetFeature<"nooddspreg", "UseOddSPReg", "false",
8080 "Disable odd numbered single-precision "
0 //===---- MipsABIInfo.h - Information about MIPS ABI's --------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef MIPSABIINFO_H
10 #define MIPSABIINFO_H
11
12 namespace llvm {
13 class MipsABIInfo {
14 public:
15 enum class ABI { Unknown, O32, N32, N64, EABI };
16
17 protected:
18 ABI ThisABI;
19
20 public:
21 MipsABIInfo(ABI ThisABI) : ThisABI(ThisABI) {}
22
23 static MipsABIInfo Unknown() { return MipsABIInfo(ABI::Unknown); }
24 static MipsABIInfo O32() { return MipsABIInfo(ABI::O32); }
25 static MipsABIInfo N32() { return MipsABIInfo(ABI::N32); }
26 static MipsABIInfo N64() { return MipsABIInfo(ABI::N64); }
27 static MipsABIInfo EABI() { return MipsABIInfo(ABI::EABI); }
28
29 bool IsKnown() const { return ThisABI != ABI::Unknown; }
30 bool IsO32() const { return ThisABI == ABI::O32; }
31 bool IsN32() const { return ThisABI == ABI::N32; }
32 bool IsN64() const { return ThisABI == ABI::N64; }
33 bool IsEABI() const { return ThisABI == ABI::EABI; }
34 ABI GetEnumValue() const { return ThisABI; }
35
36 /// Ordering of ABI's
37 /// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given
38 /// multiple ABI options.
39 bool operator<(const MipsABIInfo Other) const {
40 return ThisABI < Other.GetEnumValue();
41 }
42 };
43 }
44
45 #endif
318318
319319 /// Emit Set directives.
320320 const char *MipsAsmPrinter::getCurrentABIString() const {
321 switch (Subtarget->getTargetABI()) {
322 case MipsSubtarget::O32: return "abi32";
323 case MipsSubtarget::N32: return "abiN32";
324 case MipsSubtarget::N64: return "abi64";
325 case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
321 switch (Subtarget->getABI().GetEnumValue()) {
322 case MipsABIInfo::ABI::O32: return "abi32";
323 case MipsABIInfo::ABI::N32: return "abiN32";
324 case MipsABIInfo::ABI::N64: return "abi64";
325 case MipsABIInfo::ABI::EABI: return "eabi32"; // TODO: handle eabi64
326326 default: llvm_unreachable("Unknown Mips ABI");
327327 }
328328 }
343343
344344 const TargetMachine &TM;
345345 bool IsPIC;
346 unsigned ABI;
347346 const MipsSubtarget *STI;
348347 const Mips16InstrInfo *TII;
349348 MipsFunctionInfo *MFI;
366365 static char ID;
367366 MipsConstantIslands(TargetMachine &tm)
368367 : MachineFunctionPass(ID), TM(tm),
369 IsPIC(TM.getRelocationModel() == Reloc::PIC_),
370 ABI(TM.getSubtarget().getTargetABI()), STI(nullptr),
368 IsPIC(TM.getRelocationModel() == Reloc::PIC_), STI(nullptr),
371369 MF(nullptr), MCP(nullptr), PrescannedForConstants(false) {}
372370
373371 const char *getPassName() const override {
6464 MipsLongBranch(TargetMachine &tm)
6565 : MachineFunctionPass(ID), TM(tm),
6666 IsPIC(TM.getRelocationModel() == Reloc::PIC_),
67 ABI(TM.getSubtarget().getTargetABI()),
68 LongBranchSeqSize(!IsPIC ? 2 : (ABI == MipsSubtarget::N64 ? 10 :
67 ABI(TM.getSubtarget().getABI()),
68 LongBranchSeqSize(!IsPIC ? 2 : (ABI.IsN64() ? 10 :
6969 (!TM.getSubtarget().isTargetNaCl() ? 9 : 10))) {}
7070
7171 const char *getPassName() const override {
8686 MachineFunction *MF;
8787 SmallVector MBBInfos;
8888 bool IsPIC;
89 unsigned ABI;
89 MipsABIInfo ABI;
9090 unsigned LongBranchSeqSize;
9191 };
9292
273273 const MipsSubtarget &Subtarget = TM.getSubtarget();
274274 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR;
275275
276 if (ABI != MipsSubtarget::N64) {
276 if (!ABI.IsN64()) {
277277 // $longbr:
278278 // addiu $sp, $sp, -8
279279 // sw $ra, 0($sp)
105105 const std::string &FS, bool little,
106106 const MipsTargetMachine *_TM)
107107 : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
108 MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
108 ABI(MipsABIInfo::Unknown()), IsLittle(little), IsSingleFloat(false),
109109 IsFPXX(false), NoABICalls(false), IsFP64bit(false), UseOddSPReg(true),
110110 IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false), HasCnMips(false),
111111 IsLinux(true), HasMips3_32(false), HasMips3_32r2(false),
135135 report_fatal_error("Code generation for MIPS-V is not implemented", false);
136136
137137 // Assert exactly one ABI was chosen.
138 assert(MipsABI != UnknownABI);
138 assert(ABI.IsKnown());
139139 assert((((getFeatureBits() & Mips::FeatureO32) != 0) +
140140 ((getFeatureBits() & Mips::FeatureEABI) != 0) +
141141 ((getFeatureBits() & Mips::FeatureN32) != 0) +
2121 #include "llvm/MC/MCInstrItineraries.h"
2222 #include "llvm/Support/ErrorHandling.h"
2323 #include "llvm/Target/TargetSubtargetInfo.h"
24 #include "MipsABIInfo.h"
2425 #include
2526
2627 #define GET_SUBTARGETINFO_HEADER
3435 class MipsSubtarget : public MipsGenSubtargetInfo {
3536 virtual void anchor();
3637
37 public:
38 // NOTE: O64 will not be supported.
39 enum MipsABIEnum {
40 UnknownABI, O32, N32, N64, EABI
41 };
42
43 protected:
4438 enum MipsArchEnum {
4539 Mips1, Mips2, Mips32, Mips32r2, Mips32r6, Mips3, Mips4, Mips5, Mips64,
4640 Mips64r2, Mips64r6
4943 // Mips architecture version
5044 MipsArchEnum MipsArchVersion;
5145
52 // Mips supported ABIs
53 MipsABIEnum MipsABI;
46 // Selected ABI
47 MipsABIInfo ABI;
5448
5549 // IsLittle - The target is Little Endian
5650 bool IsLittle;
157151 CodeGenOpt::Level getOptLevelToEnablePostRAScheduler() const override;
158152
159153 /// Only O32 and EABI supported right now.
160 bool isABI_EABI() const { return MipsABI == EABI; }
161 bool isABI_N64() const { return MipsABI == N64; }
162 bool isABI_N32() const { return MipsABI == N32; }
163 bool isABI_O32() const { return MipsABI == O32; }
154 bool isABI_EABI() const { return ABI.IsEABI(); }
155 bool isABI_N64() const { return ABI.IsN64(); }
156 bool isABI_N32() const { return ABI.IsN32(); }
157 bool isABI_O32() const { return ABI.IsO32(); }
164158 bool isABI_FPXX() const { return isABI_O32() && IsFPXX; }
165 unsigned getTargetABI() const { return MipsABI; }
159 const MipsABIInfo &getABI() const { return ABI; }
166160
167161 /// This constructor initializes the data members to match that
168162 /// of the specified triple.