llvm.org GIT mirror llvm / 29836c3
Factor GetInstSize() out of constpool island pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33644 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
3 changed file(s) with 84 addition(s) and 70 deletion(s). Raw diff Collapse all Expand all
1919 #include "llvm/CodeGen/MachineConstantPool.h"
2020 #include "llvm/CodeGen/MachineFunctionPass.h"
2121 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineJumpTableInfo.h"
23 #include "llvm/Target/TargetAsmInfo.h"
2422 #include "llvm/Target/TargetData.h"
2523 #include "llvm/Target/TargetMachine.h"
2624 #include "llvm/Support/Compiler.h"
9088 std::vector ImmBranches;
9189
9290 const TargetInstrInfo *TII;
93 const TargetAsmInfo *TAI;
9491 public:
9592 virtual bool runOnMachineFunction(MachineFunction &Fn);
9693
109106 bool BBIsInBranchRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned D);
110107 bool FixUpImmediateBranch(MachineFunction &Fn, ImmBranch &Br);
111108
112 unsigned GetInstSize(MachineInstr *MI) const;
113109 unsigned GetOffsetOf(MachineInstr *MI) const;
114110 unsigned GetOffsetOf(MachineBasicBlock *MBB) const;
115111 };
125121 MachineConstantPool &MCP = *Fn.getConstantPool();
126122
127123 TII = Fn.getTarget().getInstrInfo();
128 TAI = Fn.getTarget().getTargetAsmInfo();
129124
130125 // Renumber all of the machine basic blocks in the function, guaranteeing that
131126 // the numbers agree with the position of the block in the function.
228223 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
229224 I != E; ++I) {
230225 // Add instruction size to MBBSize.
231 MBBSize += GetInstSize(I);
226 MBBSize += ARM::GetInstSize(I);
232227
233228 int Opc = I->getOpcode();
234229 if (TII->isBranch(Opc)) {
317312 }
318313 }
319314
320 /// FIXME: Works around a gcc miscompilation with -fstrict-aliasing
321 static unsigned getNumJTEntries(const std::vector &JT,
322 unsigned JTI) DISABLE_INLINE;
323 static unsigned getNumJTEntries(const std::vector &JT,
324 unsigned JTI) {
325 return JT[JTI].MBBs.size();
326 }
327
328 /// GetInstSize - Return the size of the specified MachineInstr.
329 ///
330 unsigned ARMConstantIslands::GetInstSize(MachineInstr *MI) const {
331 // Basic size info comes from the TSFlags field.
332 unsigned TSFlags = MI->getInstrDescriptor()->TSFlags;
333
334 switch ((TSFlags & ARMII::SizeMask) >> ARMII::SizeShift) {
335 default:
336 // If this machine instr is an inline asm, measure it.
337 if (MI->getOpcode() == ARM::INLINEASM)
338 return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName());
339 if (MI->getOpcode() == ARM::LABEL)
340 return 0;
341 assert(0 && "Unknown or unset size field for instr!");
342 break;
343 case ARMII::Size8Bytes: return 8; // Arm instruction x 2.
344 case ARMII::Size4Bytes: return 4; // Arm instruction.
345 case ARMII::Size2Bytes: return 2; // Thumb instruction.
346 case ARMII::SizeSpecial: {
347 switch (MI->getOpcode()) {
348 case ARM::CONSTPOOL_ENTRY:
349 // If this machine instr is a constant pool entry, its size is recorded as
350 // operand #2.
351 return MI->getOperand(2).getImm();
352 case ARM::BR_JTr:
353 case ARM::BR_JTm:
354 case ARM::BR_JTadd:
355 case ARM::tBR_JTr: {
356 // These are jumptable branches, i.e. a branch followed by an inlined
357 // jumptable. The size is 4 + 4 * number of entries.
358 unsigned JTI = MI->getOperand(MI->getNumOperands()-2).getJumpTableIndex();
359 const MachineFunction *MF = MI->getParent()->getParent();
360 MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
361 const std::vector &JT = MJTI->getJumpTables();
362 assert(JTI < JT.size());
363 // Thumb instructions are 2 byte aligned, but JT entries are 4 byte
364 // 4 aligned. The assembler / linker may add 2 byte padding just before
365 // the JT entries. Use + 4 even for tBR_JTr to purposely over-estimate
366 // the size the jumptable.
367 // FIXME: If we know the size of the function is less than (1 << 16) *2
368 // bytes, we can use 16-bit entries instead. Then there won't be an
369 // alignment issue.
370 return getNumJTEntries(JT, JTI) * 4 + 4;
371 }
372 default:
373 // Otherwise, pseudo-instruction sizes are zero.
374 return 0;
375 }
376 }
377 }
378 }
379
380315 /// GetOffsetOf - Return the current offset of the specified machine instruction
381316 /// from the start of the function. This offset changes as stuff is moved
382317 /// around inside the function.
396331 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
397332 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
398333 if (&*I == MI) return Offset;
399 Offset += GetInstSize(I);
334 Offset += ARM::GetInstSize(I);
400335 }
401336 }
402337
481416 unsigned NewBBSize = 0;
482417 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
483418 I != E; ++I)
484 NewBBSize += GetInstSize(I);
419 NewBBSize += ARM::GetInstSize(I);
485420
486421 // Set the size of NewBB in BBSizes.
487422 BBSizes[NewBB->getNumber()] = NewBBSize;
667602 MI->eraseFromParent();
668603
669604 // Increase the size of MBB to account for the new unconditional branch.
670 BBSizes[MBB->getNumber()] += GetInstSize(&MBB->back());
605 BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
671606 return true;
672607 }
1616 #include "ARMAddressingModes.h"
1717 #include "ARMGenInstrInfo.inc"
1818 #include "ARMMachineFunctionInfo.h"
19 #include "llvm/CodeGen/LiveVariables.h"
1920 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/LiveVariables.h"
21 #include "llvm/CodeGen/MachineJumpTableInfo.h"
22 #include "llvm/Target/TargetAsmInfo.h"
2123 #include "llvm/Support/CommandLine.h"
2224 using namespace llvm;
2325
415417 Cond[0].setImm(ARMCC::getOppositeCondition(CC));
416418 return false;
417419 }
420
421
422 /// FIXME: Works around a gcc miscompilation with -fstrict-aliasing
423 static unsigned getNumJTEntries(const std::vector &JT,
424 unsigned JTI) DISABLE_INLINE;
425 static unsigned getNumJTEntries(const std::vector &JT,
426 unsigned JTI) {
427 return JT[JTI].MBBs.size();
428 }
429
430 /// GetInstSize - Return the size of the specified MachineInstr.
431 ///
432 unsigned ARM::GetInstSize(MachineInstr *MI) {
433 MachineBasicBlock &MBB = *MI->getParent();
434 const MachineFunction *MF = MBB.getParent();
435 const TargetAsmInfo *TAI = MF->getTarget().getTargetAsmInfo();
436
437 // Basic size info comes from the TSFlags field.
438 unsigned TSFlags = MI->getInstrDescriptor()->TSFlags;
439
440 switch ((TSFlags & ARMII::SizeMask) >> ARMII::SizeShift) {
441 default:
442 // If this machine instr is an inline asm, measure it.
443 if (MI->getOpcode() == ARM::INLINEASM)
444 return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName());
445 assert(0 && "Unknown or unset size field for instr!");
446 break;
447 case ARMII::Size8Bytes: return 8; // Arm instruction x 2.
448 case ARMII::Size4Bytes: return 4; // Arm instruction.
449 case ARMII::Size2Bytes: return 2; // Thumb instruction.
450 case ARMII::SizeSpecial: {
451 switch (MI->getOpcode()) {
452 case ARM::CONSTPOOL_ENTRY:
453 // If this machine instr is a constant pool entry, its size is recorded as
454 // operand #2.
455 return MI->getOperand(2).getImm();
456 case ARM::BR_JTr:
457 case ARM::BR_JTm:
458 case ARM::BR_JTadd: {
459 // These are jumptable branches, i.e. a branch followed by an inlined
460 // jumptable. The size is 4 + 4 * number of entries.
461 unsigned JTI = MI->getOperand(MI->getNumOperands()-2).getJumpTableIndex();
462 MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
463 const std::vector &JT = MJTI->getJumpTables();
464 assert(JTI < JT.size());
465 return getNumJTEntries(JT, JTI) * 4 + 4;
466 }
467 default:
468 // Otherwise, pseudo-instruction sizes are zero.
469 return 0;
470 }
471 }
472 }
473 }
474
475 /// GetFunctionSize - Returns the size of the specified MachineFunction.
476 ///
477 unsigned ARM::GetFunctionSize(MachineFunction &MF) {
478 unsigned FnSize = 0;
479 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
480 MBBI != E; ++MBBI) {
481 MachineBasicBlock &MBB = *MBBI;
482 for (MachineBasicBlock::iterator I = MBB.begin(),E = MBB.end(); I != E; ++I)
483 FnSize += ARM::GetInstSize(I);
484 }
485 return FnSize;
486 }
103103 virtual bool ReverseBranchCondition(std::vector &Cond) const;
104104 };
105105
106 // Utility routines
107 namespace ARM {
108 /// GetInstSize - Returns the size of the specified MachineInstr.
109 ///
110 unsigned GetInstSize(MachineInstr *MI);
111
112 /// GetFunctionSize - Returns the size of the specified MachineFunction.
113 ///
114 unsigned GetFunctionSize(MachineFunction &MF);
115 }
106116 }
107117
108118 #endif