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Merging r214180: ------------------------------------------------------------------------ r214180 | sstankovic | 2014-07-29 15:39:24 +0100 (Tue, 29 Jul 2014) | 5 lines [mips] Don't use odd-numbered single precision registers for fastcc calling convention if -mno-odd-spreg is used. Differential Revision: http://reviews.llvm.org/D4682 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@214304 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 5 years ago
3 changed file(s) with 92 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
202202 CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3, T4, T5, V1]>>>,
203203
204204 // f32 arguments are passed in single-precision floating pointer registers.
205 CCIfType<[f32], CCAssignToReg<[F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10,
206 F11, F12, F13, F14, F15, F16, F17, F18, F19]>>,
205 CCIfType<[f32], CCIfSubtarget<"useOddSPReg()",
206 CCAssignToReg<[F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13,
207 F14, F15, F16, F17, F18, F19]>>>,
208
209 // Don't use odd numbered single-precision registers for -mno-odd-spreg.
210 CCIfType<[f32], CCIfSubtarget<"noOddSPReg()",
211 CCAssignToReg<[F0, F2, F4, F6, F8, F10, F12, F14, F16, F18]>>>,
207212
208213 // Stack parameter slots for i32 and f32 are 32-bit words and 4-byte aligned.
209214 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
202202 bool isFPXX() const { return IsFPXX; }
203203 bool isFP64bit() const { return IsFP64bit; }
204204 bool useOddSPReg() const { return UseOddSPReg; }
205 bool noOddSPReg() const { return !UseOddSPReg; }
205206 bool isNaN2008() const { return IsNaN2008bit; }
206207 bool isNotFP64bit() const { return !IsFP64bit; }
207208 bool isGP64bit() const { return IsGP64bit; }
0 ; RUN: llc < %s -march=mipsel | FileCheck %s
11 ; RUN: llc < %s -mtriple=mipsel-none-nacl-gnu \
22 ; RUN: | FileCheck %s -check-prefix=CHECK-NACL
3 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -mattr=+nooddspreg | FileCheck %s -check-prefix=NOODDSPREG
34
45
56 @gi0 = external global i32
7980 @g15 = external global i32
8081 @g16 = external global i32
8182
83 @fa = common global [11 x float] zeroinitializer, align 4
84
8285 define void @caller0() nounwind {
8386 entry:
8487 ; CHECK: caller0
263266 ret void
264267 }
265268
269 define void @caller2() {
270 entry:
271
272 ; NOODDSPREG-LABEL: caller2
273
274 ; Check that first 10 arguments are passed in even float registers
275 ; f0, f2, ... , f18. Check that 11th argument is passed on stack.
276
277 ; NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(fa)(${{[0-9]+|gp}})
278 ; NOODDSPREG-DAG: lwc1 $f0, 0($[[R0]])
279 ; NOODDSPREG-DAG: lwc1 $f2, 4($[[R0]])
280 ; NOODDSPREG-DAG: lwc1 $f4, 8($[[R0]])
281 ; NOODDSPREG-DAG: lwc1 $f6, 12($[[R0]])
282 ; NOODDSPREG-DAG: lwc1 $f8, 16($[[R0]])
283 ; NOODDSPREG-DAG: lwc1 $f10, 20($[[R0]])
284 ; NOODDSPREG-DAG: lwc1 $f12, 24($[[R0]])
285 ; NOODDSPREG-DAG: lwc1 $f14, 28($[[R0]])
286 ; NOODDSPREG-DAG: lwc1 $f16, 32($[[R0]])
287 ; NOODDSPREG-DAG: lwc1 $f18, 36($[[R0]])
288
289 ; NOODDSPREG-DAG: lwc1 $[[F0:f[0-9]*[02468]]], 40($[[R0]])
290 ; NOODDSPREG-DAG: swc1 $[[F0]], 0($sp)
291
292 %0 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 0), align 4
293 %1 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 1), align 4
294 %2 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 2), align 4
295 %3 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 3), align 4
296 %4 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 4), align 4
297 %5 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 5), align 4
298 %6 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 6), align 4
299 %7 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 7), align 4
300 %8 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 8), align 4
301 %9 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 9), align 4
302 %10 = load float* getelementptr ([11 x float]* @fa, i32 0, i32 10), align 4
303 tail call fastcc void @callee2(float %0, float %1, float %2, float %3,
304 float %4, float %5, float %6, float %7,
305 float %8, float %9, float %10)
306 ret void
307 }
308
309 define fastcc void @callee2(float %a0, float %a1, float %a2, float %a3,
310 float %a4, float %a5, float %a6, float %a7,
311 float %a8, float %a9, float %a10) {
312 entry:
313
314 ; NOODDSPREG-LABEL: callee2
315
316 ; NOODDSPREG: addiu $sp, $sp, -[[OFFSET:[0-9]+]]
317
318 ; Check that first 10 arguments are received in even float registers
319 ; f0, f2, ... , f18. Check that 11th argument is received on stack.
320
321 ; NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(fa)(${{[0-9]+|gp}})
322 ; NOODDSPREG-DAG: swc1 $f0, 0($[[R0]])
323 ; NOODDSPREG-DAG: swc1 $f2, 4($[[R0]])
324 ; NOODDSPREG-DAG: swc1 $f4, 8($[[R0]])
325 ; NOODDSPREG-DAG: swc1 $f6, 12($[[R0]])
326 ; NOODDSPREG-DAG: swc1 $f8, 16($[[R0]])
327 ; NOODDSPREG-DAG: swc1 $f10, 20($[[R0]])
328 ; NOODDSPREG-DAG: swc1 $f12, 24($[[R0]])
329 ; NOODDSPREG-DAG: swc1 $f14, 28($[[R0]])
330 ; NOODDSPREG-DAG: swc1 $f16, 32($[[R0]])
331 ; NOODDSPREG-DAG: swc1 $f18, 36($[[R0]])
332
333 ; NOODDSPREG-DAG: lwc1 $[[F0:f[0-9]*[02468]]], [[OFFSET]]($sp)
334 ; NOODDSPREG-DAG: swc1 $[[F0]], 40($[[R0]])
335
336 store float %a0, float* getelementptr ([11 x float]* @fa, i32 0, i32 0), align 4
337 store float %a1, float* getelementptr ([11 x float]* @fa, i32 0, i32 1), align 4
338 store float %a2, float* getelementptr ([11 x float]* @fa, i32 0, i32 2), align 4
339 store float %a3, float* getelementptr ([11 x float]* @fa, i32 0, i32 3), align 4
340 store float %a4, float* getelementptr ([11 x float]* @fa, i32 0, i32 4), align 4
341 store float %a5, float* getelementptr ([11 x float]* @fa, i32 0, i32 5), align 4
342 store float %a6, float* getelementptr ([11 x float]* @fa, i32 0, i32 6), align 4
343 store float %a7, float* getelementptr ([11 x float]* @fa, i32 0, i32 7), align 4
344 store float %a8, float* getelementptr ([11 x float]* @fa, i32 0, i32 8), align 4
345 store float %a9, float* getelementptr ([11 x float]* @fa, i32 0, i32 9), align 4
346 store float %a10, float* getelementptr ([11 x float]* @fa, i32 0, i32 10), align 4
347 ret void
348 }
349