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AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency Differential Revision: https://reviews.llvm.org/D38957 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316097 91177308-0d34-0410-b5e6-96231b3b80d8 Konstantin Zhuravlyov 1 year, 10 months ago
8 changed file(s) with 16 addition(s) and 16 deletion(s). Raw diff Collapse all Expand all
12071207 registers used by
12081208 each work-item for
12091209 GFX6-GFX9
1210 "MaxFlatWorkgroupSize" integer Maximum flat
1210 "MaxFlatWorkGroupSize" integer Maximum flat
12111211 work-group size
12121212 supported by the
12131213 kernel in work-items.
14501450 then additional space must
14511451 be added to this value for
14521452 the call stack.
1453 95:64 4 bytes MaxFlatWorkgroupSize Maximum flat work-group
1453 95:64 4 bytes MaxFlatWorkGroupSize Maximum flat work-group
14541454 size supported by the
14551455 kernel in work-items.
14561456 96 1 bit IsDynamicCallStack Indicates if the generated
108108 struct KernelDescriptor final {
109109 uint32_t GroupSegmentFixedSize;
110110 uint32_t PrivateSegmentFixedSize;
111 uint32_t MaxFlatWorkgroupSize;
111 uint32_t MaxFlatWorkGroupSize;
112112 uint64_t IsDynamicCallStack : 1;
113113 uint64_t IsXNACKEnabled : 1;
114114 uint64_t Reserved0 : 30;
237237 constexpr char NumSGPRs[] = "NumSGPRs";
238238 /// \brief Key for Kernel::CodeProps::Metadata::mNumVGPRs.
239239 constexpr char NumVGPRs[] = "NumVGPRs";
240 /// \brief Key for Kernel::CodeProps::Metadata::mMaxFlatWorkgroupSize.
241 constexpr char MaxFlatWorkgroupSize[] = "MaxFlatWorkgroupSize";
240 /// \brief Key for Kernel::CodeProps::Metadata::mMaxFlatWorkGroupSize.
241 constexpr char MaxFlatWorkGroupSize[] = "MaxFlatWorkGroupSize";
242242 /// \brief Key for Kernel::CodeProps::Metadata::mIsDynamicCallStack.
243243 constexpr char IsDynamicCallStack[] = "IsDynamicCallStack";
244244 /// \brief Key for Kernel::CodeProps::Metadata::mIsXNACKEnabled.
267267 /// \brief Total number of VGPRs used by a workitem. Optional.
268268 uint16_t mNumVGPRs = 0;
269269 /// \brief Maximum flat work-group size supported by the kernel. Optional.
270 uint32_t mMaxFlatWorkgroupSize = 0;
270 uint32_t mMaxFlatWorkGroupSize = 0;
271271 /// \brief True if the generated machine code is using a dynamically sized
272272 /// call stack. Optional.
273273 bool mIsDynamicCallStack = false;
141141 MD.mNumSGPRs, uint16_t(0));
142142 YIO.mapOptional(Kernel::CodeProps::Key::NumVGPRs,
143143 MD.mNumVGPRs, uint16_t(0));
144 YIO.mapOptional(Kernel::CodeProps::Key::MaxFlatWorkgroupSize,
145 MD.mMaxFlatWorkgroupSize, uint32_t(0));
144 YIO.mapOptional(Kernel::CodeProps::Key::MaxFlatWorkGroupSize,
145 MD.mMaxFlatWorkGroupSize, uint32_t(0));
146146 YIO.mapOptional(Kernel::CodeProps::Key::IsDynamicCallStack,
147147 MD.mIsDynamicCallStack, false);
148148 YIO.mapOptional(Kernel::CodeProps::Key::IsXNACKEnabled,
11781178 HSACodeProps.mWavefrontSize = STM.getWavefrontSize();
11791179 HSACodeProps.mNumSGPRs = CurrentProgramInfo.NumSGPR;
11801180 HSACodeProps.mNumVGPRs = CurrentProgramInfo.NumVGPR;
1181 HSACodeProps.mMaxFlatWorkgroupSize = MFI.getMaxFlatWorkGroupSize();
1181 HSACodeProps.mMaxFlatWorkGroupSize = MFI.getMaxFlatWorkGroupSize();
11821182 HSACodeProps.mIsDynamicCallStack = ProgramInfo.DynamicCallStack;
11831183 HSACodeProps.mIsXNACKEnabled = STM.isXNACKEnabled();
11841184
132132 ; HSAMD: Version: [ 1, 0 ]
133133 ; HSAMD: Kernels:
134134 ; HSAMD: - Name: min_64_max_64
135 ; HSAMD: MaxFlatWorkgroupSize: 64
135 ; HSAMD: MaxFlatWorkGroupSize: 64
136136 ; HSAMD: - Name: min_64_max_128
137 ; HSAMD: MaxFlatWorkgroupSize: 128
137 ; HSAMD: MaxFlatWorkGroupSize: 128
138138 ; HSAMD: - Name: min_128_max_128
139 ; HSAMD: MaxFlatWorkgroupSize: 128
139 ; HSAMD: MaxFlatWorkGroupSize: 128
140140 ; HSAMD: - Name: min_1024_max_2048
141 ; HSAMD: MaxFlatWorkgroupSize: 2048
141 ; HSAMD: MaxFlatWorkGroupSize: 2048
1919 ; GFX700: NumVGPRs: 4
2020 ; GFX800: NumVGPRs: 6
2121 ; GFX900: NumVGPRs: 6
22 ; CHECK: MaxFlatWorkgroupSize: 256
22 ; CHECK: MaxFlatWorkGroupSize: 256
2323 define amdgpu_kernel void @test(
2424 half addrspace(1)* %r,
2525 half addrspace(1)* %a,
1212 // CHECK: PrivateSegmentFixedSize: 16
1313 // CHECK: KernargSegmentAlign: 16
1414 // CHECK: WavefrontSize: 64
15 // CHECK: MaxFlatWorkgroupSize: 256
15 // CHECK: MaxFlatWorkGroupSize: 256
1616 .amd_amdgpu_hsa_metadata
1717 Version: [ 1, 0 ]
1818 Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
2525 PrivateSegmentFixedSize: 16
2626 KernargSegmentAlign: 16
2727 WavefrontSize: 64
28 MaxFlatWorkgroupSize: 256
28 MaxFlatWorkGroupSize: 256
2929 .end_amd_amdgpu_hsa_metadata