llvm.org GIT mirror llvm / 27f5acb
Fix DWARF description of S registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129947 91177308-0d34-0410-b5e6-96231b3b80d8 Devang Patel 9 years ago
3 changed file(s) with 160 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
171171 return Location;
172172 }
173173
174 /// EmitDwarfRegOp - Emit dwarf register operation.
175 void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const {
176 const TargetRegisterInfo *RI = TM.getRegisterInfo();
177 if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1)
178 AsmPrinter::EmitDwarfRegOp(MLoc);
179 else {
180 unsigned Reg = MLoc.getReg();
181 if (Reg >= ARM::S0 && Reg <= ARM::S31) {
182 // S registers are described as bit-pieces of a register
183 // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0)
184 // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32)
185
186 unsigned SReg = Reg - ARM::S0;
187 bool odd = SReg & 0x1;
188 unsigned Rx = 256 + (SReg >> 1);
189 OutStreamer.AddComment("Loc expr size");
190 // DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB
191 // 1 + ULEB(Rx) + 1 + 1 + 1
192 EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx));
193
194 OutStreamer.AddComment("DW_OP_regx for S register");
195 EmitInt8(dwarf::DW_OP_regx);
196
197 OutStreamer.AddComment(Twine(SReg));
198 EmitULEB128(Rx);
199
200 if (odd) {
201 OutStreamer.AddComment("DW_OP_bit_piece 32 32");
202 EmitInt8(dwarf::DW_OP_bit_piece);
203 EmitULEB128(32);
204 EmitULEB128(32);
205 } else {
206 OutStreamer.AddComment("DW_OP_bit_piece 32 0");
207 EmitInt8(dwarf::DW_OP_bit_piece);
208 EmitULEB128(32);
209 EmitULEB128(0);
210 }
211 }
212 }
213 }
214
174215 void ARMAsmPrinter::EmitFunctionEntryLabel() {
175216 if (AFI->isThumbFunction()) {
176217 OutStreamer.EmitAssemblerFlag(MCAF_Code16);
8888
8989 MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
9090
91 /// EmitDwarfRegOp - Emit dwarf register operation.
92 virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const;
93
9194 virtual unsigned getISAEncoding() {
9295 // ARM/Darwin adds ISA to the DWARF info for each function.
9396 if (!Subtarget->isTargetDarwin())
0 ; RUN: llc < %s - | FileCheck %s
1 ; Radar 9309221
2 ; Test dwarf reg no for s16
3 ;CHECK: DW_OP_regx for S register
4 ;CHECK-NEXT: byte
5 ;CHECK-NEXT: byte
6 ;CHECK-NEXT: DW_OP_bit_piece 32 0
7
8 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
9 target triple = "thumbv7-apple-macosx10.6.7"
10
11 @.str = private unnamed_addr constant [11 x i8] c"%p %lf %c\0A\00"
12 @.str1 = private unnamed_addr constant [6 x i8] c"point\00"
13
14 define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp {
15 entry:
16 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !8), !dbg !24
17 tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !10), !dbg !25
18 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !12), !dbg !26
19 %conv = fpext float %val to double, !dbg !27
20 %conv3 = zext i8 %c to i32, !dbg !27
21 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27
22 ret i32 0, !dbg !29
23 }
24
25 declare i32 @printf(i8* nocapture, ...) nounwind optsize
26
27 define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp {
28 entry:
29 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !14), !dbg !30
30 tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !15), !dbg !31
31 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !16), !dbg !32
32 %conv = fpext float %val to double, !dbg !33
33 %conv3 = zext i8 %c to i32, !dbg !33
34 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33
35 ret i32 0, !dbg !35
36 }
37
38 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp {
39 entry:
40 tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !17), !dbg !36
41 tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !18), !dbg !37
42 %conv = sitofp i32 %argc to double, !dbg !38
43 %add = fadd double %conv, 5.555552e+05, !dbg !38
44 %conv1 = fptrunc double %add to float, !dbg !38
45 tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !22), !dbg !38
46 %call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39
47 %add.ptr = getelementptr i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40
48 %add5 = add nsw i32 %argc, 97, !dbg !40
49 %conv6 = trunc i32 %add5 to i8, !dbg !40
50 tail call void @llvm.dbg.value(metadata !{i8* %add.ptr}, i64 0, metadata !8) nounwind, !dbg !41
51 tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !10) nounwind, !dbg !42
52 tail call void @llvm.dbg.value(metadata !{i8 %conv6}, i64 0, metadata !12) nounwind, !dbg !43
53 %conv.i = fpext float %conv1 to double, !dbg !44
54 %conv3.i = and i32 %add5, 255, !dbg !44
55 %call.i = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44
56 %call14 = tail call i32 @printer(i8* %add.ptr, float %conv1, i8 zeroext %conv6) optsize, !dbg !45
57 ret i32 0, !dbg !46
58 }
59
60 declare i32 @puts(i8* nocapture) nounwind optsize
61
62 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
63
64 !llvm.dbg.sp = !{!0, !6, !7}
65 !llvm.dbg.lv.inlineprinter = !{!8, !10, !12}
66 !llvm.dbg.lv.printer = !{!14, !15, !16}
67 !llvm.dbg.lv.main = !{!17, !18, !22}
68
69 !0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"inlineprinter", metadata !"inlineprinter", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i8*, float, i8)* @inlineprinter, null} ; [ DW_TAG_subprogram ]
70 !1 = metadata !{i32 589865, metadata !"a.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ]
71 !2 = metadata !{i32 589841, i32 0, i32 12, metadata !"a.c", metadata !"/private/tmp", metadata !"clang version 3.0 (trunk 129915)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
72 !3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
73 !4 = metadata !{metadata !5}
74 !5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
75 !6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"printer", metadata !"printer", metadata !"", metadata !1, i32 12, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i8*, float, i8)* @printer, null} ; [ DW_TAG_subprogram ]
76 !7 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 18, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main, null} ; [ DW_TAG_subprogram ]
77 !8 = metadata !{i32 590081, metadata !0, metadata !"ptr", metadata !1, i32 16777220, metadata !9, i32 0} ; [ DW_TAG_arg_variable ]
78 !9 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ]
79 !10 = metadata !{i32 590081, metadata !0, metadata !"val", metadata !1, i32 33554436, metadata !11, i32 0} ; [ DW_TAG_arg_variable ]
80 !11 = metadata !{i32 589860, metadata !2, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
81 !12 = metadata !{i32 590081, metadata !0, metadata !"c", metadata !1, i32 50331652, metadata !13, i32 0} ; [ DW_TAG_arg_variable ]
82 !13 = metadata !{i32 589860, metadata !2, metadata !"unsigned char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 8} ; [ DW_TAG_base_type ]
83 !14 = metadata !{i32 590081, metadata !6, metadata !"ptr", metadata !1, i32 16777227, metadata !9, i32 0} ; [ DW_TAG_arg_variable ]
84 !15 = metadata !{i32 590081, metadata !6, metadata !"val", metadata !1, i32 33554443, metadata !11, i32 0} ; [ DW_TAG_arg_variable ]
85 !16 = metadata !{i32 590081, metadata !6, metadata !"c", metadata !1, i32 50331659, metadata !13, i32 0} ; [ DW_TAG_arg_variable ]
86 !17 = metadata !{i32 590081, metadata !7, metadata !"argc", metadata !1, i32 16777233, metadata !5, i32 0} ; [ DW_TAG_arg_variable ]
87 !18 = metadata !{i32 590081, metadata !7, metadata !"argv", metadata !1, i32 33554449, metadata !19, i32 0} ; [ DW_TAG_arg_variable ]
88 !19 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !20} ; [ DW_TAG_pointer_type ]
89 !20 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !21} ; [ DW_TAG_pointer_type ]
90 !21 = metadata !{i32 589860, metadata !2, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ]
91 !22 = metadata !{i32 590080, metadata !23, metadata !"dval", metadata !1, i32 19, metadata !11, i32 0} ; [ DW_TAG_auto_variable ]
92 !23 = metadata !{i32 589835, metadata !7, i32 18, i32 1, metadata !1, i32 2} ; [ DW_TAG_lexical_block ]
93 !24 = metadata !{i32 4, i32 22, metadata !0, null}
94 !25 = metadata !{i32 4, i32 33, metadata !0, null}
95 !26 = metadata !{i32 4, i32 52, metadata !0, null}
96 !27 = metadata !{i32 6, i32 3, metadata !28, null}
97 !28 = metadata !{i32 589835, metadata !0, i32 5, i32 1, metadata !1, i32 0} ; [ DW_TAG_lexical_block ]
98 !29 = metadata !{i32 7, i32 3, metadata !28, null}
99 !30 = metadata !{i32 11, i32 42, metadata !6, null}
100 !31 = metadata !{i32 11, i32 53, metadata !6, null}
101 !32 = metadata !{i32 11, i32 72, metadata !6, null}
102 !33 = metadata !{i32 13, i32 3, metadata !34, null}
103 !34 = metadata !{i32 589835, metadata !6, i32 12, i32 1, metadata !1, i32 1} ; [ DW_TAG_lexical_block ]
104 !35 = metadata !{i32 14, i32 3, metadata !34, null}
105 !36 = metadata !{i32 17, i32 15, metadata !7, null}
106 !37 = metadata !{i32 17, i32 28, metadata !7, null}
107 !38 = metadata !{i32 19, i32 31, metadata !23, null}
108 !39 = metadata !{i32 20, i32 3, metadata !23, null}
109 !40 = metadata !{i32 21, i32 3, metadata !23, null}
110 !41 = metadata !{i32 4, i32 22, metadata !0, metadata !40}
111 !42 = metadata !{i32 4, i32 33, metadata !0, metadata !40}
112 !43 = metadata !{i32 4, i32 52, metadata !0, metadata !40}
113 !44 = metadata !{i32 6, i32 3, metadata !28, metadata !40}
114 !45 = metadata !{i32 22, i32 3, metadata !23, null}
115 !46 = metadata !{i32 23, i32 1, metadata !23, null}