llvm.org GIT mirror llvm / 276365d
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 8 years ago
68 changed file(s) with 272 addition(s) and 237 deletion(s). Raw diff Collapse all Expand all
7979 std::string getString() const;
8080 void setString(const std::string &Initial);
8181
82 /// Set the CPU string. Replaces previous setting. Setting to "" clears CPU.
83 void setCPU(const std::string &String);
84
85 /// Setting CPU string only if no string is set.
86 void setCPUIfNone(const std::string &String);
87
88 /// Returns current CPU string.
89 const std::string & getCPU() const;
90
9182 /// Adding Features.
9283 void AddFeature(const std::string &String, bool IsEnabled = true);
9384
94 /// Get feature bits.
95 uint64_t getBits(const SubtargetFeatureKV *CPUTable,
96 size_t CPUTableSize,
97 const SubtargetFeatureKV *FeatureTable,
98 size_t FeatureTableSize);
85 /// Get feature bits of a CPU.
86 uint64_t getFeatureBits(const std::string &CPU,
87 const SubtargetFeatureKV *CPUTable,
88 size_t CPUTableSize,
89 const SubtargetFeatureKV *FeatureTable,
90 size_t FeatureTableSize);
9991
100 /// Get info pointer
101 void *getInfo(const SubtargetInfoKV *Table, size_t TableSize);
92 /// Get scheduling itinerary of a CPU.
93 void *getItinerary(const std::string &CPU,
94 const SubtargetInfoKV *Table, size_t TableSize);
10295
10396 /// Print feature string.
10497 void print(raw_ostream &OS) const;
108101
109102 /// Retrieve a formatted string of the default features for the specified
110103 /// target triple.
111 void getDefaultSubtargetFeatures(const std::string &CPU,
112 const Triple& Triple);
104 void getDefaultSubtargetFeatures(const Triple& Triple);
113105 };
114106
115107 } // End namespace llvm
7070 typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(void);
7171 typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T,
7272 const std::string &TT,
73 const std::string &CPU,
7374 const std::string &Features);
7475 typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM,
7576 MCStreamer &Streamer);
268269 /// either the target triple from the module, or the target triple of the
269270 /// host if that does not exist.
270271 TargetMachine *createTargetMachine(const std::string &Triple,
272 const std::string &CPU,
271273 const std::string &Features) const {
272274 if (!TargetMachineCtorFn)
273275 return 0;
274 return TargetMachineCtorFn(*this, Triple, Features);
276 return TargetMachineCtorFn(*this, Triple, CPU, Features);
275277 }
276278
277279 /// createAsmBackend - Create a target specific assembly parser.
795797
796798 private:
797799 static TargetMachine *Allocator(const Target &T, const std::string &TT,
800 const std::string &CPU,
798801 const std::string &FS) {
799 return new TargetMachineImpl(T, TT, FS);
802 return new TargetMachineImpl(T, TT, CPU, FS);
800803 }
801804 };
802805
7474
7575 // Package up features to be passed to target/subtarget
7676 std::string FeaturesStr;
77 if (!MCPU.empty() || !MAttrs.empty()) {
77 if (!MAttrs.empty()) {
7878 SubtargetFeatures Features;
79 Features.setCPU(MCPU);
8079 for (unsigned i = 0; i != MAttrs.size(); ++i)
8180 Features.AddFeature(MAttrs[i]);
8281 FeaturesStr = Features.getString();
8483
8584 // Allocate a target...
8685 TargetMachine *Target =
87 TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr);
86 TheTarget->createTargetMachine(TheTriple.getTriple(), MCPU, FeaturesStr);
8887 assert(Target && "Could not allocate target machine!");
8988 return Target;
9089 }
5454
5555 // Package up features to be passed to target/subtarget
5656 std::string FeaturesStr;
57 std::string CPU;
5758
5859 // FIXME: We shouldn't need to do this (and link in codegen).
5960 // When we split this out, we should do it in a way that makes
6061 // it straightforward to switch subtargets on the fly.
61 TargetMachine *TM = TheTarget->createTargetMachine(TripleName, FeaturesStr);
62 TargetMachine *TM = TheTarget->createTargetMachine(TripleName, CPU,
63 FeaturesStr);
6264 assert(TM && "Unable to create target machine!");
6365
6466 // Get the target assembler info needed to setup the context.
166166 if (!Tgt)
167167 return;
168168
169 std::string CPU;
169170 std::string featureString;
170
171 TargetMachine.reset(Tgt->createTargetMachine(tripleString,
171 TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
172172 featureString));
173173
174174 const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
6262 /// Split - Splits a string of comma separated items in to a vector of strings.
6363 ///
6464 static void Split(std::vector &V, const std::string &S) {
65 if (S.empty())
66 return;
67
6568 // Start at beginning of string.
6669 size_t Pos = 0;
6770 while (true) {
8790 std::string Result;
8891 // If the vector is not empty
8992 if (!V.empty()) {
90 // Start with the CPU feature
93 // Start with the first feature
9194 Result = V[0];
9295 // For each successive feature
9396 for (size_t i = 1; i < V.size(); i++) {
185188 Split(Features, LowercaseString(Initial));
186189 }
187190
188
189 /// setCPU - Set the CPU string. Replaces previous setting. Setting to ""
190 /// clears CPU.
191 void SubtargetFeatures::setCPU(const std::string &String) {
192 Features[0] = LowercaseString(String);
193 }
194
195
196 /// setCPUIfNone - Setting CPU string only if no string is set.
197 ///
198 void SubtargetFeatures::setCPUIfNone(const std::string &String) {
199 if (Features[0].empty()) setCPU(String);
200 }
201
202 /// getCPU - Returns current CPU.
203 ///
204 const std::string & SubtargetFeatures::getCPU() const {
205 return Features[0];
206 }
207
208
209191 /// SetImpliedBits - For each feature that is (transitively) implied by this
210192 /// feature, set it.
211193 ///
244226 }
245227 }
246228
247 /// getBits - Get feature bits.
248 ///
249 uint64_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
250 size_t CPUTableSize,
251 const SubtargetFeatureKV *FeatureTable,
252 size_t FeatureTableSize) {
229 /// getFeatureBits - Get feature bits a CPU.
230 ///
231 uint64_t SubtargetFeatures::getFeatureBits(const std::string &CPU,
232 const SubtargetFeatureKV *CPUTable,
233 size_t CPUTableSize,
234 const SubtargetFeatureKV *FeatureTable,
235 size_t FeatureTableSize) {
253236 assert(CPUTable && "missing CPU table");
254237 assert(FeatureTable && "missing features table");
255238 #ifndef NDEBUG
265248 uint64_t Bits = 0; // Resulting bits
266249
267250 // Check if help is needed
268 if (Features[0] == "help")
251 if (CPU == "help")
269252 Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
270253
271254 // Find CPU entry
272 const SubtargetFeatureKV *CPUEntry =
273 Find(Features[0], CPUTable, CPUTableSize);
255 const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
274256 // If there is a match
275257 if (CPUEntry) {
276258 // Set base feature bits
283265 SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
284266 }
285267 } else {
286 errs() << "'" << Features[0]
268 errs() << "'" << CPU
287269 << "' is not a recognized processor for this target"
288270 << " (ignoring processor)\n";
289271 }
290272 // Iterate through each feature
291 for (size_t i = 1; i < Features.size(); i++) {
273 for (size_t i = 0, E = Features.size(); i < E; i++) {
292274 const std::string &Feature = Features[i];
293275
294276 // Check for help
322304 return Bits;
323305 }
324306
325 /// Get info pointer
326 void *SubtargetFeatures::getInfo(const SubtargetInfoKV *Table,
327 size_t TableSize) {
307 /// Get scheduling itinerary of a CPU.
308 void *SubtargetFeatures::getItinerary(const std::string &CPU,
309 const SubtargetInfoKV *Table,
310 size_t TableSize) {
328311 assert(Table && "missing table");
329312 #ifndef NDEBUG
330313 for (size_t i = 1; i < TableSize; i++) {
333316 #endif
334317
335318 // Find entry
336 const SubtargetInfoKV *Entry = Find(Features[0], Table, TableSize);
319 const SubtargetInfoKV *Entry = Find(CPU, Table, TableSize);
337320
338321 if (Entry) {
339322 return Entry->Value;
340323 } else {
341 errs() << "'" << Features[0]
324 errs() << "'" << CPU
342325 << "' is not a recognized processor for this target"
343326 << " (ignoring processor)\n";
344327 return NULL;
366349 /// subtarget. It would be better if we could encode this information
367350 /// into the IR. See .
368351 ///
369 void SubtargetFeatures::getDefaultSubtargetFeatures(const std::string &CPU,
370 const Triple& Triple) {
371 setCPU(CPU);
372
352 void SubtargetFeatures::getDefaultSubtargetFeatures(const Triple& Triple) {
373353 if (Triple.getVendor() == Triple::Apple) {
374354 if (Triple.getArch() == Triple::ppc) {
375355 // powerpc-apple-*
2929 StrictAlign("arm-strict-align", cl::Hidden,
3030 cl::desc("Disallow all unaligned memory accesses"));
3131
32 ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
33 bool isT)
32 ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
33 const std::string &FS, bool isT)
3434 : ARMArchVersion(V4)
3535 , ARMProcFamily(Others)
3636 , ARMFPUType(None)
5555 , FPOnlySP(false)
5656 , AllowsUnalignedMem(false)
5757 , stackAlignment(4)
58 , CPUString("generic")
58 , CPUString(CPU)
5959 , TargetTriple(TT)
6060 , TargetABI(ARM_ABI_APCS) {
6161 // Determine default and user specified characteristics
6363 // When no arch is specified either by CPU or by attributes, make the default
6464 // ARMv4T.
6565 const char *ARMArchFeature = "";
66 if (CPUString.empty())
67 CPUString = "generic";
6668 if (CPUString == "generic" && (FS.empty() || FS == "generic")) {
6769 ARMArchVersion = V4T;
68 ARMArchFeature = ",+v4t";
70 ARMArchFeature = "+v4t";
6971 }
7072
7173 // Set the boolean corresponding to the current target triple, or the default
8486 unsigned SubVer = TT[Idx];
8587 if (SubVer >= '7' && SubVer <= '9') {
8688 ARMArchVersion = V7A;
87 ARMArchFeature = ",+v7a";
89 ARMArchFeature = "+v7a";
8890 if (Len >= Idx+2 && TT[Idx+1] == 'm') {
8991 ARMArchVersion = V7M;
90 ARMArchFeature = ",+v7m";
92 ARMArchFeature = "+v7m";
9193 }
9294 } else if (SubVer == '6') {
9395 ARMArchVersion = V6;
94 ARMArchFeature = ",+v6";
96 ARMArchFeature = "+v6";
9597 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2') {
9698 ARMArchVersion = V6T2;
97 ARMArchFeature = ",+v6t2";
99 ARMArchFeature = "+v6t2";
98100 }
99101 } else if (SubVer == '5') {
100102 ARMArchVersion = V5T;
101 ARMArchFeature = ",+v5t";
103 ARMArchFeature = "+v5t";
102104 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e') {
103105 ARMArchVersion = V5TE;
104 ARMArchFeature = ",+v5te";
106 ARMArchFeature = "+v5te";
105107 }
106108 } else if (SubVer == '4') {
107109 if (Len >= Idx+2 && TT[Idx+1] == 't') {
108110 ARMArchVersion = V4T;
109 ARMArchFeature = ",+v4t";
111 ARMArchFeature = "+v4t";
110112 } else {
111113 ARMArchVersion = V4;
112114 ARMArchFeature = "";
128130 FSWithArch = std::string(ARMArchFeature) + FS;
129131 else
130132 FSWithArch = FS;
131 CPUString = ParseSubtargetFeatures(FSWithArch, CPUString);
133 ParseSubtargetFeatures(FSWithArch, CPUString);
132134
133135 // After parsing Itineraries, set ItinData.IssueWidth.
134136 computeIssueWidth();
152152 /// This constructor initializes the data members to match that
153153 /// of the specified triple.
154154 ///
155 ARMSubtarget(const std::string &TT, const std::string &FS, bool isThumb);
155 ARMSubtarget(const std::string &TT, const std::string &CPU,
156 const std::string &FS, bool isThumb);
156157
157158 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
158159 /// that still makes it profitable to inline the call.
163164 }
164165 /// ParseSubtargetFeatures - Parses features string setting specified
165166 /// subtarget options. Definition of function is auto generated by tblgen.
166 std::string ParseSubtargetFeatures(const std::string &FS,
167 const std::string &CPU);
167 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
168168
169169 void computeIssueWidth();
170170
7777 ///
7878 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
7979 const std::string &TT,
80 const std::string &CPU,
8081 const std::string &FS,
8182 bool isThumb)
8283 : LLVMTargetMachine(T, TT),
83 Subtarget(TT, FS, isThumb),
84 Subtarget(TT, CPU, FS, isThumb),
8485 JITInfo(),
8586 InstrItins(Subtarget.getInstrItineraryData()) {
8687 DefRelocModel = getRelocationModel();
9192 }
9293
9394 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
95 const std::string &CPU,
9496 const std::string &FS)
95 : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
97 : ARMBaseTargetMachine(T, TT, CPU, FS, false), InstrInfo(Subtarget),
9698 DataLayout(Subtarget.isAPCS_ABI() ?
9799 std::string("e-p:32:32-f64:32:64-i64:32:64-"
98100 "v128:32:128-v64:32:64-n32") :
108110 }
109111
110112 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
113 const std::string &CPU,
111114 const std::string &FS)
112 : ARMBaseTargetMachine(T, TT, FS, true),
115 : ARMBaseTargetMachine(T, TT, CPU, FS, true),
113116 InstrInfo(Subtarget.hasThumb2()
114117 ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
115118 : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
4040
4141 public:
4242 ARMBaseTargetMachine(const Target &T, const std::string &TT,
43 const std::string &FS, bool isThumb);
43 const std::string &CPU, const std::string &FS,
44 bool isThumb);
4445
4546 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
4647 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
6970 ARMFrameLowering FrameLowering;
7071 public:
7172 ARMTargetMachine(const Target &T, const std::string &TT,
72 const std::string &FS);
73 const std::string &CPU, const std::string &FS);
7374
7475 virtual const ARMRegisterInfo *getRegisterInfo() const {
7576 return &InstrInfo.getRegisterInfo();
108109 OwningPtr FrameLowering;
109110 public:
110111 ThumbTargetMachine(const Target &T, const std::string &TT,
111 const std::string &FS);
112 const std::string &CPU, const std::string &FS);
112113
113114 /// returns either Thumb1RegisterInfo or Thumb2RegisterInfo
114115 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
8686 : ARMBaseAsmLexer(T, MAI) {
8787 std::string tripleString("arm-unknown-unknown");
8888 std::string featureString;
89 std::string CPU;
8990 OwningPtr
90 targetMachine(T.createTargetMachine(tripleString, featureString));
91 targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
9192 InitRegisterMap(targetMachine->getRegisterInfo());
9293 }
9394 };
9899 : ARMBaseAsmLexer(T, MAI) {
99100 std::string tripleString("thumb-unknown-unknown");
100101 std::string featureString;
102 std::string CPU;
101103 OwningPtr
102 targetMachine(T.createTargetMachine(tripleString, featureString));
104 targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
103105 InitRegisterMap(targetMachine->getRegisterInfo());
104106 }
105107 };
1515 #include "AlphaGenSubtarget.inc"
1616 using namespace llvm;
1717
18 AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &FS)
18 AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &CPU,
19 const std::string &FS)
1920 : HasCT(false) {
20 std::string CPU = "generic";
21 std::string CPUName = CPU;
22 if (CPUName.empty())
23 CPUName = "generic";
2124
2225 // Parse features string.
23 ParseSubtargetFeatures(FS, CPU);
26 ParseSubtargetFeatures(FS, CPUName);
2427 }
3030 /// This constructor initializes the data members to match that
3131 /// of the specified triple.
3232 ///
33 AlphaSubtarget(const std::string &TT, const std::string &FS);
33 AlphaSubtarget(const std::string &TT, const std::string &CPU,
34 const std::string &FS);
3435
3536 /// ParseSubtargetFeatures - Parses features string setting specified
3637 /// subtarget options. Definition of function is auto generated by tblgen.
37 std::string ParseSubtargetFeatures(const std::string &FS,
38 const std::string &CPU);
38 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
3939
4040 bool hasCT() const { return HasCT; }
4141 };
2424 }
2525
2626 AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,
27 const std::string &CPU,
2728 const std::string &FS)
2829 : LLVMTargetMachine(T, TT),
2930 DataLayout("e-f128:128:128-n64"),
3031 FrameLowering(Subtarget),
31 Subtarget(TT, FS),
32 Subtarget(TT, CPU, FS),
3233 TLInfo(*this),
3334 TSInfo(*this) {
3435 setRelocationModel(Reloc::PIC_);
3636
3737 public:
3838 AlphaTargetMachine(const Target &T, const std::string &TT,
39 const std::string &FS);
39 const std::string &CPU, const std::string &FS);
4040
4141 virtual const AlphaInstrInfo *getInstrInfo() const { return &InstrInfo; }
4242 virtual const TargetFrameLowering *getFrameLowering() const {
1616 using namespace llvm;
1717
1818 BlackfinSubtarget::BlackfinSubtarget(const std::string &TT,
19 const std::string &CPU,
1920 const std::string &FS)
2021 : sdram(false),
2122 icplb(false),
2930 wa_killed_mmr(false),
3031 wa_rets(false)
3132 {
32 std::string CPU = "generic";
33 std::string CPUName = CPU;
34 if (CPUName.empty())
35 CPUName = "generic";
3336 // Parse features string.
34 ParseSubtargetFeatures(FS, CPU);
37 ParseSubtargetFeatures(FS, CPUName);
3538 }
3131 bool wa_killed_mmr;
3232 bool wa_rets;
3333 public:
34 BlackfinSubtarget(const std::string &TT, const std::string &FS);
34 BlackfinSubtarget(const std::string &TT, const std::string &CPU,
35 const std::string &FS);
3536
3637 /// ParseSubtargetFeatures - Parses features string setting specified
3738 /// subtarget options. Definition of function is auto generated by tblgen.
38 std::string ParseSubtargetFeatures(const std::string &FS,
39 void ParseSubtargetFeatures(const std::string &FS,
3940 const std::string &CPU);
4041 };
4142
2525
2626 BlackfinTargetMachine::BlackfinTargetMachine(const Target &T,
2727 const std::string &TT,
28 const std::string &CPU,
2829 const std::string &FS)
2930 : LLVMTargetMachine(T, TT),
3031 DataLayout("e-p:32:32-i64:32-f64:32-n32"),
31 Subtarget(TT, FS),
32 Subtarget(TT, CPU, FS),
3233 TLInfo(*this),
3334 TSInfo(*this),
3435 InstrInfo(Subtarget),
3535 BlackfinIntrinsicInfo IntrinsicInfo;
3636 public:
3737 BlackfinTargetMachine(const Target &T, const std::string &TT,
38 const std::string &FS);
38 const std::string &CPU, const std::string &FS);
3939
4040 virtual const BlackfinInstrInfo *getInstrInfo() const { return &InstrInfo; }
4141 virtual const TargetFrameLowering *getFrameLowering() const {
1919 namespace llvm {
2020
2121 struct CTargetMachine : public TargetMachine {
22 CTargetMachine(const Target &T, const std::string &TT, const std::string &FS)
22 CTargetMachine(const Target &T, const std::string &TT,
23 const std::string &CPU, const std::string &FS)
2324 : TargetMachine(T) {}
2425
2526 virtual bool addPassesToEmitFile(PassManagerBase &PM,
1818
1919 using namespace llvm;
2020
21 SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &FS) :
21 SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &CPU,
22 const std::string &FS) :
2223 StackAlignment(16),
2324 ProcDirective(SPU::DEFAULT_PROC),
2425 UseLargeMem(false)
4848 /// This constructor initializes the data members to match that
4949 /// of the specified triple.
5050 ///
51 SPUSubtarget(const std::string &TT, const std::string &FS);
51 SPUSubtarget(const std::string &TT, const std::string &CPU,
52 const std::string &FS);
5253
5354 /// ParseSubtargetFeatures - Parses features string setting specified
5455 /// subtarget options. Definition of function is auto generated by tblgen.
55 std::string ParseSubtargetFeatures(const std::string &FS,
56 const std::string &CPU);
56 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
5757
5858 /// SetJITMode - This is called to inform the subtarget info that we are
5959 /// producing code for the JIT.
3434 }
3535
3636 SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT,
37 const std::string &FS)
37 const std::string &CPU,const std::string &FS)
3838 : LLVMTargetMachine(T, TT),
39 Subtarget(TT, FS),
39 Subtarget(TT, CPU, FS),
4040 DataLayout(Subtarget.getTargetDataString()),
4141 InstrInfo(*this),
4242 FrameLowering(Subtarget),
3838 InstrItineraryData InstrItins;
3939 public:
4040 SPUTargetMachine(const Target &T, const std::string &TT,
41 const std::string &FS);
41 const std::string &CPU, const std::string &FS);
4242
4343 /// Return the subtarget implementation object
4444 virtual const SPUSubtarget *getSubtargetImpl() const {
2222
2323 struct CPPTargetMachine : public TargetMachine {
2424 CPPTargetMachine(const Target &T, const std::string &TT,
25 const std::string &FS)
25 const std::string &CPU, const std::string &FS)
2626 : TargetMachine(T) {}
2727
2828 virtual bool addPassesToEmitFile(PassManagerBase &PM,
8585 : MBlazeBaseAsmLexer(T, MAI) {
8686 std::string tripleString("mblaze-unknown-unknown");
8787 std::string featureString;
88 std::string CPU;
8889 OwningPtr
89 targetMachine(T.createTargetMachine(tripleString, featureString));
90 targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
9091 InitRegisterMap(targetMachine->getRegisterInfo());
9192 }
9293 };
1717 #include "llvm/Support/CommandLine.h"
1818 using namespace llvm;
1919
20 MBlazeSubtarget::MBlazeSubtarget(const std::string &TT, const std::string &FS):
20 MBlazeSubtarget::MBlazeSubtarget(const std::string &TT,
21 const std::string &CPU,
22 const std::string &FS):
2123 HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false),
2224 HasFPU(false), HasMul64(false), HasSqrt(false)
2325 {
2426 // Parse features string.
25 std::string CPU = "mblaze";
26 CPU = ParseSubtargetFeatures(FS, CPU);
27 std::string CPUName = CPU;
28 if (CPUName.empty())
29 CPUName = "mblaze";
30 ParseSubtargetFeatures(FS, CPUName);
2731
2832 // Only use instruction scheduling if the selected CPU has an instruction
2933 // itinerary (the default CPU is the only one that doesn't).
30 HasItin = CPU != "mblaze";
31 DEBUG(dbgs() << "CPU " << CPU << "(" << HasItin << ")\n");
34 HasItin = CPUName != "mblaze";
35 DEBUG(dbgs() << "CPU " << CPUName << "(" << HasItin << ")\n");
3236
3337 // Compute the issue width of the MBlaze itineraries
3438 computeIssueWidth();
3737
3838 /// This constructor initializes the data members to match that
3939 /// of the specified triple.
40 MBlazeSubtarget(const std::string &TT, const std::string &FS);
40 MBlazeSubtarget(const std::string &TT, const std::string &CPU,
41 const std::string &FS);
4142
4243 /// ParseSubtargetFeatures - Parses features string setting specified
4344 /// subtarget options. Definition of function is auto generated by tblgen.
44 std::string ParseSubtargetFeatures(const std::string &FS,
45 const std::string &CPU);
45 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
4646
4747 /// Compute the number of maximum number of issues per cycle for the
4848 /// MBlaze scheduling itineraries.
7979 // an easier handling.
8080 MBlazeTargetMachine::
8181 MBlazeTargetMachine(const Target &T, const std::string &TT,
82 const std::string &FS):
82 const std::string &CPU, const std::string &FS):
8383 LLVMTargetMachine(T, TT),
84 Subtarget(TT, FS),
84 Subtarget(TT, CPU, FS),
8585 DataLayout("E-p:32:32:32-i8:8:8-i16:16:16"),
8686 InstrInfo(*this),
8787 FrameLowering(Subtarget),
4141
4242 public:
4343 MBlazeTargetMachine(const Target &T, const std::string &TT,
44 const std::string &FS);
44 const std::string &CPU, const std::string &FS);
4545
4646 virtual const MBlazeInstrInfo *getInstrInfo() const
4747 { return &InstrInfo; }
1616
1717 using namespace llvm;
1818
19 MSP430Subtarget::MSP430Subtarget(const std::string &TT, const std::string &FS) {
19 MSP430Subtarget::MSP430Subtarget(const std::string &TT,
20 const std::string &CPUIgnored,
21 const std::string &FS) {
2022 std::string CPU = "generic";
2123
2224 // Parse features string.
2525 /// This constructor initializes the data members to match that
2626 /// of the specified triple.
2727 ///
28 MSP430Subtarget(const std::string &TT, const std::string &FS);
28 MSP430Subtarget(const std::string &TT, const std::string &CPU,
29 const std::string &FS);
2930
3031 /// ParseSubtargetFeatures - Parses features string setting specified
3132 /// subtarget options. Definition of function is auto generated by tblgen.
32 std::string ParseSubtargetFeatures(const std::string &FS,
33 const std::string &CPU);
33 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
3434 };
3535 } // End llvm namespace
3636
2727
2828 MSP430TargetMachine::MSP430TargetMachine(const Target &T,
2929 const std::string &TT,
30 const std::string &CPU,
3031 const std::string &FS)
3132 : LLVMTargetMachine(T, TT),
32 Subtarget(TT, FS),
33 Subtarget(TT, CPU, FS),
3334 // FIXME: Check TargetData string.
3435 DataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"),
3536 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
3838
3939 public:
4040 MSP430TargetMachine(const Target &T, const std::string &TT,
41 const std::string &FS);
41 const std::string &CPU, const std::string &FS);
4242
4343 virtual const TargetFrameLowering *getFrameLowering() const {
4444 return &FrameLowering;
1515 #include "MipsGenSubtarget.inc"
1616 using namespace llvm;
1717
18 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &FS,
19 bool little) :
18 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
19 const std::string &FS, bool little) :
2020 MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
2121 IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true),
2222 HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false),
2323 HasSwap(false), HasBitCount(false)
2424 {
25 std::string CPU = "mips1";
25 std::string CPUName = CPU;
26 if (CPUName.empty())
27 CPUName = "mips1";
2628 MipsArchVersion = Mips1;
2729
2830 // Parse features string.
29 ParseSubtargetFeatures(FS, CPU);
31 ParseSubtargetFeatures(FS, CPUName);
3032
3133 // Is the target system Linux ?
3234 if (TT.find("linux") == std::string::npos)
9090
9191 /// This constructor initializes the data members to match that
9292 /// of the specified triple.
93 MipsSubtarget(const std::string &TT, const std::string &FS, bool little);
93 MipsSubtarget(const std::string &TT, const std::string &CPU,
94 const std::string &FS, bool little);
9495
9596 /// ParseSubtargetFeatures - Parses features string setting specified
9697 /// subtarget options. Definition of function is auto generated by tblgen.
97 std::string ParseSubtargetFeatures(const std::string &FS,
98 const std::string &CPU);
98 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
9999
100100 bool isMips1() const { return MipsArchVersion == Mips1; }
101101 bool isMips32() const { return MipsArchVersion >= Mips32; }
3333 // an easier handling.
3434 // Using CodeModel::Large enables different CALL behavior.
3535 MipsTargetMachine::
36 MipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
36 MipsTargetMachine(const Target &T, const std::string &TT,
37 const std::string &CPU, const std::string &FS,
3738 bool isLittle=false):
3839 LLVMTargetMachine(T, TT),
39 Subtarget(TT, FS, isLittle),
40 Subtarget(TT, CPU, FS, isLittle),
4041 DataLayout(isLittle ?
4142 std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
4243 std::string("E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")),
5455
5556 MipselTargetMachine::
5657 MipselTargetMachine(const Target &T, const std::string &TT,
57 const std::string &FS) :
58 MipsTargetMachine(T, TT, FS, true) {}
58 const std::string &CPU, const std::string &FS) :
59 MipsTargetMachine(T, TT, CPU, FS, true) {}
5960
6061 // Install an instruction selector pass using
6162 // the ISelDag to gen Mips code.
3434 MipsSelectionDAGInfo TSInfo;
3535 public:
3636 MipsTargetMachine(const Target &T, const std::string &TT,
37 const std::string &FS, bool isLittle);
37 const std::string &CPU, const std::string &FS,
38 bool isLittle);
3839
3940 virtual const MipsInstrInfo *getInstrInfo() const
4041 { return &InstrInfo; }
7273 class MipselTargetMachine : public MipsTargetMachine {
7374 public:
7475 MipselTargetMachine(const Target &T, const std::string &TT,
75 const std::string &FS);
76 const std::string &CPU, const std::string &FS);
7677 };
7778
7879 } // End llvm namespace
1515
1616 using namespace llvm;
1717
18 PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &FS,
19 bool is64Bit)
18 PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU,
19 const std::string &FS, bool is64Bit)
2020 : PTXTarget(PTX_COMPUTE_1_0),
2121 PTXVersion(PTX_VERSION_2_0),
2222 SupportsDouble(false),
2323 SupportsFMA(true),
2424 Is64Bit(is64Bit) {
25 std::string TARGET = "generic";
25 std::string TARGET = CPU;
26 if (TARGET.empty())
27 TARGET = "generic";
2628 ParseSubtargetFeatures(FS, TARGET);
2729 }
2830
7373
7474 public:
7575
76 PTXSubtarget(const std::string &TT, const std::string &FS, bool is64Bit);
76 PTXSubtarget(const std::string &TT, const std::string &CPU,
77 const std::string &FS, bool is64Bit);
7778
7879 // Target architecture accessors
7980 std::string getTargetString() const;
107108 (PTXTarget >= PTX_COMPUTE_2_0 && PTXTarget < PTX_LAST_COMPUTE);
108109 }
109110
110 std::string ParseSubtargetFeatures(const std::string &FS,
111 const std::string &CPU);
111 void ParseSubtargetFeatures(const std::string &FS,
112 const std::string &CPU);
112113 }; // class PTXSubtarget
113114 } // namespace llvm
114115
5151 // DataLayout and FrameLowering are filled with dummy data
5252 PTXTargetMachine::PTXTargetMachine(const Target &T,
5353 const std::string &TT,
54 const std::string &CPU,
5455 const std::string &FS,
5556 bool is64Bit)
5657 : LLVMTargetMachine(T, TT),
5758 DataLayout(is64Bit ? DataLayout64 : DataLayout32),
58 Subtarget(TT, FS, is64Bit),
59 Subtarget(TT, CPU, FS, is64Bit),
5960 FrameLowering(Subtarget),
6061 InstrInfo(*this),
6162 TLInfo(*this) {
6364
6465 PTX32TargetMachine::PTX32TargetMachine(const Target &T,
6566 const std::string& TT,
67 const std::string& CPU,
6668 const std::string& FS)
67 : PTXTargetMachine(T, TT, FS, false) {
69 : PTXTargetMachine(T, TT, CPU, FS, false) {
6870 }
6971
7072 PTX64TargetMachine::PTX64TargetMachine(const Target &T,
7173 const std::string& TT,
74 const std::string& CPU,
7275 const std::string& FS)
73 : PTXTargetMachine(T, TT, FS, true) {
76 : PTXTargetMachine(T, TT, CPU, FS, true) {
7477 }
7578
7679 bool PTXTargetMachine::addInstSelector(PassManagerBase &PM,
3232
3333 public:
3434 PTXTargetMachine(const Target &T, const std::string &TT,
35 const std::string &FS, bool is64Bit);
35 const std::string &CPU, const std::string &FS,
36 bool is64Bit);
3637
3738 virtual const TargetData *getTargetData() const { return &DataLayout; }
3839
6061 public:
6162
6263 PTX32TargetMachine(const Target &T, const std::string &TT,
63 const std::string& FS);
64 const std::string& CPU, const std::string& FS);
6465 }; // class PTX32TargetMachine
6566
6667 class PTX64TargetMachine : public PTXTargetMachine {
6768 public:
6869
6970 PTX64TargetMachine(const Target &T, const std::string &TT,
70 const std::string& FS);
71 const std::string& CPU, const std::string& FS);
7172 }; // class PTX32TargetMachine
7273
7374 } // namespace llvm
5656 #endif
5757
5858
59 PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &FS,
60 bool is64Bit)
59 PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
60 const std::string &FS, bool is64Bit)
6161 : StackAlignment(16)
6262 , DarwinDirective(PPC::DIR_NONE)
6363 , IsGigaProcessor(false)
7272 , TargetTriple(TT) {
7373
7474 // Determine default and user specified characteristics
75 std::string CPU = "generic";
75 std::string CPUName = CPU;
76 if (CPUName.empty())
77 CPUName = "generic";
7678 #if defined(__APPLE__)
77 CPU = GetCurrentPowerPCCPU();
79 if (CPUName == "generic")
80 CPUName = GetCurrentPowerPCCPU();
7881 #endif
7982
8083 // Parse features string.
81 ParseSubtargetFeatures(FS, CPU);
84 ParseSubtargetFeatures(FS, CPUName);
8285
8386 // If we are generating code for ppc64, verify that options make sense.
8487 if (is64Bit) {
7171 /// This constructor initializes the data members to match that
7272 /// of the specified triple.
7373 ///
74 PPCSubtarget(const std::string &TT, const std::string &FS, bool is64Bit);
74 PPCSubtarget(const std::string &TT, const std::string &CPU,
75 const std::string &FS, bool is64Bit);
7576
7677 /// ParseSubtargetFeatures - Parses features string setting specified
7778 /// subtarget options. Definition of function is auto generated by tblgen.
78 std::string ParseSubtargetFeatures(const std::string &FS,
79 const std::string &CPU);
79 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
8080
8181
8282 /// SetJITMode - This is called to inform the subtarget info that we are
6666
6767
6868 PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
69 const std::string &CPU,
6970 const std::string &FS, bool is64Bit)
7071 : LLVMTargetMachine(T, TT),
71 Subtarget(TT, FS, is64Bit),
72 Subtarget(TT, CPU, FS, is64Bit),
7273 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
7374 FrameLowering(Subtarget), JITInfo(*this, is64Bit),
7475 TLInfo(*this), TSInfo(*this),
8788 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
8889
8990 PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
91 const std::string &CPU,
9092 const std::string &FS)
91 : PPCTargetMachine(T, TT, FS, false) {
93 : PPCTargetMachine(T, TT, CPU, FS, false) {
9294 }
9395
9496
9597 PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
98 const std::string &CPU,
9699 const std::string &FS)
97 : PPCTargetMachine(T, TT, FS, true) {
100 : PPCTargetMachine(T, TT, CPU, FS, true) {
98101 }
99102
100103
4040
4141 public:
4242 PPCTargetMachine(const Target &T, const std::string &TT,
43 const std::string &FS, bool is64Bit);
43 const std::string &CPU, const std::string &FS,
44 bool is64Bit);
4445
4546 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
4647 virtual const PPCFrameLowering *getFrameLowering() const {
7677 class PPC32TargetMachine : public PPCTargetMachine {
7778 public:
7879 PPC32TargetMachine(const Target &T, const std::string &TT,
79 const std::string &FS);
80 const std::string &CPU, const std::string &FS);
8081 };
8182
8283 /// PPC64TargetMachine - PowerPC 64-bit target machine.
8485 class PPC64TargetMachine : public PPCTargetMachine {
8586 public:
8687 PPC64TargetMachine(const Target &T, const std::string &TT,
87 const std::string &FS);
88 const std::string &CPU, const std::string &FS);
8889 };
8990
9091 } // end namespace llvm
1414 #include "SparcGenSubtarget.inc"
1515 using namespace llvm;
1616
17 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS,
18 bool is64Bit) :
17 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
18 const std::string &FS, bool is64Bit) :
1919 IsV9(false),
2020 V8DeprecatedInsts(false),
2121 IsVIS(false),
2222 Is64Bit(is64Bit) {
2323
2424 // Determine default and user specified characteristics
25 const char *CPU = "v8";
26 if (is64Bit) {
27 CPU = "v9";
28 IsV9 = true;
25 std::string CPUName = CPU;
26 if (CPUName.empty()) {
27 if (is64Bit)
28 CPUName = "v9";
29 else
30 CPUName = "v8";
2931 }
32 IsV9 = CPUName == "v9";
3033
3134 // Parse features string.
32 ParseSubtargetFeatures(FS, CPU);
35 ParseSubtargetFeatures(FS, CPUName);
3336 }
2525 bool Is64Bit;
2626
2727 public:
28 SparcSubtarget(const std::string &TT, const std::string &FS, bool is64bit);
28 SparcSubtarget(const std::string &TT, const std::string &CPU,
29 const std::string &FS, bool is64bit);
2930
3031 bool isV9() const { return IsV9; }
3132 bool isVIS() const { return IsVIS; }
3334
3435 /// ParseSubtargetFeatures - Parses features string setting specified
3536 /// subtarget options. Definition of function is auto generated by tblgen.
36 std::string ParseSubtargetFeatures(const std::string &FS,
37 const std::string &CPU);
37 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
3838
3939 bool is64Bit() const { return Is64Bit; }
4040 std::string getDataLayout() const {
2929 /// SparcTargetMachine ctor - Create an ILP32 architecture model
3030 ///
3131 SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT,
32 const std::string &CPU,
3233 const std::string &FS, bool is64bit)
3334 : LLVMTargetMachine(T, TT),
34 Subtarget(TT, FS, is64bit),
35 Subtarget(TT, CPU, FS, is64bit),
3536 DataLayout(Subtarget.getDataLayout()),
3637 TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget),
3738 FrameLowering(Subtarget) {
5556
5657 SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
5758 const std::string &TT,
59 const std::string &CPU,
5860 const std::string &FS)
59 : SparcTargetMachine(T, TT, FS, false) {
61 : SparcTargetMachine(T, TT, CPU, FS, false) {
6062 }
6163
6264 SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
6365 const std::string &TT,
66 const std::string &CPU,
6467 const std::string &FS)
65 : SparcTargetMachine(T, TT, FS, true) {
68 : SparcTargetMachine(T, TT, CPU, FS, true) {
6669 }
3333 SparcFrameLowering FrameLowering;
3434 public:
3535 SparcTargetMachine(const Target &T, const std::string &TT,
36 const std::string &FS, bool is64bit);
36 const std::string &CPU, const std::string &FS,
37 bool is64bit);
3738
3839 virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
3940 virtual const TargetFrameLowering *getFrameLowering() const {
6162 class SparcV8TargetMachine : public SparcTargetMachine {
6263 public:
6364 SparcV8TargetMachine(const Target &T, const std::string &TT,
64 const std::string &FS);
65 const std::string &CPU, const std::string &FS);
6566 };
6667
6768 /// SparcV9TargetMachine - Sparc 64-bit target machine
6970 class SparcV9TargetMachine : public SparcTargetMachine {
7071 public:
7172 SparcV9TargetMachine(const Target &T, const std::string &TT,
72 const std::string &FS);
73 const std::string &CPU, const std::string &FS);
7374 };
7475
7576 } // end namespace llvm
1919 using namespace llvm;
2020
2121 SystemZSubtarget::SystemZSubtarget(const std::string &TT,
22 const std::string &CPU,
2223 const std::string &FS):
2324 HasZ10Insts(false) {
24 std::string CPU = "z9";
25 std::string CPUName = CPU;
26 if (CPUName.empty())
27 CPUName = "z9";
2528
2629 // Parse features string.
27 ParseSubtargetFeatures(FS, CPU);
30 ParseSubtargetFeatures(FS, CPUName);
2831 }
2932
3033 /// True if accessing the GV requires an extra load.
2727 /// This constructor initializes the data members to match that
2828 /// of the specified triple.
2929 ///
30 SystemZSubtarget(const std::string &TT, const std::string &FS);
30 SystemZSubtarget(const std::string &TT, const std::string &CPU,
31 const std::string &FS);
3132
3233 /// ParseSubtargetFeatures - Parses features string setting specified
3334 /// subtarget options. Definition of function is auto generated by tblgen.
34 std::string ParseSubtargetFeatures(const std::string &FS,
35 const std::string &CPU);
35 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
3636
3737 bool isZ10() const { return HasZ10Insts; }
3838
2323 ///
2424 SystemZTargetMachine::SystemZTargetMachine(const Target &T,
2525 const std::string &TT,
26 const std::string &CPU,
2627 const std::string &FS)
2728 : LLVMTargetMachine(T, TT),
28 Subtarget(TT, FS),
29 Subtarget(TT, CPU, FS),
2930 DataLayout("E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
3031 "-f64:64:64-f128:128:128-a0:16:16-n32:64"),
3132 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
3737 SystemZFrameLowering FrameLowering;
3838 public:
3939 SystemZTargetMachine(const Target &T, const std::string &TT,
40 const std::string &FS);
40 const std::string &CPU, const std::string &FS);
4141
4242 virtual const TargetFrameLowering *getFrameLowering() const {
4343 return &FrameLowering;
283283 }
284284 }
285285
286 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
286 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
287 const std::string &FS,
287288 bool is64Bit, unsigned StackAlignOverride)
288289 : PICStyle(PICStyles::None)
289290 , X86SSELevel(NoMMXSSE)
307308 , Is64Bit(is64Bit) {
308309
309310 // Determine default and user specified characteristics
310 if (!FS.empty()) {
311 if (!CPU.empty() || !FS.empty()) {
311312 // If feature string is not empty, parse features string.
312 std::string CPU = sys::getHostCPUName();
313 ParseSubtargetFeatures(FS, CPU);
313 std::string CPUName = CPU;
314 if (CPUName.empty())
315 CPUName = sys::getHostCPUName();
316 ParseSubtargetFeatures(FS, CPUName);
314317 // All X86-64 CPUs also have SSE2, however user might request no SSE via
315318 // -mattr, so don't force SSELevel here.
316319 if (HasAVX)
116116 /// This constructor initializes the data members to match that
117117 /// of the specified triple.
118118 ///
119 X86Subtarget(const std::string &TT, const std::string &FS, bool is64Bit,
119 X86Subtarget(const std::string &TT, const std::string &CPU,
120 const std::string &FS, bool is64Bit,
120121 unsigned StackAlignOverride);
121122
122123 /// getStackAlignment - Returns the minimum alignment known to hold of the
130131
131132 /// ParseSubtargetFeatures - Parses features string setting specified
132133 /// subtarget options. Definition of function is auto generated by tblgen.
133 std::string ParseSubtargetFeatures(const std::string &FS,
134 const std::string &CPU);
134 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
135135
136136 /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
137137 /// instruction.
8686
8787
8888 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
89 const std::string &CPU,
8990 const std::string &FS)
90 : X86TargetMachine(T, TT, FS, false),
91 : X86TargetMachine(T, TT, CPU, FS, false),
9192 DataLayout(getSubtargetImpl()->isTargetDarwin() ?
9293 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32" :
9394 (getSubtargetImpl()->isTargetCygMing() ||
102103
103104
104105 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
106 const std::string &CPU,
105107 const std::string &FS)
106 : X86TargetMachine(T, TT, FS, true),
108 : X86TargetMachine(T, TT, CPU, FS, true),
107109 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64"),
108110 InstrInfo(*this),
109111 TSInfo(*this),
114116 /// X86TargetMachine ctor - Create an X86 target.
115117 ///
116118 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
119 const std::string &CPU,
117120 const std::string &FS, bool is64Bit)
118121 : LLVMTargetMachine(T, TT),
119 Subtarget(TT, FS, is64Bit, StackAlignmentOverride),
122 Subtarget(TT, CPU, FS, is64Bit, StackAlignmentOverride),
120123 FrameLowering(*this, Subtarget),
121124 ELFWriterInfo(is64Bit, true) {
122125 DefRelocModel = getRelocationModel();
4242
4343 public:
4444 X86TargetMachine(const Target &T, const std::string &TT,
45 const std::string &FS, bool is64Bit);
45 const std::string &CPU, const std::string &FS,
46 bool is64Bit);
4647
4748 virtual const X86InstrInfo *getInstrInfo() const {
4849 llvm_unreachable("getInstrInfo not implemented");
8687 X86JITInfo JITInfo;
8788 public:
8889 X86_32TargetMachine(const Target &T, const std::string &M,
89 const std::string &FS);
90 const std::string &CPU, const std::string &FS);
9091 virtual const TargetData *getTargetData() const { return &DataLayout; }
9192 virtual const X86TargetLowering *getTargetLowering() const {
9293 return &TLInfo;
112113 X86JITInfo JITInfo;
113114 public:
114115 X86_64TargetMachine(const Target &T, const std::string &TT,
115 const std::string &FS);
116 const std::string &CPU, const std::string &FS);
116117 virtual const TargetData *getTargetData() const { return &DataLayout; }
117118 virtual const X86TargetLowering *getTargetLowering() const {
118119 return &TLInfo;
1414 #include "XCore.h"
1515 using namespace llvm;
1616
17 XCoreSubtarget::XCoreSubtarget(const std::string &TT, const std::string &FS)
17 XCoreSubtarget::XCoreSubtarget(const std::string &TT,
18 const std::string &CPU, const std::string &FS)
1819 {
1920 }
2626 /// This constructor initializes the data members to match that
2727 /// of the specified triple.
2828 ///
29 XCoreSubtarget(const std::string &TT, const std::string &FS);
29 XCoreSubtarget(const std::string &TT, const std::string &CPU,
30 const std::string &FS);
3031
3132 /// ParseSubtargetFeatures - Parses features string setting specified
3233 /// subtarget options. Definition of function is auto generated by tblgen.
33 std::string ParseSubtargetFeatures(const std::string &FS,
34 const std::string &CPU);
34 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
3535 };
3636 } // End llvm namespace
3737
2020 /// XCoreTargetMachine ctor - Create an ILP32 architecture model
2121 ///
2222 XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT,
23 const std::string &CPU,
2324 const std::string &FS)
2425 : LLVMTargetMachine(T, TT),
25 Subtarget(TT, FS),
26 Subtarget(TT, CPU, FS),
2627 DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
2728 "i16:16:32-i32:32:32-i64:32:32-n32"),
2829 InstrInfo(),
3232 XCoreSelectionDAGInfo TSInfo;
3333 public:
3434 XCoreTargetMachine(const Target &T, const std::string &TT,
35 const std::string &FS);
35 const std::string &CPU, const std::string &FS);
3636
3737 virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
3838 virtual const XCoreFrameLowering *getFrameLowering() const {
260260
261261 // Package up features to be passed to target/subtarget
262262 std::string FeaturesStr;
263 if (MCPU.size() || MAttrs.size()) {
263 if (MAttrs.size()) {
264264 SubtargetFeatures Features;
265 Features.setCPU(MCPU);
266265 for (unsigned i = 0; i != MAttrs.size(); ++i)
267266 Features.AddFeature(MAttrs[i]);
268267 FeaturesStr = Features.getString();
269268 }
270269
271270 std::auto_ptr
272 target(TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr));
271 target(TheTarget->createTargetMachine(TheTriple.getTriple(), MCPU,
272 FeaturesStr));
273273 assert(target.get() && "Could not allocate target machine!");
274274 TargetMachine &Target = *target.get();
275275
308308
309309 // Package up features to be passed to target/subtarget
310310 std::string FeaturesStr;
311 if (MCPU.size()) {
312 SubtargetFeatures Features;
313 Features.setCPU(MCPU);
314 FeaturesStr = Features.getString();
315 }
316311
317312 // FIXME: We shouldn't need to do this (and link in codegen).
318313 // When we split this out, we should do it in a way that makes
319314 // it straightforward to switch subtargets on the fly (.e.g,
320315 // the .cpu and .code16 directives).
321316 OwningPtr TM(TheTarget->createTargetMachine(TripleName,
317 MCPU,
322318 FeaturesStr));
323319
324320 if (!TM) {
414410 } else {
415411 // Package up features to be passed to target/subtarget
416412 std::string FeaturesStr;
417 if (MCPU.size()) {
418 SubtargetFeatures Features;
419 Features.setCPU(MCPU);
420 FeaturesStr = Features.getString();
421 }
422413
423414 // FIXME: We shouldn't need to do this (and link in codegen).
424415 // When we split this out, we should do it in a way that makes
425416 // it straightforward to switch subtargets on the fly (.e.g,
426417 // the .cpu and .code16 directives).
427418 OwningPtr TM(TheTarget->createTargetMachine(TripleName,
419 MCPU,
428420 FeaturesStr));
429421
430422 if (!TM) {
200200 // it straightforward to switch subtargets on the fly (.e.g,
201201 // the .cpu and .code16 directives).
202202 std::string FeaturesStr;
203 OwningPtr TM(TheTarget->createTargetMachine(TripleName,
203 std::string CPU;
204 OwningPtr TM(TheTarget->createTargetMachine(TripleName, CPU,
204205 FeaturesStr));
205206 if (!TM) {
206207 errs() << "error: could not create target for triple " << TripleName << "\n";
261261
262262 // construct LTModule, hand over ownership of module and target
263263 SubtargetFeatures Features;
264 Features.getDefaultSubtargetFeatures(_mCpu, llvm::Triple(Triple));
264 Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
265265 std::string FeatureStr = Features.getString();
266 _target = march->createTargetMachine(Triple, FeatureStr);
266 _target = march->createTargetMachine(Triple, _mCpu, FeatureStr);
267267 }
268268 return false;
269269 }
156156
157157 // construct LTOModule, hand over ownership of module and target
158158 SubtargetFeatures Features;
159 Features.getDefaultSubtargetFeatures("" /* cpu */, llvm::Triple(Triple));
159 Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
160160 std::string FeatureStr = Features.getString();
161 TargetMachine *target = march->createTargetMachine(Triple, FeatureStr);
161 std::string CPU;
162 TargetMachine *target = march->createTargetMachine(Triple, CPU, FeatureStr);
162163 LTOModule *Ret = new LTOModule(m.take(), target);
163164 bool Err = Ret->ParseSymbols();
164165 if (Err) {
605605
606606 OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
607607 << "// subtarget options.\n"
608 << "std::string llvm::";
608 << "void llvm::";
609609 OS << Target;
610610 OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
611611 << " const std::string &CPU) {\n"
612612 << " DEBUG(dbgs() << \"\\nFeatures:\" << FS);\n"
613613 << " DEBUG(dbgs() << \"\\nCPU:\" << CPU);\n"
614614 << " SubtargetFeatures Features(FS);\n"
615 << " Features.setCPUIfNone(CPU);\n"
616 << " uint64_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
615 << " uint64_t Bits = Features.getFeatureBits(CPU, "
616 << "SubTypeKV, SubTypeKVSize,\n"
617617 << " FeatureKV, FeatureKVSize);\n";
618618
619619 for (unsigned i = 0; i < Features.size(); i++) {
634634 if (HasItineraries) {
635635 OS << "\n"
636636 << " InstrItinerary *Itinerary = (InstrItinerary *)"
637 << "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
637 << "Features.getItinerary(CPU, "
638 << "ProcItinKV, ProcItinKVSize);\n"
638639 << " InstrItins = InstrItineraryData(Stages, OperandCycles, "
639640 << "ForwardingPathes, Itinerary);\n";
640641 }
641642
642 OS << " return Features.getCPU();\n"
643 << "}\n";
643 OS << "}\n";
644644 }
645645
646646 //