llvm.org GIT mirror llvm / 2760310
[X86][SandyBridge] Additional updates to the SNB instructions scheduling information This is a continuation patch for commit r307529 which completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target (see also https://reviews.llvm.org/D35019). In this patch we added the scheduling information of additional SNB instructions that were missing from the patch commit r307529, fixed the scheduling of several resource groups that include only port0 instead of port05 (i.e., port0 OR port5) and fixed several incorrect instructions' scheduling in the r307529 commit. The patch also includes the X87 instructions which were missing in previous patch commit r307529 as reported in bugzilla bug 34080. Reviewers: zvi, RKSimon, chandlerc, igorb, m_zuckerman, craig.topper, aymanmus, dim Differential Revision: https://reviews.llvm.org/D36388 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310792 91177308-0d34-0410-b5e6-96231b3b80d8 Gadi Haber 2 years ago
12 changed file(s) with 1221 addition(s) and 1091 deletion(s). Raw diff Collapse all Expand all
288288 let NumMicroOps = 1;
289289 let ResourceCycles = [1];
290290 }
291 def: InstRW<[SBWriteResGroup0], (instregex "CVTSS2SDrr")>;
292 def: InstRW<[SBWriteResGroup0], (instregex "PSLLDri")>;
293 def: InstRW<[SBWriteResGroup0], (instregex "PSLLQri")>;
294 def: InstRW<[SBWriteResGroup0], (instregex "PSLLWri")>;
295 def: InstRW<[SBWriteResGroup0], (instregex "PSRADri")>;
296 def: InstRW<[SBWriteResGroup0], (instregex "PSRAWri")>;
297 def: InstRW<[SBWriteResGroup0], (instregex "PSRLDri")>;
298 def: InstRW<[SBWriteResGroup0], (instregex "PSRLQri")>;
299 def: InstRW<[SBWriteResGroup0], (instregex "PSRLWri")>;
300 def: InstRW<[SBWriteResGroup0], (instregex "VCVTSS2SDrr")>;
301 def: InstRW<[SBWriteResGroup0], (instregex "VPMOVMSKBrr")>;
302 def: InstRW<[SBWriteResGroup0], (instregex "VPSLLDri")>;
303 def: InstRW<[SBWriteResGroup0], (instregex "VPSLLQri")>;
304 def: InstRW<[SBWriteResGroup0], (instregex "VPSLLWri")>;
305 def: InstRW<[SBWriteResGroup0], (instregex "VPSRADri")>;
306 def: InstRW<[SBWriteResGroup0], (instregex "VPSRAWri")>;
307 def: InstRW<[SBWriteResGroup0], (instregex "VPSRLDri")>;
308 def: InstRW<[SBWriteResGroup0], (instregex "VPSRLQri")>;
309 def: InstRW<[SBWriteResGroup0], (instregex "VPSRLWri")>;
310 def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDYrr")>;
311 def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDrr")>;
312 def: InstRW<[SBWriteResGroup0], (instregex "VTESTPSYrr")>;
291 def: InstRW<[SBWriteResGroup0], (instregex "CVTSS2SDrr")>;
292 def: InstRW<[SBWriteResGroup0], (instregex "PSLLDri")>;
293 def: InstRW<[SBWriteResGroup0], (instregex "PSLLQri")>;
294 def: InstRW<[SBWriteResGroup0], (instregex "PSLLWri")>;
295 def: InstRW<[SBWriteResGroup0], (instregex "PSRADri")>;
296 def: InstRW<[SBWriteResGroup0], (instregex "PSRAWri")>;
297 def: InstRW<[SBWriteResGroup0], (instregex "PSRLDri")>;
298 def: InstRW<[SBWriteResGroup0], (instregex "PSRLQri")>;
299 def: InstRW<[SBWriteResGroup0], (instregex "PSRLWri")>;
300 def: InstRW<[SBWriteResGroup0], (instregex "VCVTSS2SDrr")>;
301 def: InstRW<[SBWriteResGroup0], (instregex "VPMOVMSKBrr")>;
302 def: InstRW<[SBWriteResGroup0], (instregex "VPSLLDri")>;
303 def: InstRW<[SBWriteResGroup0], (instregex "VPSLLQri")>;
304 def: InstRW<[SBWriteResGroup0], (instregex "VPSLLWri")>;
305 def: InstRW<[SBWriteResGroup0], (instregex "VPSRADri")>;
306 def: InstRW<[SBWriteResGroup0], (instregex "VPSRAWri")>;
307 def: InstRW<[SBWriteResGroup0], (instregex "VPSRLDri")>;
308 def: InstRW<[SBWriteResGroup0], (instregex "VPSRLQri")>;
309 def: InstRW<[SBWriteResGroup0], (instregex "VPSRLWri")>;
310 def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDYrr")>;
311 def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDrr")>;
312 def: InstRW<[SBWriteResGroup0], (instregex "VTESTPSYrr")>;
313313 def: InstRW<[SBWriteResGroup0], (instregex "VTESTPSrr")>;
314314
315315 def SBWriteResGroup1 : SchedWriteRes<[SBPort1]> {
327327 let NumMicroOps = 1;
328328 let ResourceCycles = [1];
329329 }
330 def: InstRW<[SBWriteResGroup2], (instregex "ANDNPDrr")>;
331 def: InstRW<[SBWriteResGroup2], (instregex "ANDNPSrr")>;
332 def: InstRW<[SBWriteResGroup2], (instregex "ANDPDrr")>;
333 def: InstRW<[SBWriteResGroup2], (instregex "ANDPSrr")>;
334 def: InstRW<[SBWriteResGroup2], (instregex "FDECSTP")>;
335 def: InstRW<[SBWriteResGroup2], (instregex "FFREE")>;
336 def: InstRW<[SBWriteResGroup2], (instregex "FINCSTP")>;
337 def: InstRW<[SBWriteResGroup2], (instregex "FNOP")>;
338 def: InstRW<[SBWriteResGroup2], (instregex "INSERTPSrr")>;
339 def: InstRW<[SBWriteResGroup2], (instregex "JMP64r")>;
340 def: InstRW<[SBWriteResGroup2], (instregex "LD_Frr")>;
341 def: InstRW<[SBWriteResGroup2], (instregex "MOV64toPQIrr")>;
342 def: InstRW<[SBWriteResGroup2], (instregex "MOVAPDrr")>;
343 def: InstRW<[SBWriteResGroup2], (instregex "MOVAPSrr")>;
344 def: InstRW<[SBWriteResGroup2], (instregex "MOVDDUPrr")>;
345 def: InstRW<[SBWriteResGroup2], (instregex "MOVDI2PDIrr")>;
346 def: InstRW<[SBWriteResGroup2], (instregex "MOVHLPSrr")>;
347 def: InstRW<[SBWriteResGroup2], (instregex "MOVLHPSrr")>;
348 def: InstRW<[SBWriteResGroup2], (instregex "MOVSDrr")>;
349 def: InstRW<[SBWriteResGroup2], (instregex "MOVSHDUPrr")>;
350 def: InstRW<[SBWriteResGroup2], (instregex "MOVSLDUPrr")>;
351 def: InstRW<[SBWriteResGroup2], (instregex "MOVSSrr")>;
352 def: InstRW<[SBWriteResGroup2], (instregex "MOVUPDrr")>;
353 def: InstRW<[SBWriteResGroup2], (instregex "MOVUPSrr")>;
354 def: InstRW<[SBWriteResGroup2], (instregex "ORPDrr")>;
355 def: InstRW<[SBWriteResGroup2], (instregex "ORPSrr")>;
356 def: InstRW<[SBWriteResGroup2], (instregex "RETQ")>;
357 def: InstRW<[SBWriteResGroup2], (instregex "SHUFPDrri")>;
358 def: InstRW<[SBWriteResGroup2], (instregex "SHUFPSrri")>;
359 def: InstRW<[SBWriteResGroup2], (instregex "ST_FPrr")>;
360 def: InstRW<[SBWriteResGroup2], (instregex "ST_Frr")>;
361 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPDrr")>;
362 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPSrr")>;
363 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPDrr")>;
364 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPSrr")>;
365 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDYrr")>;
366 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDrr")>;
367 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSYrr")>;
368 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSrr")>;
369 def: InstRW<[SBWriteResGroup2], (instregex "VANDPDrr")>;
370 def: InstRW<[SBWriteResGroup2], (instregex "VANDPDrr")>;
371 def: InstRW<[SBWriteResGroup2], (instregex "VANDPSrr")>;
372 def: InstRW<[SBWriteResGroup2], (instregex "VEXTRACTF128rr")>;
373 def: InstRW<[SBWriteResGroup2], (instregex "VINSERTF128rr")>;
374 def: InstRW<[SBWriteResGroup2], (instregex "VINSERTPSrr")>;
375 def: InstRW<[SBWriteResGroup2], (instregex "VMOV64toPQIrr")>;
376 def: InstRW<[SBWriteResGroup2], (instregex "VMOV64toPQIrr")>;
377 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDYrr")>;
378 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDrr")>;
379 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSYrr")>;
380 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSrr")>;
381 def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPYrr")>;
382 def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPrr")>;
383 def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
384 def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
385 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSDrr")>;
386 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPYrr")>;
387 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPrr")>;
388 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPYrr")>;
389 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPrr")>;
390 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSSrr")>;
391 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDYrr")>;
392 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDrr")>;
393 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSYrr")>;
394 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSrr")>;
395 def: InstRW<[SBWriteResGroup2], (instregex "VORPDYrr")>;
396 def: InstRW<[SBWriteResGroup2], (instregex "VORPDrr")>;
397 def: InstRW<[SBWriteResGroup2], (instregex "VORPSYrr")>;
398 def: InstRW<[SBWriteResGroup2], (instregex "VORPSrr")>;
399 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDri")>;
400 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDrm")>;
401 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDrr")>;
402 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSri")>;
403 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSrm")>;
404 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSrr")>;
405 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSrr")>;
406 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDYrri")>;
407 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDrri")>;
408 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSYrri")>;
409 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSrri")>;
410 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPDrr")>;
411 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPSrr")>;
412 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDYrr")>;
413 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDrr")>;
414 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSYrr")>;
415 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSrr")>;
416 def: InstRW<[SBWriteResGroup2], (instregex "VXORPDrr")>;
417 def: InstRW<[SBWriteResGroup2], (instregex "VXORPSrr")>;
418 def: InstRW<[SBWriteResGroup2], (instregex "XORPDrr")>;
330 def: InstRW<[SBWriteResGroup2], (instregex "ANDNPDrr")>;
331 def: InstRW<[SBWriteResGroup2], (instregex "ANDNPSrr")>;
332 def: InstRW<[SBWriteResGroup2], (instregex "ANDPDrr")>;
333 def: InstRW<[SBWriteResGroup2], (instregex "ANDPSrr")>;
334 def: InstRW<[SBWriteResGroup2], (instregex "FDECSTP")>;
335 def: InstRW<[SBWriteResGroup2], (instregex "FFREE")>;
336 def: InstRW<[SBWriteResGroup2], (instregex "FINCSTP")>;
337 def: InstRW<[SBWriteResGroup2], (instregex "FNOP")>;
338 def: InstRW<[SBWriteResGroup2], (instregex "INSERTPSrr")>;
339 def: InstRW<[SBWriteResGroup2], (instregex "JAE_1")>;
340 def: InstRW<[SBWriteResGroup2], (instregex "JAE_4")>;
341 def: InstRW<[SBWriteResGroup2], (instregex "JA_1")>;
342 def: InstRW<[SBWriteResGroup2], (instregex "JA_4")>;
343 def: InstRW<[SBWriteResGroup2], (instregex "JBE_1")>;
344 def: InstRW<[SBWriteResGroup2], (instregex "JBE_4")>;
345 def: InstRW<[SBWriteResGroup2], (instregex "JB_1")>;
346 def: InstRW<[SBWriteResGroup2], (instregex "JB_4")>;
347 def: InstRW<[SBWriteResGroup2], (instregex "JE_1")>;
348 def: InstRW<[SBWriteResGroup2], (instregex "JE_4")>;
349 def: InstRW<[SBWriteResGroup2], (instregex "JGE_1")>;
350 def: InstRW<[SBWriteResGroup2], (instregex "JGE_4")>;
351 def: InstRW<[SBWriteResGroup2], (instregex "JG_1")>;
352 def: InstRW<[SBWriteResGroup2], (instregex "JG_4")>;
353 def: InstRW<[SBWriteResGroup2], (instregex "JLE_1")>;
354 def: InstRW<[SBWriteResGroup2], (instregex "JLE_4")>;
355 def: InstRW<[SBWriteResGroup2], (instregex "JL_1")>;
356 def: InstRW<[SBWriteResGroup2], (instregex "JL_4")>;
357 def: InstRW<[SBWriteResGroup2], (instregex "JMP64r")>;
358 def: InstRW<[SBWriteResGroup2], (instregex "JMP_1")>;
359 def: InstRW<[SBWriteResGroup2], (instregex "JMP_4")>;
360 def: InstRW<[SBWriteResGroup2], (instregex "JNE_1")>;
361 def: InstRW<[SBWriteResGroup2], (instregex "JNE_4")>;
362 def: InstRW<[SBWriteResGroup2], (instregex "JNO_1")>;
363 def: InstRW<[SBWriteResGroup2], (instregex "JNO_4")>;
364 def: InstRW<[SBWriteResGroup2], (instregex "JNP_1")>;
365 def: InstRW<[SBWriteResGroup2], (instregex "JNP_4")>;
366 def: InstRW<[SBWriteResGroup2], (instregex "JNS_1")>;
367 def: InstRW<[SBWriteResGroup2], (instregex "JNS_4")>;
368 def: InstRW<[SBWriteResGroup2], (instregex "JO_1")>;
369 def: InstRW<[SBWriteResGroup2], (instregex "JO_4")>;
370 def: InstRW<[SBWriteResGroup2], (instregex "JP_1")>;
371 def: InstRW<[SBWriteResGroup2], (instregex "JP_4")>;
372 def: InstRW<[SBWriteResGroup2], (instregex "JS_1")>;
373 def: InstRW<[SBWriteResGroup2], (instregex "JS_4")>;
374 def: InstRW<[SBWriteResGroup2], (instregex "LD_Frr")>;
375 def: InstRW<[SBWriteResGroup2], (instregex "LOOP")>;
376 def: InstRW<[SBWriteResGroup2], (instregex "LOOPE")>;
377 def: InstRW<[SBWriteResGroup2], (instregex "LOOPNE")>;
378 def: InstRW<[SBWriteResGroup2], (instregex "MOV64toPQIrr")>;
379 def: InstRW<[SBWriteResGroup2], (instregex "MOVAPDrr")>;
380 def: InstRW<[SBWriteResGroup2], (instregex "MOVAPSrr")>;
381 def: InstRW<[SBWriteResGroup2], (instregex "MOVDDUPrr")>;
382 def: InstRW<[SBWriteResGroup2], (instregex "MOVDI2PDIrr")>;
383 def: InstRW<[SBWriteResGroup2], (instregex "MOVHLPSrr")>;
384 def: InstRW<[SBWriteResGroup2], (instregex "MOVLHPSrr")>;
385 def: InstRW<[SBWriteResGroup2], (instregex "MOVSDrr")>;
386 def: InstRW<[SBWriteResGroup2], (instregex "MOVSHDUPrr")>;
387 def: InstRW<[SBWriteResGroup2], (instregex "MOVSLDUPrr")>;
388 def: InstRW<[SBWriteResGroup2], (instregex "MOVSSrr")>;
389 def: InstRW<[SBWriteResGroup2], (instregex "MOVUPDrr")>;
390 def: InstRW<[SBWriteResGroup2], (instregex "MOVUPSrr")>;
391 def: InstRW<[SBWriteResGroup2], (instregex "ORPDrr")>;
392 def: InstRW<[SBWriteResGroup2], (instregex "ORPSrr")>;
393 def: InstRW<[SBWriteResGroup2], (instregex "RETQ")>;
394 def: InstRW<[SBWriteResGroup2], (instregex "SHUFPDrri")>;
395 def: InstRW<[SBWriteResGroup2], (instregex "SHUFPSrri")>;
396 def: InstRW<[SBWriteResGroup2], (instregex "ST_FPrr")>;
397 def: InstRW<[SBWriteResGroup2], (instregex "ST_Frr")>;
398 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPDrr")>;
399 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPSrr")>;
400 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPDrr")>;
401 def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPSrr")>;
402 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDYrr")>;
403 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDrr")>;
404 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSYrr")>;
405 def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSrr")>;
406 def: InstRW<[SBWriteResGroup2], (instregex "VANDPDYrr")>;
407 def: InstRW<[SBWriteResGroup2], (instregex "VANDPDrr")>;
408 def: InstRW<[SBWriteResGroup2], (instregex "VANDPSYrr")>;
409 def: InstRW<[SBWriteResGroup2], (instregex "VANDPSrr")>;
410 def: InstRW<[SBWriteResGroup2], (instregex "VEXTRACTF128rr")>;
411 def: InstRW<[SBWriteResGroup2], (instregex "VINSERTF128rr")>;
412 def: InstRW<[SBWriteResGroup2], (instregex "VINSERTPSrr")>;
413 def: InstRW<[SBWriteResGroup2], (instregex "VMOV64toPQIrr")>;
414 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDYrr")>;
415 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDrr")>;
416 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSYrr")>;
417 def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSrr")>;
418 def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPYrr")>;
419 def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPrr")>;
420 def: InstRW<[SBWriteResGroup2], (instregex "VMOVDI2PDIrr")>;
421 def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
422 def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
423 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSDrr")>;
424 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPYrr")>;
425 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPrr")>;
426 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPYrr")>;
427 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPrr")>;
428 def: InstRW<[SBWriteResGroup2], (instregex "VMOVSSrr")>;
429 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDYrr")>;
430 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDrr")>;
431 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSYrr")>;
432 def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSrr")>;
433 def: InstRW<[SBWriteResGroup2], (instregex "VORPDYrr")>;
434 def: InstRW<[SBWriteResGroup2], (instregex "VORPDrr")>;
435 def: InstRW<[SBWriteResGroup2], (instregex "VORPSYrr")>;
436 def: InstRW<[SBWriteResGroup2], (instregex "VORPSrr")>;
437 def: InstRW<[SBWriteResGroup2], (instregex "VPERM2F128rr")>;
438 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDYri")>;
439 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDYrr")>;
440 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDri")>;
441 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDrr")>;
442 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSYri")>;
443 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSYrr")>;
444 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSri")>;
445 def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSrr")>;
446 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDYrri")>;
447 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDrri")>;
448 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSYrri")>;
449 def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSrri")>;
450 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPDYrr")>;
451 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPDrr")>;
452 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPSYrr")>;
453 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPSrr")>;
454 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDYrr")>;
455 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDrr")>;
456 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSYrr")>;
457 def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSrr")>;
458 def: InstRW<[SBWriteResGroup2], (instregex "VXORPDYrr")>;
459 def: InstRW<[SBWriteResGroup2], (instregex "VXORPDrr")>;
460 def: InstRW<[SBWriteResGroup2], (instregex "VXORPSYrr")>;
461 def: InstRW<[SBWriteResGroup2], (instregex "VXORPSrr")>;
462 def: InstRW<[SBWriteResGroup2], (instregex "XORPDrr")>;
419463 def: InstRW<[SBWriteResGroup2], (instregex "XORPSrr")>;
420464
421465 def SBWriteResGroup3 : SchedWriteRes<[SBPort01]> {
423467 let NumMicroOps = 1;
424468 let ResourceCycles = [1];
425469 }
426 def: InstRW<[SBWriteResGroup3], (instregex "LEA64_32r")>;
427
428 def SBWriteResGroup4 : SchedWriteRes<[SBPort0]> {
470 def: InstRW<[SBWriteResGroup3], (instregex "LEA(16|32|64)r")>;
471
472 def SBWriteResGroup4 : SchedWriteRes<[SBPort05]> {
429473 let Latency = 1;
430474 let NumMicroOps = 1;
431475 let ResourceCycles = [1];
432476 }
433 def: InstRW<[SBWriteResGroup4], (instregex "BLENDPDrri")>;
434 def: InstRW<[SBWriteResGroup4], (instregex "BLENDPSrri")>;
435 def: InstRW<[SBWriteResGroup4], (instregex "BT32ri8")>;
436 def: InstRW<[SBWriteResGroup4], (instregex "BT32rr")>;
437 def: InstRW<[SBWriteResGroup4], (instregex "BTC32ri8")>;
438 def: InstRW<[SBWriteResGroup4], (instregex "BTC32rr")>;
439 def: InstRW<[SBWriteResGroup4], (instregex "BTR32ri8")>;
440 def: InstRW<[SBWriteResGroup4], (instregex "BTR32rr")>;
441 def: InstRW<[SBWriteResGroup4], (instregex "BTS32ri8")>;
442 def: InstRW<[SBWriteResGroup4], (instregex "BTS32rr")>;
443 def: InstRW<[SBWriteResGroup4], (instregex "CDQ")>;
444 def: InstRW<[SBWriteResGroup4], (instregex "CQO")>;
445 def: InstRW<[SBWriteResGroup4], (instregex "LAHF")>;
446 def: InstRW<[SBWriteResGroup4], (instregex "SAHF")>;
447 def: InstRW<[SBWriteResGroup4], (instregex "SAR32ri")>;
448 def: InstRW<[SBWriteResGroup4], (instregex "SAR8ri")>;
449 def: InstRW<[SBWriteResGroup4], (instregex "SETAEr")>;
450 def: InstRW<[SBWriteResGroup4], (instregex "SETBr")>;
451 def: InstRW<[SBWriteResGroup4], (instregex "SETEr")>;
452 def: InstRW<[SBWriteResGroup4], (instregex "SETGEr")>;
453 def: InstRW<[SBWriteResGroup4], (instregex "SETGr")>;
454 def: InstRW<[SBWriteResGroup4], (instregex "SETLEr")>;
455 def: InstRW<[SBWriteResGroup4], (instregex "SETLr")>;
456 def: InstRW<[SBWriteResGroup4], (instregex "SETNEr")>;
457 def: InstRW<[SBWriteResGroup4], (instregex "SETNOr")>;
458 def: InstRW<[SBWriteResGroup4], (instregex "SETNPr")>;
459 def: InstRW<[SBWriteResGroup4], (instregex "SETNSr")>;
460 def: InstRW<[SBWriteResGroup4], (instregex "SETOr")>;
461 def: InstRW<[SBWriteResGroup4], (instregex "SETPr")>;
462 def: InstRW<[SBWriteResGroup4], (instregex "SETSr")>;
463 def: InstRW<[SBWriteResGroup4], (instregex "SHL32ri")>;
464 def: InstRW<[SBWriteResGroup4], (instregex "SHL64r1")>;
465 def: InstRW<[SBWriteResGroup4], (instregex "SHL8r1")>;
466 def: InstRW<[SBWriteResGroup4], (instregex "SHL8ri")>;
467 def: InstRW<[SBWriteResGroup4], (instregex "SHR32ri")>;
468 def: InstRW<[SBWriteResGroup4], (instregex "SHR8ri")>;
469 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDYrri")>;
470 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDrri")>;
471 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSYrri")>;
472 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSrri")>;
473 def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQAYrr")>;
474 def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQArr")>;
475 def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQUYrr")>;
477 def: InstRW<[SBWriteResGroup4], (instregex "BLENDPDrri")>;
478 def: InstRW<[SBWriteResGroup4], (instregex "BLENDPSrri")>;
479 def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)ri8")>;
480 def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)rr")>;
481 def: InstRW<[SBWriteResGroup4], (instregex "BTC(16|32|64)ri8")>;
482 def: InstRW<[SBWriteResGroup4], (instregex "BTC(16|32|64)rr")>;
483 def: InstRW<[SBWriteResGroup4], (instregex "BTR(16|32|64)ri8")>;
484 def: InstRW<[SBWriteResGroup4], (instregex "BTR(16|32|64)rr")>;
485 def: InstRW<[SBWriteResGroup4], (instregex "BTS(16|32|64)ri8")>;
486 def: InstRW<[SBWriteResGroup4], (instregex "BTS(16|32|64)rr")>;
487 def: InstRW<[SBWriteResGroup4], (instregex "CDQ")>;
488 def: InstRW<[SBWriteResGroup4], (instregex "CQO")>;
489 def: InstRW<[SBWriteResGroup4], (instregex "LAHF")>;
490 def: InstRW<[SBWriteResGroup4], (instregex "SAHF")>;
491 def: InstRW<[SBWriteResGroup4], (instregex "SAR(16|32|64)ri")>;
492 def: InstRW<[SBWriteResGroup4], (instregex "SAR8ri")>;
493 def: InstRW<[SBWriteResGroup4], (instregex "SETAEr")>;
494 def: InstRW<[SBWriteResGroup4], (instregex "SETBr")>;
495 def: InstRW<[SBWriteResGroup4], (instregex "SETEr")>;
496 def: InstRW<[SBWriteResGroup4], (instregex "SETGEr")>;
497 def: InstRW<[SBWriteResGroup4], (instregex "SETGr")>;
498 def: InstRW<[SBWriteResGroup4], (instregex "SETLEr")>;
499 def: InstRW<[SBWriteResGroup4], (instregex "SETLr")>;
500 def: InstRW<[SBWriteResGroup4], (instregex "SETNEr")>;
501 def: InstRW<[SBWriteResGroup4], (instregex "SETNOr")>;
502 def: InstRW<[SBWriteResGroup4], (instregex "SETNPr")>;
503 def: InstRW<[SBWriteResGroup4], (instregex "SETNSr")>;
504 def: InstRW<[SBWriteResGroup4], (instregex "SETOr")>;
505 def: InstRW<[SBWriteResGroup4], (instregex "SETPr")>;
506 def: InstRW<[SBWriteResGroup4], (instregex "SETSr")>;
507 def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)ri")>;
508 def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)r1")>;
509 def: InstRW<[SBWriteResGroup4], (instregex "SHL8r1")>;
510 def: InstRW<[SBWriteResGroup4], (instregex "SHL8ri")>;
511 def: InstRW<[SBWriteResGroup4], (instregex "SHR(16|32|64)ri")>;
512 def: InstRW<[SBWriteResGroup4], (instregex "SHR8ri")>;
513 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDYrri")>;
514 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDrri")>;
515 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSYrri")>;
516 def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSrri")>;
517 def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQAYrr")>;
518 def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQArr")>;
519 def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQUYrr")>;
476520 def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQUrr")>;
477521
478522 def SBWriteResGroup5 : SchedWriteRes<[SBPort15]> {
480524 let NumMicroOps = 1;
481525 let ResourceCycles = [1];
482526 }
483 def: InstRW<[SBWriteResGroup5], (instregex "KORTESTBrr")>;
484 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSBrr64")>;
485 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSDrr64")>;
486 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSWrr64")>;
487 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PADDQirr")>;
488 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PALIGNR64irr")>;
489 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSHUFBrr64")>;
490 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNBrr64")>;
491 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNDrr64")>;
492 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNWrr64")>;
493 def: InstRW<[SBWriteResGroup5], (instregex "PABSBrr")>;
494 def: InstRW<[SBWriteResGroup5], (instregex "PABSDrr")>;
495 def: InstRW<[SBWriteResGroup5], (instregex "PABSWrr")>;
496 def: InstRW<[SBWriteResGroup5], (instregex "PACKSSDWrr")>;
497 def: InstRW<[SBWriteResGroup5], (instregex "PACKSSWBrr")>;
498 def: InstRW<[SBWriteResGroup5], (instregex "PACKUSDWrr")>;
499 def: InstRW<[SBWriteResGroup5], (instregex "PACKUSWBrr")>;
500 def: InstRW<[SBWriteResGroup5], (instregex "PADDBrr")>;
501 def: InstRW<[SBWriteResGroup5], (instregex "PADDDrr")>;
502 def: InstRW<[SBWriteResGroup5], (instregex "PADDQrr")>;
503 def: InstRW<[SBWriteResGroup5], (instregex "PADDSBrr")>;
504 def: InstRW<[SBWriteResGroup5], (instregex "PADDSWrr")>;
505 def: InstRW<[SBWriteResGroup5], (instregex "PADDUSBrr")>;
506 def: InstRW<[SBWriteResGroup5], (instregex "PADDUSWrr")>;
507 def: InstRW<[SBWriteResGroup5], (instregex "PADDWrr")>;
508 def: InstRW<[SBWriteResGroup5], (instregex "PALIGNRrri")>;
509 def: InstRW<[SBWriteResGroup5], (instregex "PAVGBrr")>;
510 def: InstRW<[SBWriteResGroup5], (instregex "PAVGWrr")>;
511 def: InstRW<[SBWriteResGroup5], (instregex "PBLENDWrri")>;
512 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQBrr")>;
513 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQDrr")>;
514 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQQrr")>;
515 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQWrr")>;
516 def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTBrr")>;
517 def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTDrr")>;
518 def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTWrr")>;
519 def: InstRW<[SBWriteResGroup5], (instregex "PMAXSBrr")>;
520 def: InstRW<[SBWriteResGroup5], (instregex "PMAXSDrr")>;
521 def: InstRW<[SBWriteResGroup5], (instregex "PMAXSWrr")>;
522 def: InstRW<[SBWriteResGroup5], (instregex "PMAXUBrr")>;
523 def: InstRW<[SBWriteResGroup5], (instregex "PMAXUDrr")>;
524 def: InstRW<[SBWriteResGroup5], (instregex "PMAXUWrr")>;
525 def: InstRW<[SBWriteResGroup5], (instregex "PMINSBrr")>;
526 def: InstRW<[SBWriteResGroup5], (instregex "PMINSDrr")>;
527 def: InstRW<[SBWriteResGroup5], (instregex "PMINSWrr")>;
528 def: InstRW<[SBWriteResGroup5], (instregex "PMINUBrr")>;
529 def: InstRW<[SBWriteResGroup5], (instregex "PMINUDrr")>;
530 def: InstRW<[SBWriteResGroup5], (instregex "PMINUWrr")>;
531 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBDrr")>;
532 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBQrr")>;
533 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBWrr")>;
534 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXDQrr")>;
535 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWDrr")>;
536 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWQrr")>;
537 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBDrr")>;
538 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBQrr")>;
539 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBWrr")>;
540 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXDQrr")>;
541 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWDrr")>;
542 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWQrr")>;
543 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFBrr")>;
544 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFDri")>;
545 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFHWri")>;
546 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFLWri")>;
547 def: InstRW<[SBWriteResGroup5], (instregex "PSIGNBrr128")>;
548 def: InstRW<[SBWriteResGroup5], (instregex "PSIGNDrr128")>;
549 def: InstRW<[SBWriteResGroup5], (instregex "PSIGNWrr128")>;
550 def: InstRW<[SBWriteResGroup5], (instregex "PSLLDQri")>;
551 def: InstRW<[SBWriteResGroup5], (instregex "PSRLDQri")>;
552 def: InstRW<[SBWriteResGroup5], (instregex "PSUBBrr")>;
553 def: InstRW<[SBWriteResGroup5], (instregex "PSUBDrr")>;
554 def: InstRW<[SBWriteResGroup5], (instregex "PSUBQrr")>;
555 def: InstRW<[SBWriteResGroup5], (instregex "PSUBSBrr")>;
556 def: InstRW<[SBWriteResGroup5], (instregex "PSUBSWrr")>;
557 def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSBrr")>;
558 def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSWrr")>;
559 def: InstRW<[SBWriteResGroup5], (instregex "PSUBWrr")>;
560 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHBWrr")>;
561 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHDQrr")>;
562 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHQDQrr")>;
563 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHWDrr")>;
564 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLBWrr")>;
565 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLDQrr")>;
566 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLQDQrr")>;
567 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLWDrr")>;
568 def: InstRW<[SBWriteResGroup5], (instregex "VMASKMOVPSYrm")>;
569 def: InstRW<[SBWriteResGroup5], (instregex "VPABSBrr")>;
570 def: InstRW<[SBWriteResGroup5], (instregex "VPABSDrr")>;
571 def: InstRW<[SBWriteResGroup5], (instregex "VPABSWrr")>;
572 def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSDWrr")>;
573 def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSWBrr")>;
574 def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSDWrr")>;
575 def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSWBrr")>;
576 def: InstRW<[SBWriteResGroup5], (instregex "VPADDBrr")>;
577 def: InstRW<[SBWriteResGroup5], (instregex "VPADDDrr")>;
578 def: InstRW<[SBWriteResGroup5], (instregex "VPADDQrr")>;
579 def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSBrr")>;
580 def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSWrr")>;
581 def: InstRW<[SBWriteResGroup5], (instregex "VPALIGNRrri")>;
582 def: InstRW<[SBWriteResGroup5], (instregex "VPAVGBrr")>;
583 def: InstRW<[SBWriteResGroup5], (instregex "VPAVGWrr")>;
584 def: InstRW<[SBWriteResGroup5], (instregex "VPBLENDWrri")>;
585 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQBrr")>;
586 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQDrr")>;
587 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQWrr")>;
588 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTBrr")>;
589 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTDrr")>;
590 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTWrr")>;
591 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSBrr")>;
592 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSDrr")>;
593 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSWrr")>;
594 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUBrr")>;
595 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUDrr")>;
596 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUWrr")>;
597 def: InstRW<[SBWriteResGroup5], (instregex "VPMINSBrr")>;
598 def: InstRW<[SBWriteResGroup5], (instregex "VPMINSDrr")>;
599 def: InstRW<[SBWriteResGroup5], (instregex "VPMINSWrr")>;
600 def: InstRW<[SBWriteResGroup5], (instregex "VPMINUBrr")>;
601 def: InstRW<[SBWriteResGroup5], (instregex "VPMINUDrr")>;
602 def: InstRW<[SBWriteResGroup5], (instregex "VPMINUWrr")>;
603 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBDrr")>;
604 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBQrr")>;
605 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBWrr")>;
606 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXDQrr")>;
607 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWDrr")>;
608 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWQrr")>;
609 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBDrr")>;
610 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBQrr")>;
611 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBWrr")>;
612 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXDQrr")>;
613 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWDrr")>;
614 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWQrr")>;
615 def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFBrr")>;
616 def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFDri")>;
617 def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFLWri")>;
618 def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNBrr128")>;
619 def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNDrr128")>;
620 def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNWrr128")>;
621 def: InstRW<[SBWriteResGroup5], (instregex "VPSLLDQri")>;
622 def: InstRW<[SBWriteResGroup5], (instregex "VPSRLDQri")>;
623 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBBrr")>;
624 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBDrr")>;
625 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBQrr")>;
626 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSBrr")>;
627 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSWrr")>;
628 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSBrr")>;
629 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSWrr")>;
630 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBWrr")>;
631 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHBWrr")>;
632 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHDQrr")>;
633 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHWDrr")>;
634 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLDQrr")>;
635 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLQDQrr")>;
527 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSBrr64")>;
528 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSDrr64")>;
529 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSWrr64")>;
530 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PADDQirr")>;
531 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PALIGNR64irr")>;
532 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSHUFBrr64")>;
533 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNBrr64")>;
534 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNDrr64")>;
535 def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNWrr64")>;
536 def: InstRW<[SBWriteResGroup5], (instregex "PABSBrr")>;
537 def: InstRW<[SBWriteResGroup5], (instregex "PABSDrr")>;
538 def: InstRW<[SBWriteResGroup5], (instregex "PABSWrr")>;
539 def: InstRW<[SBWriteResGroup5], (instregex "PACKSSDWrr")>;
540 def: InstRW<[SBWriteResGroup5], (instregex "PACKSSWBrr")>;
541 def: InstRW<[SBWriteResGroup5], (instregex "PACKUSDWrr")>;
542 def: InstRW<[SBWriteResGroup5], (instregex "PACKUSWBrr")>;
543 def: InstRW<[SBWriteResGroup5], (instregex "PADDBrr")>;
544 def: InstRW<[SBWriteResGroup5], (instregex "PADDDrr")>;
545 def: InstRW<[SBWriteResGroup5], (instregex "PADDQrr")>;
546 def: InstRW<[SBWriteResGroup5], (instregex "PADDSBrr")>;
547 def: InstRW<[SBWriteResGroup5], (instregex "PADDSWrr")>;
548 def: InstRW<[SBWriteResGroup5], (instregex "PADDUSBrr")>;
549 def: InstRW<[SBWriteResGroup5], (instregex "PADDUSWrr")>;
550 def: InstRW<[SBWriteResGroup5], (instregex "PADDWrr")>;
551 def: InstRW<[SBWriteResGroup5], (instregex "PALIGNRrri")>;
552 def: InstRW<[SBWriteResGroup5], (instregex "PAVGBrr")>;
553 def: InstRW<[SBWriteResGroup5], (instregex "PAVGWrr")>;
554 def: InstRW<[SBWriteResGroup5], (instregex "PBLENDWrri")>;
555 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQBrr")>;
556 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQDrr")>;
557 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQQrr")>;
558 def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQWrr")>;
559 def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTBrr")>;
560 def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTDrr")>;
561 def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTWrr")>;
562 def: InstRW<[SBWriteResGroup5], (instregex "PMAXSBrr")>;
563 def: InstRW<[SBWriteResGroup5], (instregex "PMAXSDrr")>;
564 def: InstRW<[SBWriteResGroup5], (instregex "PMAXSWrr")>;
565 def: InstRW<[SBWriteResGroup5], (instregex "PMAXUBrr")>;
566 def: InstRW<[SBWriteResGroup5], (instregex "PMAXUDrr")>;
567 def: InstRW<[SBWriteResGroup5], (instregex "PMAXUWrr")>;
568 def: InstRW<[SBWriteResGroup5], (instregex "PMINSBrr")>;
569 def: InstRW<[SBWriteResGroup5], (instregex "PMINSDrr")>;
570 def: InstRW<[SBWriteResGroup5], (instregex "PMINSWrr")>;
571 def: InstRW<[SBWriteResGroup5], (instregex "PMINUBrr")>;
572 def: InstRW<[SBWriteResGroup5], (instregex "PMINUDrr")>;
573 def: InstRW<[SBWriteResGroup5], (instregex "PMINUWrr")>;
574 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBDrr")>;
575 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBQrr")>;
576 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBWrr")>;
577 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXDQrr")>;
578 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWDrr")>;
579 def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWQrr")>;
580 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBDrr")>;
581 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBQrr")>;
582 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBWrr")>;
583 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXDQrr")>;
584 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWDrr")>;
585 def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWQrr")>;
586 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFBrr")>;
587 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFDri")>;
588 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFHWri")>;
589 def: InstRW<[SBWriteResGroup5], (instregex "PSHUFLWri")>;
590 def: InstRW<[SBWriteResGroup5], (instregex "PSIGNBrr128")>;
591 def: InstRW<[SBWriteResGroup5], (instregex "PSIGNDrr128")>;
592 def: InstRW<[SBWriteResGroup5], (instregex "PSIGNWrr128")>;
593 def: InstRW<[SBWriteResGroup5], (instregex "PSLLDQri")>;
594 def: InstRW<[SBWriteResGroup5], (instregex "PSRLDQri")>;
595 def: InstRW<[SBWriteResGroup5], (instregex "PSUBBrr")>;
596 def: InstRW<[SBWriteResGroup5], (instregex "PSUBDrr")>;
597 def: InstRW<[SBWriteResGroup5], (instregex "PSUBQrr")>;
598 def: InstRW<[SBWriteResGroup5], (instregex "PSUBSBrr")>;
599 def: InstRW<[SBWriteResGroup5], (instregex "PSUBSWrr")>;
600 def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSBrr")>;
601 def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSWrr")>;
602 def: InstRW<[SBWriteResGroup5], (instregex "PSUBWrr")>;
603 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHBWrr")>;
604 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHDQrr")>;
605 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHQDQrr")>;
606 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHWDrr")>;
607 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLBWrr")>;
608 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLDQrr")>;
609 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLQDQrr")>;
610 def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLWDrr")>;
611 def: InstRW<[SBWriteResGroup5], (instregex "VPABSBrr")>;
612 def: InstRW<[SBWriteResGroup5], (instregex "VPABSDrr")>;
613 def: InstRW<[SBWriteResGroup5], (instregex "VPABSWrr")>;
614 def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSDWrr")>;
615 def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSWBrr")>;
616 def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSDWrr")>;
617 def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSWBrr")>;
618 def: InstRW<[SBWriteResGroup5], (instregex "VPADDBrr")>;
619 def: InstRW<[SBWriteResGroup5], (instregex "VPADDDrr")>;
620 def: InstRW<[SBWriteResGroup5], (instregex "VPADDQrr")>;
621 def: InstRW<[SBWriteResGroup5], (instregex "VPADDSBrr")>;
622 def: InstRW<[SBWriteResGroup5], (instregex "VPADDSWrr")>;
623 def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSBrr")>;
624 def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSWrr")>;
625 def: InstRW<[SBWriteResGroup5], (instregex "VPADDWrr")>;
626 def: InstRW<[SBWriteResGroup5], (instregex "VPALIGNRrri")>;
627 def: InstRW<[SBWriteResGroup5], (instregex "VPAVGBrr")>;
628 def: InstRW<[SBWriteResGroup5], (instregex "VPAVGWrr")>;
629 def: InstRW<[SBWriteResGroup5], (instregex "VPBLENDWrri")>;
630 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQBrr")>;
631 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQDrr")>;
632 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQQrr")>;
633 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQWrr")>;
634 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTBrr")>;
635 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTDrr")>;
636 def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTWrr")>;
637 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSBrr")>;
638 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSDrr")>;
639 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSWrr")>;
640 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUBrr")>;
641 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUDrr")>;
642 def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUWrr")>;
643 def: InstRW<[SBWriteResGroup5], (instregex "VPMINSBrr")>;
644 def: InstRW<[SBWriteResGroup5], (instregex "VPMINSDrr")>;
645 def: InstRW<[SBWriteResGroup5], (instregex "VPMINSWrr")>;
646 def: InstRW<[SBWriteResGroup5], (instregex "VPMINUBrr")>;
647 def: InstRW<[SBWriteResGroup5], (instregex "VPMINUDrr")>;
648 def: InstRW<[SBWriteResGroup5], (instregex "VPMINUWrr")>;
649 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBDrr")>;
650 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBQrr")>;
651 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBWrr")>;
652 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXDQrr")>;
653 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWDrr")>;
654 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWQrr")>;
655 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBDrr")>;
656 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBQrr")>;
657 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBWrr")>;
658 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXDQrr")>;
659 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWDrr")>;
660 def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWQrr")>;
661 def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFBrr")>;
662 def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFDri")>;
663 def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFHWri")>;
664 def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFLWri")>;
665 def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNBrr128")>;
666 def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNDrr128")>;
667 def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNWrr128")>;
668 def: InstRW<[SBWriteResGroup5], (instregex "VPSLLDQri")>;
669 def: InstRW<[SBWriteResGroup5], (instregex "VPSRLDQri")>;
670 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBBrr")>;
671 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBDrr")>;
672 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBQrr")>;
673 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSBrr")>;
674 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSWrr")>;
675 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSBrr")>;
676 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSWrr")>;
677 def: InstRW<[SBWriteResGroup5], (instregex "VPSUBWrr")>;
678 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHBWrr")>;
679 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHDQrr")>;
680 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHQDQrr")>;
681 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHWDrr")>;
682 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLBWrr")>;
683 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLDQrr")>;
684 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLQDQrr")>;
636685 def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLWDrr")>;
637686
638687 def SBWriteResGroup6 : SchedWriteRes<[SBPort015]> {
640689 let NumMicroOps = 1;
641690 let ResourceCycles = [1];
642691 }
643 def: InstRW<[SBWriteResGroup6], (instregex "ADD32ri8")>;
644 def: InstRW<[SBWriteResGroup6], (instregex "ADD32rr")>;
645 def: InstRW<[SBWriteResGroup6], (instregex "ADD8ri")>;
646 def: InstRW<[SBWriteResGroup6], (instregex "ADD8rr")>;
647 def: InstRW<[SBWriteResGroup6], (instregex "AND32ri")>;
648 def: InstRW<[SBWriteResGroup6], (instregex "AND64ri8")>;
649 def: InstRW<[SBWriteResGroup6], (instregex "AND64rr")>;
650 def: InstRW<[SBWriteResGroup6], (instregex "AND8ri")>;
651 def: InstRW<[SBWriteResGroup6], (instregex "AND8rr")>;
652 def: InstRW<[SBWriteResGroup6], (instregex "CBW")>;
653 def: InstRW<[SBWriteResGroup6], (instregex "CMC")>;
654 def: InstRW<[SBWriteResGroup6], (instregex "CMP16ri8")>;
655 def: InstRW<[SBWriteResGroup6], (instregex "CMP32i32")>;
656 def: InstRW<[SBWriteResGroup6], (instregex "CMP64rr")>;
657 def: InstRW<[SBWriteResGroup6], (instregex "CMP8ri")>;
658 def: InstRW<[SBWriteResGroup6], (instregex "CMP8rr")>;
659 def: InstRW<[SBWriteResGroup6], (instregex "CWDE")>;
660 def: InstRW<[SBWriteResGroup6], (instregex "DEC64r")>;
661 def: InstRW<[SBWriteResGroup6], (instregex "DEC8r")>;
662 def: InstRW<[SBWriteResGroup6], (instregex "INC64r")>;
663 def: InstRW<[SBWriteResGroup6], (instregex "INC8r")>;
664 def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVD64from64rr")>;
665 def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVQ2DQrr")>;
666 def: InstRW<[SBWriteResGroup6], (instregex "MOV32rr")>;
667 def: InstRW<[SBWriteResGroup6], (instregex "MOV8ri")>;
668 def: InstRW<[SBWriteResGroup6], (instregex "MOV8rr")>;
669 def: InstRW<[SBWriteResGroup6], (instregex "MOVDQArr")>;
670 def: InstRW<[SBWriteResGroup6], (instregex "MOVDQUrr")>;
671 def: InstRW<[SBWriteResGroup6], (instregex "MOVPQI2QIrr")>;
672 def: InstRW<[SBWriteResGroup6], (instregex "MOVSX32rr16")>;
673 def: InstRW<[SBWriteResGroup6], (instregex "MOVSX32rr8")>;
674 def: InstRW<[SBWriteResGroup6], (instregex "MOVZX32rr16")>;
675 def: InstRW<[SBWriteResGroup6], (instregex "MOVZX32rr8")>;
676 def: InstRW<[SBWriteResGroup6], (instregex "NEG64r")>;
677 def: InstRW<[SBWriteResGroup6], (instregex "NEG8r")>;
678 def: InstRW<[SBWriteResGroup6], (instregex "NOT64r")>;
679 def: InstRW<[SBWriteResGroup6], (instregex "NOT8r")>;
680 def: InstRW<[SBWriteResGroup6], (instregex "OR64ri8")>;
681 def: InstRW<[SBWriteResGroup6], (instregex "OR64rr")>;
682 def: InstRW<[SBWriteResGroup6], (instregex "OR8ri")>;
683 def: InstRW<[SBWriteResGroup6], (instregex "OR8rr")>;
684 def: InstRW<[SBWriteResGroup6], (instregex "PANDNrr")>;
685 def: InstRW<[SBWriteResGroup6], (instregex "PANDrr")>;
686 def: InstRW<[SBWriteResGroup6], (instregex "PORrr")>;
687 def: InstRW<[SBWriteResGroup6], (instregex "PXORrr")>;
688 def: InstRW<[SBWriteResGroup6], (instregex "STC")>;
689 def: InstRW<[SBWriteResGroup6], (instregex "SUB64ri8")>;
690 def: InstRW<[SBWriteResGroup6], (instregex "SUB64rr")>;
691 def: InstRW<[SBWriteResGroup6], (instregex "SUB8ri")>;
692 def: InstRW<[SBWriteResGroup6], (instregex "SUB8rr")>;
693 def: InstRW<[SBWriteResGroup6], (instregex "TEST64rr")>;
694 def: InstRW<[SBWriteResGroup6], (instregex "TEST8ri")>;
695 def: InstRW<[SBWriteResGroup6], (instregex "TEST8rr")>;
696 def: InstRW<[SBWriteResGroup6], (instregex "VMOVPQI2QIrr")>;
697 def: InstRW<[SBWriteResGroup6], (instregex "VMOVZPQILo2PQIrr")>;
698 def: InstRW<[SBWriteResGroup6], (instregex "VPANDNrr")>;
699 def: InstRW<[SBWriteResGroup6], (instregex "VPANDrr")>;
700 def: InstRW<[SBWriteResGroup6], (instregex "VPORrr")>;
701 def: InstRW<[SBWriteResGroup6], (instregex "VPXORrr")>;
702 def: InstRW<[SBWriteResGroup6], (instregex "XOR32rr")>;
703 def: InstRW<[SBWriteResGroup6], (instregex "XOR64ri8")>;
704 def: InstRW<[SBWriteResGroup6], (instregex "XOR8ri")>;
692 def: InstRW<[SBWriteResGroup6], (instregex "ADD(16|32|64)ri8")>;
693 def: InstRW<[SBWriteResGroup6], (instregex "ADD(16|32|64)rr")>;
694 def: InstRW<[SBWriteResGroup6], (instregex "ADD8i8")>;
695 def: InstRW<[SBWriteResGroup6], (instregex "ADD8ri")>;
696 def: InstRW<[SBWriteResGroup6], (instregex "ADD8rr")>;
697 def: InstRW<[SBWriteResGroup6], (instregex "AND(16|32|64)ri8")>;
698 def: InstRW<[SBWriteResGroup6], (instregex "AND(16|32|64)rr")>;
699 def: InstRW<[SBWriteResGroup6], (instregex "AND8i8")>;
700 def: InstRW<[SBWriteResGroup6], (instregex "AND8ri")>;
701 def: InstRW<[SBWriteResGroup6], (instregex "AND8rr")>;
702 def: InstRW<[SBWriteResGroup6], (instregex "CBW")>;
703 def: InstRW<[SBWriteResGroup6], (instregex "CMC")>;
704 def: InstRW<[SBWriteResGroup6], (instregex "CMP(16|32|64)ri8")>;
705 def: InstRW<[SBWriteResGroup6], (instregex "CMP(16|32|64)rr")>;
706 def: InstRW<[SBWriteResGroup6], (instregex "CMP8i8")>;
707 def: InstRW<[SBWriteResGroup6], (instregex "CMP8ri")>;
708 def: InstRW<[SBWriteResGroup6], (instregex "CMP8rr")>;
709 def: InstRW<[SBWriteResGroup6], (instregex "CWDE")>;
710 def: InstRW<[SBWriteResGroup6], (instregex "DEC(16|32|64)r")>;
711 def: InstRW<[SBWriteResGroup6], (instregex "DEC8r")>;
712 def: InstRW<[SBWriteResGroup6], (instregex "INC(16|32|64)r")>;
713 def: InstRW<[SBWriteResGroup6], (instregex "INC8r")>;
714 def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVD64from64rr")>;
715 def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVQ2DQrr")>;
716 def: InstRW<[SBWriteResGroup6], (instregex "MOV(16|32|64)rr")>;
717 def: InstRW<[SBWriteResGroup6], (instregex "MOV8ri")>;
718 def: InstRW<[SBWriteResGroup6], (instregex "MOV8rr")>;
719 def: InstRW<[SBWriteResGroup6], (instregex "MOVDQArr")>;
720 def: InstRW<[SBWriteResGroup6], (instregex "MOVDQUrr")>;
721 def: InstRW<[SBWriteResGroup6], (instregex "MOVPQI2QIrr")>;
722 def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr16")>;
723 def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr32")>;
724 def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr8")>;
725 def: InstRW<[SBWriteResGroup6], (instregex "MOVZX(16|32|64)rr16")>;
726 def: InstRW<[SBWriteResGroup6], (instregex "MOVZX(16|32|64)rr8")>;
727 def: InstRW<[SBWriteResGroup6], (instregex "NEG(16|32|64)r")>;
728 def: InstRW<[SBWriteResGroup6], (instregex "NEG8r")>;
729 def: InstRW<[SBWriteResGroup6], (instregex "NOT(16|32|64)r")>;
730 def: InstRW<[SBWriteResGroup6], (instregex "NOT8r")>;
731 def: InstRW<[SBWriteResGroup6], (instregex "OR(16|32|64)ri8")>;
732 def: InstRW<[SBWriteResGroup6], (instregex "OR(16|32|64)rr")>;
733 def: InstRW<[SBWriteResGroup6], (instregex "OR8i8")>;
734 def: InstRW<[SBWriteResGroup6], (instregex "OR8ri")>;
735 def: InstRW<[SBWriteResGroup6], (instregex "OR8rr")>;
736 def: InstRW<[SBWriteResGroup6], (instregex "PANDNrr")>;
737 def: InstRW<[SBWriteResGroup6], (instregex "PANDrr")>;
738 def: InstRW<[SBWriteResGroup6], (instregex "PORrr")>;
739 def: InstRW<[SBWriteResGroup6], (instregex "PXORrr")>;
740 def: InstRW<[SBWriteResGroup6], (instregex "STC")>;
741 def: InstRW<[SBWriteResGroup6], (instregex "SUB(16|32|64)ri8")>;
742 def: InstRW<[SBWriteResGroup6], (instregex "SUB(16|32|64)rr")>;
743 def: InstRW<[SBWriteResGroup6], (instregex "SUB8i8")>;
744 def: InstRW<[SBWriteResGroup6], (instregex "SUB8ri")>;
745 def: InstRW<[SBWriteResGroup6], (instregex "SUB8rr")>;
746 def: InstRW<[SBWriteResGroup6], (instregex "TEST(16|32|64)rr")>;
747 def: InstRW<[SBWriteResGroup6], (instregex "TEST8i8")>;
748 def: InstRW<[SBWriteResGroup6], (instregex "TEST8ri")>;
749 def: InstRW<[SBWriteResGroup6], (instregex "TEST8rr")>;
750 def: InstRW<[SBWriteResGroup6], (instregex "VMOVPQI2QIrr")>;
751 def: InstRW<[SBWriteResGroup6], (instregex "VMOVZPQILo2PQIrr")>;
752 def: InstRW<[SBWriteResGroup6], (instregex "VPANDNrr")>;
753 def: InstRW<[SBWriteResGroup6], (instregex "VPANDrr")>;
754 def: InstRW<[SBWriteResGroup6], (instregex "VPORrr")>;
755 def: InstRW<[SBWriteResGroup6], (instregex "VPXORrr")>;
756 def: InstRW<[SBWriteResGroup6], (instregex "XOR(16|32|64)ri8")>;
757 def: InstRW<[SBWriteResGroup6], (instregex "XOR(16|32|64)rr")>;
758 def: InstRW<[SBWriteResGroup6], (instregex "XOR8i8")>;
759 def: InstRW<[SBWriteResGroup6], (instregex "XOR8ri")>;
705760 def: InstRW<[SBWriteResGroup6], (instregex "XOR8rr")>;
706761
707762 def SBWriteResGroup7 : SchedWriteRes<[SBPort0]> {
709764 let NumMicroOps = 1;
710765 let ResourceCycles = [1];
711766 }
712 def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPDrr")>;
713 def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPSrr")>;
714 def: InstRW<[SBWriteResGroup7], (instregex "MOVPDI2DIrr")>;
715 def: InstRW<[SBWriteResGroup7], (instregex "MOVPQIto64rr")>;
716 def: InstRW<[SBWriteResGroup7], (instregex "PMOVMSKBrr")>;
717 def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDYrr")>;
718 def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDrr")>;
719 def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPSrr")>;
720 def: InstRW<[SBWriteResGroup7], (instregex "VMOVPDI2DIrr")>;
767 def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPDrr")>;
768 def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPSrr")>;
769 def: InstRW<[SBWriteResGroup7], (instregex "MOVPDI2DIrr")>;
770 def: InstRW<[SBWriteResGroup7], (instregex "MOVPQIto64rr")>;
771 def: InstRW<[SBWriteResGroup7], (instregex "PMOVMSKBrr")>;
772 def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDYrr")>;
773 def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDrr")>;
774 def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPSYrr")>;
775 def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPSrr")>;
776 def: InstRW<[SBWriteResGroup7], (instregex "VMOVPDI2DIrr")>;
721777 def: InstRW<[SBWriteResGroup7], (instregex "VMOVPQIto64rr")>;
722778
723 def SBWriteResGroup9 : SchedWriteRes<[SBPort0]> {
779 def SBWriteResGroup9 : SchedWriteRes<[SBPort05]> {
724780 let Latency = 2;
725781 let NumMicroOps = 2;
726782 let ResourceCycles = [2];
727783 }
728 def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPDrr0")>;
729 def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPSrr0")>;
730 def: InstRW<[SBWriteResGroup9], (instregex "ROL32ri")>;
731 def: InstRW<[SBWriteResGroup9], (instregex "ROL8ri")>;
732 def: InstRW<[SBWriteResGroup9], (instregex "ROR32ri")>;
733 def: InstRW<[SBWriteResGroup9], (instregex "ROR8ri")>;
734 def: InstRW<[SBWriteResGroup9], (instregex "SETAr")>;
735 def: InstRW<[SBWriteResGroup9], (instregex "SETBEr")>;
736 def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDYrr")>;
737 def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDrr")>;
738 def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPSYrr")>;
784 def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPDrr0")>;
785 def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPSrr0")>;
786 def: InstRW<[SBWriteResGroup9], (instregex "ROL(16|32|64)ri")>;
787 def: InstRW<[SBWriteResGroup9], (instregex "ROL8ri")>;
788 def: InstRW<[SBWriteResGroup9], (instregex "ROR(16|32|64)ri")>;
789 def: InstRW<[SBWriteResGroup9], (instregex "ROR8ri")>;
790 def: InstRW<[SBWriteResGroup9], (instregex "SETAr")>;
791 def: InstRW<[SBWriteResGroup9], (instregex "SETBEr")>;
792 def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDYrr")>;
793 def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDrr")>;
794 def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPSYrr")>;
739795 def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPSrr")>;
740796
741797 def SBWriteResGroup10 : SchedWriteRes<[SBPort15]> {
786842 let NumMicroOps = 2;
787843 let ResourceCycles = [1,1];
788844 }
789 def: InstRW<[SBWriteResGroup14], (instregex "PSLLDrr")>;
790 def: InstRW<[SBWriteResGroup14], (instregex "PSLLQrr")>;
791 def: InstRW<[SBWriteResGroup14], (instregex "PSLLWrr")>;
792 def: InstRW<[SBWriteResGroup14], (instregex "PSRADrr")>;
793 def: InstRW<[SBWriteResGroup14], (instregex "PSRAWrr")>;
794 def: InstRW<[SBWriteResGroup14], (instregex "PSRLDrr")>;
795 def: InstRW<[SBWriteResGroup14], (instregex "PSRLQrr")>;
796 def: InstRW<[SBWriteResGroup14], (instregex "PSRLWrr")>;
797 def: InstRW<[SBWriteResGroup14], (instregex "VPSRADrr")>;
798 def: InstRW<[SBWriteResGroup14], (instregex "VPSRAWrr")>;
799 def: InstRW<[SBWriteResGroup14], (instregex "VPSRLDrr")>;
800 def: InstRW<[SBWriteResGroup14], (instregex "VPSRLQrr")>;
845 def: InstRW<[SBWriteResGroup14], (instregex "PSLLDrr")>;
846 def: InstRW<[SBWriteResGroup14], (instregex "PSLLQrr")>;
847 def: InstRW<[SBWriteResGroup14], (instregex "PSLLWrr")>;
848 def: InstRW<[SBWriteResGroup14], (instregex "PSRADrr")>;
849 def: InstRW<[SBWriteResGroup14], (instregex "PSRAWrr")>;
850 def: InstRW<[SBWriteResGroup14], (instregex "PSRLDrr")>;
851 def: InstRW<[SBWriteResGroup14], (instregex "PSRLQrr")>;
852 def: InstRW<[SBWriteResGroup14], (instregex "PSRLWrr")>;
853 def: InstRW<[SBWriteResGroup14], (instregex "VPSLLDrr")>;
854 def: InstRW<[SBWriteResGroup14], (instregex "VPSLLQrr")>;
855 def: InstRW<[SBWriteResGroup14], (instregex "VPSLLWrr")>;
856 def: InstRW<[SBWriteResGroup14], (instregex "VPSRADrr")>;
857 def: InstRW<[SBWriteResGroup14], (instregex "VPSRAWrr")>;
858 def: InstRW<[SBWriteResGroup14], (instregex "VPSRLDrr")>;
859 def: InstRW<[SBWriteResGroup14], (instregex "VPSRLQrr")>;
801860 def: InstRW<[SBWriteResGroup14], (instregex "VPSRLWrr")>;
802861
803862 def SBWriteResGroup15 : SchedWriteRes<[SBPort0,SBPort015]> {
807866 }
808867 def: InstRW<[SBWriteResGroup15], (instregex "FNSTSW16r")>;
809868
810 def SBWriteResGroup16 : SchedWriteRes<[SBPort1,SBPort0]> {
869 def SBWriteResGroup16 : SchedWriteRes<[SBPort1,SBPort05]> {
811870 let Latency = 2;
812871 let NumMicroOps = 2;
813872 let ResourceCycles = [1,1];
814873 }
815 def: InstRW<[SBWriteResGroup16], (instregex "BSWAP32r")>;
874 def: InstRW<[SBWriteResGroup16], (instregex "BSWAP(16|32|64)r")>;
816875
817876 def SBWriteResGroup17 : SchedWriteRes<[SBPort5,SBPort15]> {
818877 let Latency = 2;
833892 let NumMicroOps = 2;
834893 let ResourceCycles = [1,1];
835894 }
895 def: InstRW<[SBWriteResGroup18], (instregex "JRCXZ")>;
836896 def: InstRW<[SBWriteResGroup18], (instregex "MMX_MOVDQ2Qrr")>;
837897
838 def SBWriteResGroup19 : SchedWriteRes<[SBPort0,SBPort015]> {
898 def SBWriteResGroup19 : SchedWriteRes<[SBPort05,SBPort015]> {
839899 let Latency = 2;
840900 let NumMicroOps = 2;
841901 let ResourceCycles = [1,1];
842902 }
843 def: InstRW<[SBWriteResGroup19], (instregex "ADC64ri8")>;
844 def: InstRW<[SBWriteResGroup19], (instregex "ADC64rr")>;
845 def: InstRW<[SBWriteResGroup19], (instregex "ADC8ri")>;
846 def: InstRW<[SBWriteResGroup19], (instregex "ADC8rr")>;
847 def: InstRW<[SBWriteResGroup19], (instregex "CMOVAE32rr")>;
848 def: InstRW<[SBWriteResGroup19], (instregex "CMOVB32rr")>;
849 def: InstRW<[SBWriteResGroup19], (instregex "CMOVE32rr")>;
850 def: InstRW<[SBWriteResGroup19], (instregex "CMOVG32rr")>;
851 def: InstRW<[SBWriteResGroup19], (instregex "CMOVGE32rr")>;
852 def: InstRW<[SBWriteResGroup19], (instregex "CMOVL32rr")>;
853 def: InstRW<[SBWriteResGroup19], (instregex "CMOVLE32rr")>;
854 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNE32rr")>;
855 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNO32rr")>;
856 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNP32rr")>;
857 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNS32rr")>;
858 def: InstRW<[SBWriteResGroup19], (instregex "CMOVO32rr")>;
859 def: InstRW<[SBWriteResGroup19], (instregex "CMOVP32rr")>;
860 def: InstRW<[SBWriteResGroup19], (instregex "CMOVS32rr")>;
861 def: InstRW<[SBWriteResGroup19], (instregex "SBB32rr")>;
862 def: InstRW<[SBWriteResGroup19], (instregex "SBB64ri8")>;
863 def: InstRW<[SBWriteResGroup19], (instregex "SBB8ri")>;
864 def: InstRW<[SBWriteResGroup19], (instregex "SBB8rr")>;
865 def: InstRW<[SBWriteResGroup19], (instregex "SHLD32rri8")>;
866 def: InstRW<[SBWriteResGroup19], (instregex "SHRD32rri8")>;
903 def: InstRW<[SBWriteResGroup19], (instregex "ADC(16|32|64)ri8")>;
904 def: InstRW<[SBWriteResGroup19], (instregex "ADC(16|32|64)rr")>;
905 def: InstRW<[SBWriteResGroup19], (instregex "ADC8ri")>;
906 def: InstRW<[SBWriteResGroup19], (instregex "ADC8rr")>;
907 def: InstRW<[SBWriteResGroup19], (instregex "CMOVAE(16|32|64)rr")>;
908 def: InstRW<[SBWriteResGroup19], (instregex "CMOVB(16|32|64)rr")>;
909 def: InstRW<[SBWriteResGroup19], (instregex "CMOVE(16|32|64)rr")>;
910 def: InstRW<[SBWriteResGroup19], (instregex "CMOVG(16|32|64)rr")>;
911 def: InstRW<[SBWriteResGroup19], (instregex "CMOVGE(16|32|64)rr")>;
912 def: InstRW<[SBWriteResGroup19], (instregex "CMOVL(16|32|64)rr")>;
913 def: InstRW<[SBWriteResGroup19], (instregex "CMOVLE(16|32|64)rr")>;
914 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNE(16|32|64)rr")>;
915 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNO(16|32|64)rr")>;
916 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNP(16|32|64)rr")>;
917 def: InstRW<[SBWriteResGroup19], (instregex "CMOVNS(16|32|64)rr")>;
918 def: InstRW<[SBWriteResGroup19], (instregex "CMOVO(16|32|64)rr")>;
919 def: InstRW<[SBWriteResGroup19], (instregex "CMOVP(16|32|64)rr")>;
920 def: InstRW<[SBWriteResGroup19], (instregex "CMOVS(16|32|64)rr")>;
921 def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)ri8")>;
922 def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)rr")>;
923 def: InstRW<[SBWriteResGroup19], (instregex "SBB8ri")>;
924 def: InstRW<[SBWriteResGroup19], (instregex "SBB8rr")>;
925 def: InstRW<[SBWriteResGroup19], (instregex "SHLD(16|32|64)rri8")>;
926 def: InstRW<[SBWriteResGroup19], (instregex "SHRD(16|32|64)rri8")>;
867927
868928 def SBWriteResGroup20 : SchedWriteRes<[SBPort0]> {
869929 let Latency = 3;
870930 let NumMicroOps = 1;
871931 let ResourceCycles = [1];
872932 }
873 def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMADDUBSWrr64")>;
874 def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULHRSWrr64")>;
875 def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULUDQirr")>;
876 def: InstRW<[SBWriteResGroup20], (instregex "PMADDUBSWrr")>;
877 def: InstRW<[SBWriteResGroup20], (instregex "PMADDWDrr")>;
878 def: InstRW<[SBWriteResGroup20], (instregex "PMULDQrr")>;
879 def: InstRW<[SBWriteResGroup20], (instregex "PMULHRSWrr")>;
880 def: InstRW<[SBWriteResGroup20], (instregex "PMULHUWrr")>;
881 def: InstRW<[SBWriteResGroup20], (instregex "PMULHWrr")>;
882 def: InstRW<[SBWriteResGroup20], (instregex "PMULLDrr")>;
883 def: InstRW<[SBWriteResGroup20], (instregex "PMULLWrr")>;
884 def: InstRW<[SBWriteResGroup20], (instregex "PMULUDQrr")>;
885 def: InstRW<[SBWriteResGroup20], (instregex "PSADBWrr")>;
886 def: InstRW<[SBWriteResGroup20], (instregex "VMOVMSKPSYrr")>;
887 def: InstRW<[SBWriteResGroup20], (instregex "VPMADDUBSWrr")>;
888 def: InstRW<[SBWriteResGroup20], (instregex "VPMADDWDrr")>;
889 def: InstRW<[SBWriteResGroup20], (instregex "VPMULDQrr")>;
890 def: InstRW<[SBWriteResGroup20], (instregex "VPMULHRSWrr")>;
891 def: InstRW<[SBWriteResGroup20], (instregex "VPMULHWrr")>;
892 def: InstRW<[SBWriteResGroup20], (instregex "VPMULLDrr")>;
893 def: InstRW<[SBWriteResGroup20], (instregex "VPMULLWrr")>;
933 def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMADDUBSWrr64")>;
934 def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULHRSWrr64")>;
935 def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULUDQirr")>;
936 def: InstRW<[SBWriteResGroup20], (instregex "PMADDUBSWrr")>;
937 def: InstRW<[SBWriteResGroup20], (instregex "PMADDWDrr")>;
938 def: InstRW<[SBWriteResGroup20], (instregex "PMULDQrr")>;
939 def: InstRW<[SBWriteResGroup20], (instregex "PMULHRSWrr")>;
940 def: InstRW<[SBWriteResGroup20], (instregex "PMULHUWrr")>;
941 def: InstRW<[SBWriteResGroup20], (instregex "PMULHWrr")>;
942 def: InstRW<[SBWriteResGroup20], (instregex "PMULLDrr")>;
943 def: InstRW<[SBWriteResGroup20], (instregex "PMULLWrr")>;
944 def: InstRW<[SBWriteResGroup20], (instregex "PMULUDQrr")>;
945 def: InstRW<[SBWriteResGroup20], (instregex "PSADBWrr")>;
946 def: InstRW<[SBWriteResGroup20], (instregex "VPMADDUBSWrr")>;
947 def: InstRW<[SBWriteResGroup20], (instregex "VPMADDWDrr")>;
948 def: InstRW<[SBWriteResGroup20], (instregex "VPMULDQrr")>;
949 def: InstRW<[SBWriteResGroup20], (instregex "VPMULHRSWrr")>;
950 def: InstRW<[SBWriteResGroup20], (instregex "VPMULHUWrr")>;
951 def: InstRW<[SBWriteResGroup20], (instregex "VPMULHWrr")>;
952 def: InstRW<[SBWriteResGroup20], (instregex "VPMULLDrr")>;
953 def: InstRW<[SBWriteResGroup20], (instregex "VPMULLWrr")>;
954 def: InstRW<[SBWriteResGroup20], (instregex "VPMULUDQrr")>;
894955 def: InstRW<[SBWriteResGroup20], (instregex "VPSADBWrr")>;
895956
896957 def SBWriteResGroup21 : SchedWriteRes<[SBPort1]> {
898959 let NumMicroOps = 1;
899960 let ResourceCycles = [1];
900961 }
901 def: InstRW<[SBWriteResGroup21], (instregex "ADDPDrr")>;
902 def: InstRW<[SBWriteResGroup21], (instregex "ADDPSrr")>;
903 def: InstRW<[SBWriteResGroup21], (instregex "ADDSDrr")>;
904 def: InstRW<[SBWriteResGroup21], (instregex "ADDSSrr")>;
905 def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPDrr")>;
906 def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPSrr")>;
907 def: InstRW<[SBWriteResGroup21], (instregex "ADD_FPrST0")>;
908 def: InstRW<[SBWriteResGroup21], (instregex "ADD_FST0r")>;
909 def: InstRW<[SBWriteResGroup21], (instregex "ADD_FrST0")>;
910 def: InstRW<[SBWriteResGroup21], (instregex "BSF32rr")>;
911 def: InstRW<[SBWriteResGroup21], (instregex "BSR32rr")>;
912 def: InstRW<[SBWriteResGroup21], (instregex "CMPPDrri")>;
913 def: InstRW<[SBWriteResGroup21], (instregex "CMPPSrri")>;
914 def: InstRW<[SBWriteResGroup21], (instregex "CMPSDrr")>;
915 def: InstRW<[SBWriteResGroup21], (instregex "CMPSSrr")>;
916 def: InstRW<[SBWriteResGroup21], (instregex "CRC32r32r32")>;
917 def: InstRW<[SBWriteResGroup21], (instregex "CRC32r32r8")>;
918 def: InstRW<[SBWriteResGroup21], (instregex "CVTDQ2PSrr")>;
919 def: InstRW<[SBWriteResGroup21], (instregex "CVTPS2DQrr")>;
920 def: InstRW<[SBWriteResGroup21], (instregex "CVTTPS2DQrr")>;
921 def: InstRW<[SBWriteResGroup21], (instregex "MAXPDrr")>;
922 def: InstRW<[SBWriteResGroup21], (instregex "MAXPSrr")>;
923 def: InstRW<[SBWriteResGroup21], (instregex "MAXSDrr")>;
924 def: InstRW<[SBWriteResGroup21], (instregex "MAXSSrr")>;
925 def: InstRW<[SBWriteResGroup21], (instregex "MINPDrr")>;
926 def: InstRW<[SBWriteResGroup21], (instregex "MINPSrr")>;
927 def: InstRW<[SBWriteResGroup21], (instregex "MINSDrr")>;
928 def: InstRW<[SBWriteResGroup21], (instregex "MINSSrr")>;
929 def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPI2PSirr")>;
930 def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPS2PIirr")>;
931 def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTTPS2PIirr")>;
932 def: InstRW<[SBWriteResGroup21], (instregex "MUL8r")>;
933 def: InstRW<[SBWriteResGroup21], (instregex "POPCNT32rr")>;
934 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPDr")>;
935 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPSr")>;
936 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSDr")>;
937 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSSr")>;
938 def: InstRW<[SBWriteResGroup21], (instregex "SUBPDrr")>;
939 def: InstRW<[SBWriteResGroup21], (instregex "SUBPSrr")>;
940 def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FPrST0")>;
941 def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FST0r")>;
942 def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FrST0")>;
943 def: InstRW<[SBWriteResGroup21], (instregex "SUBSDrr")>;
944 def: InstRW<[SBWriteResGroup21], (instregex "SUBSSrr")>;
945 def: InstRW<[SBWriteResGroup21], (instregex "SUB_FPrST0")>;
946 def: InstRW<[SBWriteResGroup21], (instregex "SUB_FST0r")>;
947 def: InstRW<[SBWriteResGroup21], (instregex "SUB_FrST0")>;
948 def: InstRW<[SBWriteResGroup21], (instregex "VADDPDYrr")>;
949 def: InstRW<[SBWriteResGroup21], (instregex "VADDPDrr")>;
950 def: InstRW<[SBWriteResGroup21], (instregex "VADDPSYrr")>;
951 def: InstRW<[SBWriteResGroup21], (instregex "VADDPSrr")>;
952 def: InstRW<[SBWriteResGroup21], (instregex "VADDSDrr")>;
953 def: InstRW<[SBWriteResGroup21], (instregex "VADDSSrr")>;
954 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDYrr")>;
955 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDrr")>;
956 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSYrr")>;
957 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSrr")>;
958 def: InstRW<[SBWriteResGroup21], (instregex "VBROADCASTF128")>;
959 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDYrri")>;
960 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDrri")>;
961 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSYrri")>;
962 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSrri")>;
963 def: InstRW<[SBWriteResGroup21], (instregex "VCMPSDrr")>;
964 def: InstRW<[SBWriteResGroup21], (instregex "VCMPSSrr")>;
965 def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSYrr")>;
966 def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSrr")>;
967 def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQYrr")>;
968 def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQrr")>;
969 def: InstRW<[SBWriteResGroup21], (instregex "VCVTTPS2DQrr")>;
970 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDYrr")>;
971 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDrr")>;
972 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSYrr")>;
973 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSrr")>;
974 def: InstRW<[SBWriteResGroup21], (instregex "VMAXSDrr")>;
975 def: InstRW<[SBWriteResGroup21], (instregex "VMAXSSrr")>;
976 def: InstRW<[SBWriteResGroup21], (instregex "VMINPDrr")>;
977 def: InstRW<[SBWriteResGroup21], (instregex "VMINPSrr")>;
978 def: InstRW<[SBWriteResGroup21], (instregex "VMINSDrr")>;
979 def: InstRW<[SBWriteResGroup21], (instregex "VMINSSrr")>;
980 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPDr")>;
981 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPSr")>;
982 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDSDr")>;
983 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDYrr")>;
984 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDrr")>;
985 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSYrr")>;
986 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSrr")>;
962 def: InstRW<[SBWriteResGroup21], (instregex "ADDPDrr")>;
963 def: InstRW<[SBWriteResGroup21], (instregex "ADDPSrr")>;
964 def: InstRW<[SBWriteResGroup21], (instregex "ADDSDrr")>;
965 def: InstRW<[SBWriteResGroup21], (instregex "ADDSSrr")>;
966 def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPDrr")>;
967 def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPSrr")>;
968 def: InstRW<[SBWriteResGroup21], (instregex "ADD_FPrST0")>;
969 def: InstRW<[SBWriteResGroup21], (instregex "ADD_FST0r")>;
970 def: InstRW<[SBWriteResGroup21], (instregex "ADD_FrST0")>;
971 def: InstRW<[SBWriteResGroup21], (instregex "BSF(16|32|64)rr")>;
972 def: InstRW<[SBWriteResGroup21], (instregex "BSR(16|32|64)rr")>;
973 def: InstRW<[SBWriteResGroup21], (instregex "CMPPDrri")>;
974 def: InstRW<[SBWriteResGroup21], (instregex "CMPPSrri")>;
975 def: InstRW<[SBWriteResGroup21], (instregex "CMPSSrr")>;
976 def: InstRW<[SBWriteResGroup21], (instregex "CRC32r(16|32|64)r8")>;
977 def: InstRW<[SBWriteResGroup21], (instregex "CRC32r(16|32|64)r64")>;
978 def: InstRW<[SBWriteResGroup21], (instregex "CVTDQ2PSrr")>;
979 def: InstRW<[SBWriteResGroup21], (instregex "CVTPS2DQrr")>;
980 def: InstRW<[SBWriteResGroup21], (instregex "CVTTPS2DQrr")>;
981 def: InstRW<[SBWriteResGroup21], (instregex "MAXPDrr")>;
982 def: InstRW<[SBWriteResGroup21], (instregex "MAXPSrr")>;
983 def: InstRW<[SBWriteResGroup21], (instregex "MAXSDrr")>;
984 def: InstRW<[SBWriteResGroup21], (instregex "MAXSSrr")>;
985 def: InstRW<[SBWriteResGroup21], (instregex "MINPDrr")>;
986 def: InstRW<[SBWriteResGroup21], (instregex "MINPSrr")>;
987 def: InstRW<[SBWriteResGroup21], (instregex "MINSDrr")>;
988 def: InstRW<[SBWriteResGroup21], (instregex "MINSSrr")>;
989 def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPI2PSirr")>;
990 def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPS2PIirr")>;
991 def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTTPS2PIirr")>;
992 def: InstRW<[SBWriteResGroup21], (instregex "MUL8r")>;
993 def: InstRW<[SBWriteResGroup21], (instregex "POPCNT(16|32|64)rr")>;
994 def: InstRW<[SBWriteResGroup21], (instregex "PUSHFS64")>;
995 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPDr")>;
996 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPSr")>;
997 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSDr")>;
998 def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSSr")>;
999 def: InstRW<[SBWriteResGroup21], (instregex "SUBPDrr")>;
1000 def: InstRW<[SBWriteResGroup21], (instregex "SUBPSrr")>;
1001 def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FPrST0")>;
1002 def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FST0r")>;
1003 def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FrST0")>;
1004 def: InstRW<[SBWriteResGroup21], (instregex "SUBSDrr")>;
1005 def: InstRW<[SBWriteResGroup21], (instregex "SUBSSrr")>;
1006 def: InstRW<[SBWriteResGroup21], (instregex "SUB_FPrST0")>;
1007 def: InstRW<[SBWriteResGroup21], (instregex "SUB_FST0r")>;
1008 def: InstRW<[SBWriteResGroup21], (instregex "SUB_FrST0")>;
1009 def: InstRW<[SBWriteResGroup21], (instregex "VADDPDYrr")>;
1010 def: InstRW<[SBWriteResGroup21], (instregex "VADDPDrr")>;
1011 def: InstRW<[SBWriteResGroup21], (instregex "VADDPSYrr")>;
1012 def: InstRW<[SBWriteResGroup21], (instregex "VADDPSrr")>;
1013 def: InstRW<[SBWriteResGroup21], (instregex "VADDSDrr")>;
1014 def: InstRW<[SBWriteResGroup21], (instregex "VADDSSrr")>;
1015 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDYrr")>;
1016 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDrr")>;
1017 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSYrr")>;
1018 def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSrr")>;
1019 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDYrri")>;
1020 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDrri")>;
1021 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSYrri")>;
1022 def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSrri")>;
1023 def: InstRW<[SBWriteResGroup21], (instregex "VCMPSDrr")>;
1024 def: InstRW<[SBWriteResGroup21], (instregex "VCMPSSrr")>;
1025 def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSYrr")>;
1026 def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSrr")>;
1027 def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQYrr")>;
1028 def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQrr")>;
1029 def: InstRW<[SBWriteResGroup21], (instregex "VCVTTPS2DQYrr")>;
1030 def: InstRW<[SBWriteResGroup21], (instregex "VCVTTPS2DQrr")>;
1031 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDYrr")>;
1032 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDrr")>;
1033 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSYrr")>;
1034 def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSrr")>;
1035 def: InstRW<[SBWriteResGroup21], (instregex "VMAXSDrr")>;
1036 def: InstRW<[SBWriteResGroup21], (instregex "VMAXSSrr")>;
1037 def: InstRW<[SBWriteResGroup21], (instregex "VMINPDYrr")>;
1038 def: InstRW<[SBWriteResGroup21], (instregex "VMINPDrr")>;
1039 def: InstRW<[SBWriteResGroup21], (instregex "VMINPSYrr")>;
1040 def: InstRW<[SBWriteResGroup21], (instregex "VMINPSrr")>;
1041 def: InstRW<[SBWriteResGroup21], (instregex "VMINSDrr")>;
1042 def: InstRW<[SBWriteResGroup21], (instregex "VMINSSrr")>;
1043 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPDr")>;
1044 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPSr")>;
1045 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDSDr")>;
1046 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDSSr")>;
1047 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDYPDr")>;
1048 def: InstRW<[SBWriteResGroup21], (instregex "VROUNDYPSr")>;
1049 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDYrr")>;
1050 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDrr")>;
1051 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSYrr")>;
1052 def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSrr")>;
1053 def: InstRW<[SBWriteResGroup21], (instregex "VSUBSDrr")>;
1054 def: InstRW<[SBWriteResGroup21], (instregex "VSUBSSrr")>;
9871055
9881056 def SBWriteResGroup22 : SchedWriteRes<[SBPort0,SBPort5]> {
9891057 let Latency = 3;
10061074 def: InstRW<[SBWriteResGroup23], (instregex "VPEXTRDrr")>;
10071075 def: InstRW<[SBWriteResGroup23], (instregex "VPEXTRQrr")>;
10081076 def: InstRW<[SBWriteResGroup23], (instregex "VPEXTRWri")>;
1009 def: InstRW<[SBWriteResGroup23], (instregex "SHL64rCL")>;
1010 def: InstRW<[SBWriteResGroup23], (instregex "SHL8rCL")>;
1077
1078 def SBWriteResGroup23_2 : SchedWriteRes<[SBPort05]> {
1079 let Latency = 3;
1080 let NumMicroOps = 3;
1081 let ResourceCycles = [3];
1082 }
1083 def: InstRW<[SBWriteResGroup23_2], (instregex "ROL(16|32|64)rCL")>;
1084 def: InstRW<[SBWriteResGroup23_2], (instregex "ROL8rCL")>;
1085 def: InstRW<[SBWriteResGroup23_2], (instregex "ROR(16|32|64)rCL")>;
1086 def: InstRW<[SBWriteResGroup23_2], (instregex "ROR8rCL")>;
1087 def: InstRW<[SBWriteResGroup23_2], (instregex "SAR(16|32|64)rCL")>;
1088 def: InstRW<[SBWriteResGroup23_2], (instregex "SAR8rCL")>;
1089 def: InstRW<[SBWriteResGroup23_2], (instregex "SHL(16|32|64)rCL")>;
1090 def: InstRW<[SBWriteResGroup23_2], (instregex "SHL8rCL")>;
1091 def: InstRW<[SBWriteResGroup23_2], (instregex "SHR(16|32|64)rCL")>;
1092 def: InstRW<[SBWriteResGroup23_2], (instregex "SHR8rCL")>;
10111093
10121094 def SBWriteResGroup24 : SchedWriteRes<[SBPort15]> {
10131095 let Latency = 3;
10381120 let NumMicroOps = 3;
10391121 let ResourceCycles = [3];
10401122 }
1041 def: InstRW<[SBWriteResGroup25], (instregex "LEAVE64")>;
1042 def: InstRW<[SBWriteResGroup25], (instregex "XADD32rr")>;
1123 def: InstRW<[SBWriteResGroup25], (instregex "ADC8i8")>;
1124 def: InstRW<[SBWriteResGroup25], (instregex "LEAVE64")>;
1125 def: InstRW<[SBWriteResGroup25], (instregex "OUT32rr")>;
1126 def: InstRW<[SBWriteResGroup25], (instregex "OUT8rr")>;
1127 def: InstRW<[SBWriteResGroup25], (instregex "SBB8i8")>;
1128 def: InstRW<[SBWriteResGroup25], (instregex "XADD(16|32|64)rr")>;
10431129 def: InstRW<[SBWriteResGroup25], (instregex "XADD8rr")>;
10441130
1045 def SBWriteResGroup26 : SchedWriteRes<[SBPort0,SBPort015]> {
1131 def SBWriteResGroup25_2 : SchedWriteRes<[SBPort5,SBPort05]> {
1132 let Latency = 3;
1133 let NumMicroOps = 3;
1134 let ResourceCycles = [2,1];
1135 }
1136 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVBE_F")>;
1137 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVB_F")>;
1138 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVE_F")>;
1139 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNBE_F")>;
1140 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNB_F")>;
1141 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNE_F")>;
1142 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNP_F")>;
1143 def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVP_F")>;
1144
1145 def SBWriteResGroup26 : SchedWriteRes<[SBPort05,SBPort015]> {
10461146 let Latency = 3;
10471147 let NumMicroOps = 3;
10481148 let ResourceCycles = [2,1];
10491149 }
1050 def: InstRW<[SBWriteResGroup26], (instregex "CMOVA32rr")>;
1051 def: InstRW<[SBWriteResGroup26], (instregex "CMOVBE32rr")>;
1150 def: InstRW<[SBWriteResGroup26], (instregex "CMOVA(16|32|64)rr")>;
1151 def: InstRW<[SBWriteResGroup26], (instregex "CMOVBE(16|32|64)rr")>;
1152
1153 def SBWriteResGroup26_2 : SchedWriteRes<[SBPort0,SBPort1,SBPort5]> {
1154 let Latency = 3;
1155 let NumMicroOps = 3;
1156 let ResourceCycles = [1,1,1];
1157 }
1158 def: InstRW<[SBWriteResGroup26_2], (instregex "COM_FIPr")>;
1159 def: InstRW<[SBWriteResGroup26_2], (instregex "COM_FIr")>;
1160 def: InstRW<[SBWriteResGroup26_2], (instregex "UCOM_FIPr")>;
1161 def: InstRW<[SBWriteResGroup26_2], (instregex "UCOM_FIr")>;
10521162
10531163 def SBWriteResGroup27 : SchedWriteRes<[SBPort0,SBPort1]> {
10541164 let Latency = 4;
10551165 let NumMicroOps = 2;
10561166 let ResourceCycles = [1,1];
10571167 }
1058 def: InstRW<[SBWriteResGroup27], (instregex "MUL64r")>;
1168 def: InstRW<[SBWriteResGroup27], (instregex "MUL(16|32|64)r")>;
10591169
10601170 def SBWriteResGroup28 : SchedWriteRes<[SBPort1,SBPort5]> {
10611171 let Latency = 4;
10781188 def: InstRW<[SBWriteResGroup28], (instregex "VCVTPD2DQrr")>;
10791189 def: InstRW<[SBWriteResGroup28], (instregex "VCVTPD2PSYrr")>;
10801190 def: InstRW<[SBWriteResGroup28], (instregex "VCVTPD2PSrr")>;
1191 def: InstRW<[SBWriteResGroup28], (instregex "VCVTSD2SSrr")>;
10811192 def: InstRW<[SBWriteResGroup28], (instregex "VCVTSI2SD64rr")>;
10821193 def: InstRW<[SBWriteResGroup28], (instregex "VCVTSI2SDrr")>;
10831194 def: InstRW<[SBWriteResGroup28], (instregex "VCVTTPD2DQYrr")>;
10881199 let NumMicroOps = 2;
10891200 let ResourceCycles = [1,1];
10901201 }
1091 def: InstRW<[SBWriteResGroup29], (instregex "MOV64sr")>;
1092 def: InstRW<[SBWriteResGroup29], (instregex "PAUSE")>;
1202 def: InstRW<[SBWriteResGroup29], (instregex "MOV64sr")>;
1203
1204 def SBWriteResGroup29_2 : SchedWriteRes<[SBPort5,SBPort015]> {
1205 let Latency = 4;
1206 let NumMicroOps = 4;
1207 let ResourceCycles = [1,3];
1208 }
1209 def: InstRW<[SBWriteResGroup29_2], (instregex "OUT32ir")>;
1210 def: InstRW<[SBWriteResGroup29_2], (instregex "OUT8ir")>;
1211 def: InstRW<[SBWriteResGroup29_2], (instregex "PAUSE")>;
1212
1213 def SBWriteResGroup29_3 : SchedWriteRes<[SBPort05,SBPort015]> {
1214 let Latency = 4;
1215 let NumMicroOps = 4;
1216 let ResourceCycles = [3,1];
1217 }
1218 def: InstRW<[SBWriteResGroup29_3], (instregex "SHLD(16|32|64)rrCL")>;
1219 def: InstRW<[SBWriteResGroup29_3], (instregex "SHRD(16|32|64)rrCL")>;
10931220
10941221 def SBWriteResGroup30 : SchedWriteRes<[SBPort0]> {
10951222 let Latency = 5;
11171244 def: InstRW<[SBWriteResGroup30], (instregex "VMULSSrr")>;
11181245 def: InstRW<[SBWriteResGroup30], (instregex "VPCMPGTQrr")>;
11191246 def: InstRW<[SBWriteResGroup30], (instregex "VPHMINPOSUWrr128")>;
1247 def: InstRW<[SBWriteResGroup30], (instregex "VRCPPSr")>;
1248 def: InstRW<[SBWriteResGroup30], (instregex "VRCPSSr")>;
11201249 def: InstRW<[SBWriteResGroup30], (instregex "VRSQRTPSr")>;
11211250 def: InstRW<[SBWriteResGroup30], (instregex "VRSQRTSSr")>;
11221251
11251254 let NumMicroOps = 1;
11261255 let ResourceCycles = [1];
11271256 }
1128 def: InstRW<[SBWriteResGroup31], (instregex "MOV32rm")>;
1129 def: InstRW<[SBWriteResGroup31], (instregex "MOV8rm")>;
1130 def: InstRW<[SBWriteResGroup31], (instregex "MOVSX32rm16")>;
1131 def: InstRW<[SBWriteResGroup31], (instregex "MOVSX32rm8")>;
1132 def: InstRW<[SBWriteResGroup31], (instregex "MOVZX32rm16")>;
1133 def: InstRW<[SBWriteResGroup31], (instregex "MOVZX32rm8")>;
1134 def: InstRW<[SBWriteResGroup31], (instregex "PREFETCH")>;
1257 def: InstRW<[SBWriteResGroup31], (instregex "MOV(16|32|64)rm")>;
1258 def: InstRW<[SBWriteResGroup31], (instregex "MOV8rm")>;
1259 def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm16")>;
1260 def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm32")>;
1261 def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm8")>;
1262 def: InstRW<[SBWriteResGroup31], (instregex "MOVZX(16|32|64)rm16")>;
1263 def: InstRW<[SBWriteResGroup31], (instregex "MOVZX(16|32|64)rm8")>;
1264 def: InstRW<[SBWriteResGroup31], (instregex "PREFETCH")>;
11351265
11361266 def SBWriteResGroup32 : SchedWriteRes<[SBPort0,SBPort1]> {
11371267 let Latency = 5;
11381268 let NumMicroOps = 2;
11391269 let ResourceCycles = [1,1];
11401270 }
1141 def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SI64rr")>;
1142 def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SIrr")>;
1143 def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SI64rr")>;
1144 def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SIrr")>;
1145 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SI64rr")>;
1146 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SIrr")>;
1147 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SI64rr")>;
1148 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SIrr")>;
1149 def: InstRW<[SBWriteResGroup32], (instregex "VCVTSD2SI64rr")>;
1150 def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SI64rr")>;
1151 def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SIrr")>;
1152 def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SI64rr")>;
1153 def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SIrr")>;
1154 def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSS2SI64rr")>;
1271 def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SI64rr")>;
1272 def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SIrr")>;
1273 def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SI64rr")>;
1274 def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SIrr")>;
1275 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SI64rr")>;
1276 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SIrr")>;
1277 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SI64rr")>;
1278 def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SIrr")>;
1279 def: InstRW<[SBWriteResGroup32], (instregex "VCVTSD2SI64rr")>;
1280 def: InstRW<[SBWriteResGroup32], (instregex "VCVTSD2SIrr")>;
1281 def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SI64rr")>;
1282 def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SIrr")>;
1283 def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SI64rr")>;
1284 def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SIrr")>;
1285 def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSS2SI64rr")>;
11551286 def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSS2SIrr")>;
11561287
11571288 def SBWriteResGroup33 : SchedWriteRes<[SBPort4,SBPort23]> {
11591290 let NumMicroOps = 2;
11601291 let ResourceCycles = [1,1];
11611292 }
1162 def: InstRW<[SBWriteResGroup33], (instregex "MOV64mr")>;
1293 def: InstRW<[SBWriteResGroup33], (instregex "MOV(16|32|64)mr")>;
11631294 def: InstRW<[SBWriteResGroup33], (instregex "MOV8mr")>;
11641295 def: InstRW<[SBWriteResGroup33], (instregex "MOVAPDmr")>;
11651296 def: InstRW<[SBWriteResGroup33], (instregex "MOVAPSmr")>;
11701301 def: InstRW<[SBWriteResGroup33], (instregex "MOVLPDmr")>;
11711302 def: InstRW<[SBWriteResGroup33], (instregex "MOVLPSmr")>;
11721303 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTDQmr")>;
1173 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTI_64mr")>;
1174 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTImr")>;
1175 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPDmr")>;
1176 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPSmr")>;
1177 def: InstRW<[SBWriteResGroup33], (instregex "MOVPDI2DImr")>;
1178 def: InstRW<[SBWriteResGroup33], (instregex "MOVPQI2QImr")>;
1179 def: InstRW<[SBWriteResGroup33], (instregex "MOVPQIto64mr")>;
1180 def: InstRW<[SBWriteResGroup33], (instregex "MOVSSmr")>;
1181 def: InstRW<[SBWriteResGroup33], (instregex "MOVUPDmr")>;
1182 def: InstRW<[SBWriteResGroup33], (instregex "MOVUPSmr")>;
1183 def: InstRW<[SBWriteResGroup33], (instregex "PUSH64i8")>;
1184 def: InstRW<[SBWriteResGroup33], (instregex "PUSH64r")>;
1304 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTI_64mr")>;
1305 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTImr")>;
1306 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPDmr")>;
1307 def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPSmr")>;
1308 def: InstRW<[SBWriteResGroup33], (instregex "MOVPDI2DImr")>;
1309 def: InstRW<[SBWriteResGroup33], (instregex "MOVPQI2QImr")>;
1310 def: InstRW<[SBWriteResGroup33], (instregex "MOVPQIto64mr")>;
1311 def: InstRW<[SBWriteResGroup33], (instregex "MOVSSmr")>;
1312 def: InstRW<[SBWriteResGroup33], (instregex "MOVUPDmr")>;
1313 def: InstRW<[SBWriteResGroup33], (instregex "MOVUPSmr")>;
1314 def: InstRW<[SBWriteResGroup33], (instregex "PUSH64i8")>;
1315 def: InstRW<[SBWriteResGroup33], (instregex "PUSH(16|32|64)r")>;
11851316 def: InstRW<[SBWriteResGroup33], (instregex "VEXTRACTF128mr")>;
11861317 def: InstRW<[SBWriteResGroup33], (instregex "VMOVAPDYmr")>;
11871318 def: InstRW<[SBWriteResGroup33], (instregex "VMOVAPDmr")>;
12241355 let NumMicroOps = 3;
12251356 let ResourceCycles = [1,2];
12261357 }
1227 def: InstRW<[SBWriteResGroup35], (instregex "CLI")>;
1228 def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SS64rr")>;
1229 def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SSrr")>;
1230 def: InstRW<[SBWriteResGroup35], (instregex "HADDPDrr")>;
1231 def: InstRW<[SBWriteResGroup35], (instregex "HADDPSrr")>;
1232 def: InstRW<[SBWriteResGroup35], (instregex "HSUBPDrr")>;
1233 def: InstRW<[SBWriteResGroup35], (instregex "HSUBPSrr")>;
1234 def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SS64rr")>;
1235 def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SSrr")>;
1236 def: InstRW<[SBWriteResGroup35], (instregex "VHADDPDrr")>;
1237 def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSYrr")>;
1238 def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSrr")>;
1239 def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDYrr")>;
1240 def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDrr")>;
1241 def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPSYrr")>;
1358 def: InstRW<[SBWriteResGroup35], (instregex "CLI")>;
1359 def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SS64rr")>;
1360 def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SSrr")>;
1361 def: InstRW<[SBWriteResGroup35], (instregex "HADDPDrr")>;
1362 def: InstRW<[SBWriteResGroup35], (instregex "HADDPSrr")>;
1363 def: InstRW<[SBWriteResGroup35], (instregex "HSUBPDrr")>;
1364 def: InstRW<[SBWriteResGroup35], (instregex "HSUBPSrr")>;
1365 def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SS64rr")>;
1366 def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SSrr")>;
1367 def: InstRW<[SBWriteResGroup35], (instregex "VHADDPDYrr")>;
1368 def: InstRW<[SBWriteResGroup35], (instregex "VHADDPDrr")>;
1369 def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSYrr")>;
1370 def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSrr")>;
1371 def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDYrr")>;
1372 def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDrr")>;
1373 def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPSYrr")>;
12421374 def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPSrr")>;
1375
1376 def SBWriteResGroup35_2 : SchedWriteRes<[SBPort1,SBPort4,SBPort23]> {
1377 let Latency = 5;
1378 let NumMicroOps = 3;
1379 let ResourceCycles = [1,1,1];
1380 }
1381 def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP16m")>;
1382 def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP32m")>;
1383 def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP64m")>;
1384 def: InstRW<[SBWriteResGroup35_2], (instregex "PUSHGS64")>;
12431385
12441386 def SBWriteResGroup36 : SchedWriteRes<[SBPort4,SBPort5,SBPort23]> {
12451387 let Latency = 5;
12461388 let NumMicroOps = 3;
12471389 let ResourceCycles = [1,1,1];
12481390 }
1249 def: InstRW<[SBWriteResGroup36], (instregex "CALL64r")>;
1391 def: InstRW<[SBWriteResGroup36], (instregex "CALL64pcrel32")>;
1392 def: InstRW<[SBWriteResGroup36], (instregex "CALL(16|32|64)r")>;
12501393 def: InstRW<[SBWriteResGroup36], (instregex "EXTRACTPSmr")>;
12511394 def: InstRW<[SBWriteResGroup36], (instregex "VEXTRACTPSmr")>;
12521395
12551398 let NumMicroOps = 3;
12561399 let ResourceCycles = [1,1,1];
12571400 }
1258 def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDYrm")>;
1259 def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDmr")>;
1260 def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPSmr")>;
1261
1262 def SBWriteResGroup38 : SchedWriteRes<[SBPort4,SBPort23,SBPort0]> {
1401 def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDYmr")>;
1402 def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDmr")>;
1403 def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPSYmr")>;
1404 def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPSmr")>;
1405
1406 def SBWriteResGroup38 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
12631407 let Latency = 5;
12641408 let NumMicroOps = 3;
12651409 let ResourceCycles = [1,1,1];
13071451 }
13081452 def: InstRW<[SBWriteResGroup41], (instregex "FNINIT")>;
13091453
1310 def SBWriteResGroup42 : SchedWriteRes<[SBPort0,SBPort015]> {
1454 def SBWriteResGroup42 : SchedWriteRes<[SBPort05,SBPort015]> {
13111455 let Latency = 5;
13121456 let NumMicroOps = 4;
13131457 let ResourceCycles = [1,3];
13141458 }
1315 def: InstRW<[SBWriteResGroup42], (instregex "CMPXCHG32rr")>;
1459 def: InstRW<[SBWriteResGroup42], (instregex "CMPXCHG(16|32|64)rr")>;
13161460 def: InstRW<[SBWriteResGroup42], (instregex "CMPXCHG8rr")>;
13171461
1318 def SBWriteResGroup43 : SchedWriteRes<[SBPort4,SBPort23,SBPort0]> {
1462 def SBWriteResGroup43 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
13191463 let Latency = 5;
13201464 let NumMicroOps = 4;
13211465 let ResourceCycles = [1,1,2];
13781522 def: InstRW<[SBWriteResGroup48], (instregex "MOVSSrm")>;
13791523 def: InstRW<[SBWriteResGroup48], (instregex "MOVUPDrm")>;
13801524 def: InstRW<[SBWriteResGroup48], (instregex "MOVUPSrm")>;
1381 def: InstRW<[SBWriteResGroup48], (instregex "POP64r")>;
1525 def: InstRW<[SBWriteResGroup48], (instregex "POP(16|32|64)r")>;
13821526 def: InstRW<[SBWriteResGroup48], (instregex "VBROADCASTSSrm")>;
13831527 def: InstRW<[SBWriteResGroup48], (instregex "VLDDQUYrm")>;
13841528 def: InstRW<[SBWriteResGroup48], (instregex "VLDDQUrm")>;
14031547 let NumMicroOps = 2;
14041548 let ResourceCycles = [1,1];
14051549 }
1406 def: InstRW<[SBWriteResGroup49], (instregex "JMP64m")>;
1550 def: InstRW<[SBWriteResGroup49], (instregex "JMP(16|32|64)m")>;
14071551 def: InstRW<[SBWriteResGroup49], (instregex "MOV64sm")>;
14081552
1409 def SBWriteResGroup50 : SchedWriteRes<[SBPort23,SBPort0]> {
1553 def SBWriteResGroup50 : SchedWriteRes<[SBPort23,SBPort05]> {
14101554 let Latency = 6;
14111555 let NumMicroOps = 2;
14121556 let ResourceCycles = [1,1];
14131557 }
1414 def: InstRW<[SBWriteResGroup50], (instregex "BT64mi8")>;
1558 def: InstRW<[SBWriteResGroup50], (instregex "BT(16|32|64)mi8")>;
14151559
14161560 def SBWriteResGroup51 : SchedWriteRes<[SBPort23,SBPort15]> {
14171561 let Latency = 6;
14321576 let NumMicroOps = 2;
14331577 let ResourceCycles = [1,1];
14341578 }
1435 def: InstRW<[SBWriteResGroup52], (instregex "ADD64rm")>;
1436 def: InstRW<[SBWriteResGroup52], (instregex "ADD8rm")>;
1437 def: InstRW<[SBWriteResGroup52], (instregex "AND64rm")>;
1438 def: InstRW<[SBWriteResGroup52], (instregex "AND8rm")>;
1439 def: InstRW<[SBWriteResGroup52], (instregex "CMP64mi8")>;
1440 def: InstRW<[SBWriteResGroup52], (instregex "CMP64mr")>;
1441 def: InstRW<[SBWriteResGroup52], (instregex "CMP64rm")>;
1442 def: InstRW<[SBWriteResGroup52], (instregex "CMP8mi")>;
1443 def: InstRW<[SBWriteResGroup52], (instregex "CMP8mr")>;
1444 def: InstRW<[SBWriteResGroup52], (instregex "CMP8rm")>;
1445 def: InstRW<[SBWriteResGroup52], (instregex "LODSL")>;
1446 def: InstRW<[SBWriteResGroup52], (instregex "LODSQ")>;
1447 def: InstRW<[SBWriteResGroup52], (instregex "OR64rm")>;
1448 def: InstRW<[SBWriteResGroup52], (instregex "OR8rm")>;
1449 def: InstRW<[SBWriteResGroup52], (instregex "SUB64rm")>;
1450 def: InstRW<[SBWriteResGroup52], (instregex "SUB8rm")>;
1451 def: InstRW<[SBWriteResGroup52], (instregex "XOR64rm")>;
1579 def: InstRW<[SBWriteResGroup52], (instregex "ADD(16|32|64)rm")>;
1580 def: InstRW<[SBWriteResGroup52], (instregex "ADD8rm")>;
1581 def: InstRW<[SBWriteResGroup52], (instregex "AND(16|32|64)rm")>;
1582 def: InstRW<[SBWriteResGroup52], (instregex "AND8rm")>;
1583 def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)mi8")>;
1584 def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)mr")>;
1585 def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)rm")>;
1586 def: InstRW<[SBWriteResGroup52], (instregex "CMP8mi")>;
1587 def: InstRW<[SBWriteResGroup52], (instregex "CMP8mr")>;
1588 def: InstRW<[SBWriteResGroup52], (instregex "CMP8rm")>;
1589 def: InstRW<[SBWriteResGroup52], (instregex "LODSL")>;
1590 def: InstRW<[SBWriteResGroup52], (instregex "LODSQ")>;
1591 def: InstRW<[SBWriteResGroup52], (instregex "OR(16|32|64)rm")>;
1592 def: InstRW<[SBWriteResGroup52], (instregex "OR8rm")>;
1593 def: InstRW<[SBWriteResGroup52], (instregex "SUB(16|32|64)rm")>;
1594 def: InstRW<[SBWriteResGroup52], (instregex "SUB8rm")>;
1595 def: InstRW<[SBWriteResGroup52], (instregex "XOR(16|32|64)rm")>;
14521596 def: InstRW<[SBWriteResGroup52], (instregex "XOR8rm")>;
14531597
14541598 def SBWriteResGroup53 : SchedWriteRes<[SBPort4,SBPort23]> {
14561600 let NumMicroOps = 3;
14571601 let ResourceCycles = [1,2];
14581602 }
1459 def: InstRW<[SBWriteResGroup53], (instregex "POP64rmm")>;
1460 def: InstRW<[SBWriteResGroup53], (instregex "PUSH64rmm")>;
14611603 def: InstRW<[SBWriteResGroup53], (instregex "ST_F32m")>;
14621604 def: InstRW<[SBWriteResGroup53], (instregex "ST_F64m")>;
14631605 def: InstRW<[SBWriteResGroup53], (instregex "ST_FP32m")>;
14701612 let ResourceCycles = [1];
14711613 }
14721614 def: InstRW<[SBWriteResGroup54], (instregex "VBROADCASTSDYrm")>;
1473 def: InstRW<[SBWriteResGroup54], (instregex "VBROADCASTSSrm")>;
1615 def: InstRW<[SBWriteResGroup54], (instregex "VBROADCASTSSYrm")>;
14741616 def: InstRW<[SBWriteResGroup54], (instregex "VMOVAPDYrm")>;
14751617 def: InstRW<[SBWriteResGroup54], (instregex "VMOVAPSYrm")>;
14761618 def: InstRW<[SBWriteResGroup54], (instregex "VMOVDDUPYrm")>;
15281670 def: InstRW<[SBWriteResGroup56], (instregex "VMOVLPSrm")>;
15291671 def: InstRW<[SBWriteResGroup56], (instregex "VORPDrm")>;
15301672 def: InstRW<[SBWriteResGroup56], (instregex "VORPSrm")>;
1531 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDmi")>;
1532 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDri")>;
1533 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPSmi")>;
1534 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPSri")>;
1673 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDmi")>;
1674 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDrm")>;
1675 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPSmi")>;
1676 def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPSrm")>;
15351677 def: InstRW<[SBWriteResGroup56], (instregex "VSHUFPDrmi")>;
15361678 def: InstRW<[SBWriteResGroup56], (instregex "VSHUFPSrmi")>;
15371679 def: InstRW<[SBWriteResGroup56], (instregex "VUNPCKHPDrm")>;
15481690 let NumMicroOps = 2;
15491691 let ResourceCycles = [1,1];
15501692 }
1551 def: InstRW<[SBWriteResGroup57], (instregex "AESDECLASTrr")>;
1552 def: InstRW<[SBWriteResGroup57], (instregex "AESDECrr")>;
1553 def: InstRW<[SBWriteResGroup57], (instregex "AESENCLASTrr")>;
1554 def: InstRW<[SBWriteResGroup57], (instregex "AESENCrr")>;
1555 def: InstRW<[SBWriteResGroup57], (instregex "KANDQrr")>;
1556 def: InstRW<[SBWriteResGroup57], (instregex "VAESDECLASTrr")>;
1557 def: InstRW<[SBWriteResGroup57], (instregex "VAESDECrr")>;
1693 def: InstRW<[SBWriteResGroup57], (instregex "AESDECLASTrr")>;
1694 def: InstRW<[SBWriteResGroup57], (instregex "AESDECrr")>;
1695 def: InstRW<[SBWriteResGroup57], (instregex "AESENCLASTrr")>;
1696 def: InstRW<[SBWriteResGroup57], (instregex "AESENCrr")>;
1697 def: InstRW<[SBWriteResGroup57], (instregex "VAESDECLASTrr")>;
1698 def: InstRW<[SBWriteResGroup57], (instregex "VAESDECrr")>;
1699 def: InstRW<[SBWriteResGroup57], (instregex "VAESENCLASTrr")>;
15581700 def: InstRW<[SBWriteResGroup57], (instregex "VAESENCrr")>;
15591701
1560 def SBWriteResGroup58 : SchedWriteRes<[SBPort23,SBPort0]> {
1702 def SBWriteResGroup58 : SchedWriteRes<[SBPort23,SBPort05]> {
15611703 let Latency = 7;
15621704 let NumMicroOps = 2;
15631705 let ResourceCycles = [1,1];
17431885 def: InstRW<[SBWriteResGroup60], (instregex "VPORrm")>;
17441886 def: InstRW<[SBWriteResGroup60], (instregex "VPXORrm")>;
17451887
1746 def SBWriteResGroup61 : SchedWriteRes<[SBPort0,SBPort0]> {
1888 def SBWriteResGroup61 : SchedWriteRes<[SBPort0,SBPort05]> {
17471889 let Latency = 7;
17481890 let NumMicroOps = 3;
17491891 let ResourceCycles = [2,1];
17501892 }
1751 def: InstRW<[SBWriteResGroup61], (instregex "VRCPPSr")>;
1893 def: InstRW<[SBWriteResGroup61], (instregex "VRCPPSYr")>;
17521894 def: InstRW<[SBWriteResGroup61], (instregex "VRSQRTPSYr")>;
17531895
17541896 def SBWriteResGroup62 : SchedWriteRes<[SBPort5,SBPort23]> {
17741916 }
17751917 def: InstRW<[SBWriteResGroup64], (instregex "FARJMP64")>;
17761918
1777 def SBWriteResGroup65 : SchedWriteRes<[SBPort23,SBPort0,SBPort015]> {
1919 def SBWriteResGroup65 : SchedWriteRes<[SBPort23,SBPort05,SBPort015]> {
17781920 let Latency = 7;
17791921 let NumMicroOps = 3;
17801922 let ResourceCycles = [1,1,1];
17811923 }
1782 def: InstRW<[SBWriteResGroup65], (instregex "ADC64rm")>;
1783 def: InstRW<[SBWriteResGroup65], (instregex "ADC8rm")>;
1784 def: InstRW<[SBWriteResGroup65], (instregex "CMOVAE64rm")>;
1785 def: InstRW<[SBWriteResGroup65], (instregex "CMOVB64rm")>;
1786 def: InstRW<[SBWriteResGroup65], (instregex "CMOVE64rm")>;
1787 def: InstRW<[SBWriteResGroup65], (instregex "CMOVG64rm")>;
1788 def: InstRW<[SBWriteResGroup65], (instregex "CMOVGE64rm")>;
1789 def: InstRW<[SBWriteResGroup65], (instregex "CMOVL64rm")>;
1790 def: InstRW<[SBWriteResGroup65], (instregex "CMOVLE64rm")>;
1791 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNE64rm")>;
1792 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNO64rm")>;
1793 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNP64rm")>;
1794 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNS64rm")>;
1795 def: InstRW<[SBWriteResGroup65], (instregex "CMOVO64rm")>;
1796 def: InstRW<[SBWriteResGroup65], (instregex "CMOVP64rm")>;
1797 def: InstRW<[SBWriteResGroup65], (instregex "CMOVS64rm")>;
1798 def: InstRW<[SBWriteResGroup65], (instregex "SBB64rm")>;
1924 def: InstRW<[SBWriteResGroup65], (instregex "ADC(16|32|64)rm")>;
1925 def: InstRW<[SBWriteResGroup65], (instregex "ADC8rm")>;
1926 def: InstRW<[SBWriteResGroup65], (instregex "CMOVAE(16|32|64)rm")>;
1927 def: InstRW<[SBWriteResGroup65], (instregex "CMOVB(16|32|64)rm")>;
1928 def: InstRW<[SBWriteResGroup65], (instregex "CMOVE(16|32|64)rm")>;
1929 def: InstRW<[SBWriteResGroup65], (instregex "CMOVG(16|32|64)rm")>;
1930 def: InstRW<[SBWriteResGroup65], (instregex "CMOVGE(16|32|64)rm")>;
1931 def: InstRW<[SBWriteResGroup65], (instregex "CMOVL(16|32|64)rm")>;
1932 def: InstRW<[SBWriteResGroup65], (instregex "CMOVLE(16|32|64)rm")>;
1933 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNE(16|32|64)rm")>;
1934 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNO(16|32|64)rm")>;
1935 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNP(16|32|64)rm")>;
1936 def: InstRW<[SBWriteResGroup65], (instregex "CMOVNS(16|32|64)rm")>;
1937 def: InstRW<[SBWriteResGroup65], (instregex "CMOVO(16|32|64)rm")>;
1938 def: InstRW<[SBWriteResGroup65], (instregex "CMOVP(16|32|64)rm")>;
1939 def: InstRW<[SBWriteResGroup65], (instregex "CMOVS(16|32|64)rm")>;
1940 def: InstRW<[SBWriteResGroup65], (instregex "SBB(16|32|64)rm")>;
17991941 def: InstRW<[SBWriteResGroup65], (instregex "SBB8rm")>;
18001942
18011943 def SBWriteResGroup66 : SchedWriteRes<[SBPort0,SBPort4,SBPort23]> {
18101952 let NumMicroOps = 4;
18111953 let ResourceCycles = [1,2,1];
18121954 }
1813 def: InstRW<[SBWriteResGroup67], (instregex "SLDT32r")>;
1814 def: InstRW<[SBWriteResGroup67], (instregex "STR32r")>;
1955 def: InstRW<[SBWriteResGroup67], (instregex "SLDT(16|32|64)r")>;
1956 def: InstRW<[SBWriteResGroup67], (instregex "STR(16|32|64)r")>;
18151957
18161958 def SBWriteResGroup68 : SchedWriteRes<[SBPort4,SBPort5,SBPort23]> {
18171959 let Latency = 7;
18181960 let NumMicroOps = 4;
18191961 let ResourceCycles = [1,1,2];
18201962 }
1821 def: InstRW<[SBWriteResGroup68], (instregex "CALL64m")>;
1963 def: InstRW<[SBWriteResGroup68], (instregex "CALL(16|32|64)m")>;
18221964 def: InstRW<[SBWriteResGroup68], (instregex "FNSTCW16m")>;
18231965
1824 def SBWriteResGroup69 : SchedWriteRes<[SBPort4,SBPort23,SBPort0]> {
1966 def SBWriteResGroup69 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
18251967 let Latency = 7;
18261968 let NumMicroOps = 4;
18271969 let ResourceCycles = [1,2,1];
18281970 }
1829 def: InstRW<[SBWriteResGroup69], (instregex "BTC64mi8")>;
1830 def: InstRW<[SBWriteResGroup69], (instregex "BTR64mi8")>;
1831 def: InstRW<[SBWriteResGroup69], (instregex "BTS64mi8")>;
1832 def: InstRW<[SBWriteResGroup69], (instregex "SAR64mi")>;
1833 def: InstRW<[SBWriteResGroup69], (instregex "SAR8mi")>;
1834 def: InstRW<[SBWriteResGroup69], (instregex "SHL64m1")>;
1835 def: InstRW<[SBWriteResGroup69], (instregex "SHL64mi")>;
1836 def: InstRW<[SBWriteResGroup69], (instregex "SHL8m1")>;
1837 def: InstRW<[SBWriteResGroup69], (instregex "SHL8mi")>;
1838 def: InstRW<[SBWriteResGroup69], (instregex "SHR64mi")>;
1839 def: InstRW<[SBWriteResGroup69], (instregex "SHR8mi")>;
1971 def: InstRW<[SBWriteResGroup69], (instregex "BTC(16|32|64)mi8")>;
1972 def: InstRW<[SBWriteResGroup69], (instregex "BTR(16|32|64)mi8")>;
1973 def: InstRW<[SBWriteResGroup69], (instregex "BTS(16|32|64)mi8")>;
1974 def: InstRW<[SBWriteResGroup69], (instregex "SAR(16|32|64)mi")>;
1975 def: InstRW<[SBWriteResGroup69], (instregex "SAR8mi")>;
1976 def: InstRW<[SBWriteResGroup69], (instregex "SHL(16|32|64)m1")>;
1977 def: InstRW<[SBWriteResGroup69], (instregex "SHL(16|32|64)mi")>;
1978 def: InstRW<[SBWriteResGroup69], (instregex "SHL8m1")>;
1979 def: InstRW<[SBWriteResGroup69], (instregex "SHL8mi")>;
1980 def: InstRW<[SBWriteResGroup69], (instregex "SHR(16|32|64)mi")>;
1981 def: InstRW<[SBWriteResGroup69], (instregex "SHR8mi")>;
18401982
18411983 def SBWriteResGroup70 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> {
18421984 let Latency = 7;
18431985 let NumMicroOps = 4;
18441986 let ResourceCycles = [1,2,1];
18451987 }
1846 def: InstRW<[SBWriteResGroup70], (instregex "ADD64mi8")>;
1847 def: InstRW<[SBWriteResGroup70], (instregex "ADD64mr")>;
1848 def: InstRW<[SBWriteResGroup70], (instregex "ADD8mi")>;
1849 def: InstRW<[SBWriteResGroup70], (instregex "ADD8mr")>;
1850 def: InstRW<[SBWriteResGroup70], (instregex "AND64mi8")>;
1851 def: InstRW<[SBWriteResGroup70], (instregex "AND64mr")>;
1852 def: InstRW<[SBWriteResGroup70], (instregex "AND8mi")>;
1853 def: InstRW<[SBWriteResGroup70], (instregex "AND8mr")>;
1854 def: InstRW<[SBWriteResGroup70], (instregex "DEC64m")>;
1855 def: InstRW<[SBWriteResGroup70], (instregex "DEC8m")>;
1856 def: InstRW<[SBWriteResGroup70], (instregex "INC64m")>;
1857 def: InstRW<[SBWriteResGroup70], (instregex "INC8m")>;
1858 def: InstRW<[SBWriteResGroup70], (instregex "NEG64m")>;
1859 def: InstRW<[SBWriteResGroup70], (instregex "NEG8m")>;
1860 def: InstRW<[SBWriteResGroup70], (instregex "NOT64m")>;
1861 def: InstRW<[SBWriteResGroup70], (instregex "NOT8m")>;
1862 def: InstRW<[SBWriteResGroup70], (instregex "OR64mi8")>;
1863 def: InstRW<[SBWriteResGroup70], (instregex "OR64mr")>;
1864 def: InstRW<[SBWriteResGroup70], (instregex "OR8mi")>;
1865 def: InstRW<[SBWriteResGroup70], (instregex "OR8mr")>;
1866 def: InstRW<[SBWriteResGroup70], (instregex "SUB64mi8")>;
1867 def: InstRW<[SBWriteResGroup70], (instregex "SUB64mr")>;
1868 def: InstRW<[SBWriteResGroup70], (instregex "SUB8mi")>;
1869 def: InstRW<[SBWriteResGroup70], (instregex "SUB8mr")>;
1870 def: InstRW<[SBWriteResGroup70], (instregex "TEST64rm")>;
1871 def: InstRW<[SBWriteResGroup70], (instregex "TEST8mi")>;
1872 def: InstRW<[SBWriteResGroup70], (instregex "TEST8rm")>;
1873 def: InstRW<[SBWriteResGroup70], (instregex "XOR64mi8")>;
1874 def: InstRW<[SBWriteResGroup70], (instregex "XOR64mr")>;
1875 def: InstRW<[SBWriteResGroup70], (instregex "XOR8mi")>;
1988 def: InstRW<[SBWriteResGroup70], (instregex "ADD(16|32|64)mi8")>;
1989 def: InstRW<[SBWriteResGroup70], (instregex "ADD(16|32|64)mr")>;
1990 def: InstRW<[SBWriteResGroup70], (instregex "ADD8mi")>;
1991 def: InstRW<[SBWriteResGroup70], (instregex "ADD8mr")>;
1992 def: InstRW<[SBWriteResGroup70], (instregex "AND(16|32|64)mi8")>;
1993 def: InstRW<[SBWriteResGroup70], (instregex "AND(16|32|64)mr")>;
1994 def: InstRW<[SBWriteResGroup70], (instregex "AND8mi")>;
1995 def: InstRW<[SBWriteResGroup70], (instregex "AND8mr")>;
1996 def: InstRW<[SBWriteResGroup70], (instregex "DEC(16|32|64)m")>;
1997 def: InstRW<[SBWriteResGroup70], (instregex "DEC8m")>;
1998 def: InstRW<[SBWriteResGroup70], (instregex "INC(16|32|64)m")>;
1999 def: InstRW<[SBWriteResGroup70], (instregex "INC8m")>;
2000 def: InstRW<[SBWriteResGroup70], (instregex "NEG(16|32|64)m")>;
2001 def: InstRW<[SBWriteResGroup70], (instregex "NEG8m")>;
2002 def: InstRW<[SBWriteResGroup70], (instregex "NOT(16|32|64)m")>;
2003 def: InstRW<[SBWriteResGroup70], (instregex "NOT8m")>;
2004 def: InstRW<[SBWriteResGroup70], (instregex "OR(16|32|64)mi8")>;
2005 def: InstRW<[SBWriteResGroup70], (instregex "OR(16|32|64)mr")>;
2006 def: InstRW<[SBWriteResGroup70], (instregex "OR8mi")>;
2007 def: InstRW<[SBWriteResGroup70], (instregex "OR8mr")>;
2008 def: InstRW<[SBWriteResGroup70], (instregex "SUB(16|32|64)mi8")>;
2009 def: InstRW<[SBWriteResGroup70], (instregex "SUB(16|32|64)mr")>;
2010 def: InstRW<[SBWriteResGroup70], (instregex "SUB8mi")>;
2011 def: InstRW<[SBWriteResGroup70], (instregex "SUB8mr")>;
2012 def: InstRW<[SBWriteResGroup70], (instregex "TEST(16|32|64)rm")>;
2013 def: InstRW<[SBWriteResGroup70], (instregex "TEST8mi")>;
2014 def: InstRW<[SBWriteResGroup70], (instregex "TEST8rm")>;
2015 def: InstRW<[SBWriteResGroup70], (instregex "XOR(16|32|64)mi8")>;
2016 def: InstRW<[SBWriteResGroup70], (instregex "XOR(16|32|64)mr")>;
2017 def: InstRW<[SBWriteResGroup70], (instregex "XOR8mi")>;
18762018 def: InstRW<[SBWriteResGroup70], (instregex "XOR8mr")>;
18772019
18782020 def SBWriteResGroup71 : SchedWriteRes<[SBPort0,SBPort23]> {
18902032 let NumMicroOps = 2;
18912033 let ResourceCycles = [1,1];
18922034 }
1893 def: InstRW<[SBWriteResGroup72], (instregex "BSF64rm")>;
1894 def: InstRW<[SBWriteResGroup72], (instregex "BSR64rm")>;
1895 def: InstRW<[SBWriteResGroup72], (instregex "CRC32r32m16")>;
1896 def: InstRW<[SBWriteResGroup72], (instregex "CRC32r32m8")>;
1897 def: InstRW<[SBWriteResGroup72], (instregex "FCOM32m")>;
1898 def: InstRW<[SBWriteResGroup72], (instregex "FCOM64m")>;
1899 def: InstRW<[SBWriteResGroup72], (instregex "FCOMP32m")>;
1900 def: InstRW<[SBWriteResGroup72], (instregex "FCOMP64m")>;
2035 def: InstRW<[SBWriteResGroup72], (instregex "BSF(16|32|64)rm")>;
2036 def: InstRW<[SBWriteResGroup72], (instregex "BSR(16|32|64)rm")>;
2037 def: InstRW<[SBWriteResGroup72], (instregex "CRC32r(16|32|64)m64")>;
2038 def: InstRW<[SBWriteResGroup72], (instregex "CRC32r(16|32|64)m8")>;
2039 def: InstRW<[SBWriteResGroup72], (instregex "FCOM32m")>;
2040 def: InstRW<[SBWriteResGroup72], (instregex "FCOM64m")>;
2041 def: InstRW<[SBWriteResGroup72], (instregex "FCOMP32m")>;
2042 def: InstRW<[SBWriteResGroup72], (instregex "FCOMP64m")>;
19012043 def: InstRW<[SBWriteResGroup72], (instregex "MUL8m")>;
19022044
19032045 def SBWriteResGroup73 : SchedWriteRes<[SBPort5,SBPort23]> {
19052047 let NumMicroOps = 2;
19062048 let ResourceCycles = [1,1];
19072049 }
1908 def: InstRW<[SBWriteResGroup73], (instregex "VANDNPDYrm")>;
1909 def: InstRW<[SBWriteResGroup73], (instregex "VANDNPSYrm")>;
1910 def: InstRW<[SBWriteResGroup73], (instregex "VANDPDrm")>;
1911 def: InstRW<[SBWriteResGroup73], (instregex "VANDPSrm")>;
1912 def: InstRW<[SBWriteResGroup73], (instregex "VORPDYrm")>;
1913 def: InstRW<[SBWriteResGroup73], (instregex "VORPSYrm")>;
1914 def: InstRW<[SBWriteResGroup73], (instregex "VPERM2F128rm")>;
1915 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDYri")>;
1916 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDmi")>;
1917 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSYri")>;
1918 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSmi")>;
1919 def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPDYrmi")>;
1920 def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPSYrmi")>;
1921 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPDrm")>;
1922 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPSrm")>;
1923 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPDYrm")>;
1924 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPSYrm")>;
1925 def: InstRW<[SBWriteResGroup73], (instregex "VXORPDrm")>;
1926 def: InstRW<[SBWriteResGroup73], (instregex "VXORPSrm")>;
1927
1928 def SBWriteResGroup74 : SchedWriteRes<[SBPort23,SBPort0]> {
2050 def: InstRW<[SBWriteResGroup73], (instregex "VANDNPDYrm")>;
2051 def: InstRW<[SBWriteResGroup73], (instregex "VANDNPSYrm")>;
2052 def: InstRW<[SBWriteResGroup73], (instregex "VANDPDYrm")>;
2053 def: InstRW<[SBWriteResGroup73], (instregex "VANDPSYrm")>;
2054 def: InstRW<[SBWriteResGroup73], (instregex "VORPDYrm")>;
2055 def: InstRW<[SBWriteResGroup73], (instregex "VORPSYrm")>;
2056 def: InstRW<[SBWriteResGroup73], (instregex "VPERM2F128rm")>;
2057 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDYmi")>;
2058 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDYrm")>;
2059 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSYmi")>;
2060 def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSYrm")>;
2061 def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPDYrmi")>;
2062 def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPSYrmi")>;
2063 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPDYrm")>;
2064 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPSYrm")>;
2065 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPDYrm")>;
2066 def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPSYrm")>;
2067 def: InstRW<[SBWriteResGroup73], (instregex "VXORPDYrm")>;
2068 def: InstRW<[SBWriteResGroup73], (instregex "VXORPSYrm")>;
2069
2070 def SBWriteResGroup74 : SchedWriteRes<[SBPort23,SBPort05]> {
19292071 let Latency = 8;
19302072 let NumMicroOps = 2;
19312073 let ResourceCycles = [1,1];
19332075 def: InstRW<[SBWriteResGroup74], (instregex "VBLENDPDYrmi")>;
19342076 def: InstRW<[SBWriteResGroup74], (instregex "VBLENDPSYrmi")>;
19352077
1936 def SBWriteResGroup75 : SchedWriteRes<[SBPort23,SBPort0]> {
2078 def SBWriteResGroup75 : SchedWriteRes<[SBPort23,SBPort05]> {
19372079 let Latency = 8;
19382080 let NumMicroOps = 3;
19392081 let ResourceCycles = [1,2];
19802122 let NumMicroOps = 3;
19812123 let ResourceCycles = [1,1,1];
19822124 }
1983 def: InstRW<[SBWriteResGroup79], (instregex "PSLLDrm")>;
1984 def: InstRW<[SBWriteResGroup79], (instregex "PSLLQrm")>;
1985 def: InstRW<[SBWriteResGroup79], (instregex "PSLLWrm")>;
1986 def: InstRW<[SBWriteResGroup79], (instregex "PSRADrm")>;
1987 def: InstRW<[SBWriteResGroup79], (instregex "PSRAWrm")>;
1988 def: InstRW<[SBWriteResGroup79], (instregex "PSRLDrm")>;
1989 def: InstRW<[SBWriteResGroup79], (instregex "PSRLQrm")>;
1990 def: InstRW<[SBWriteResGroup79], (instregex "PSRLWrm")>;
1991 def: InstRW<[SBWriteResGroup79], (instregex "VPSLLDri")>;
1992 def: InstRW<[SBWriteResGroup79], (instregex "VPSLLQri")>;
1993 def: InstRW<[SBWriteResGroup79], (instregex "VPSLLWri")>;
1994 def: InstRW<[SBWriteResGroup79], (instregex "VPSRADrm")>;
1995 def: InstRW<[SBWriteResGroup79], (instregex "VPSRAWrm")>;
1996 def: InstRW<[SBWriteResGroup79], (instregex "VPSRLDrm")>;
1997 def: InstRW<[SBWriteResGroup79], (instregex "VPSRLQrm")>;
2125 def: InstRW<[SBWriteResGroup79], (instregex "PSLLDrm")>;
2126 def: InstRW<[SBWriteResGroup79], (instregex "PSLLQrm")>;
2127 def: InstRW<[SBWriteResGroup79], (instregex "PSLLWrm")>;
2128 def: InstRW<[SBWriteResGroup79], (instregex "PSRADrm")>;
2129 def: InstRW<[SBWriteResGroup79], (instregex "PSRAWrm")>;
2130 def: InstRW<[SBWriteResGroup79], (instregex "PSRLDrm")>;
2131 def: InstRW<[SBWriteResGroup79], (instregex "PSRLQrm")>;
2132 def: InstRW<[SBWriteResGroup79], (instregex "PSRLWrm")>;
2133 def: InstRW<[SBWriteResGroup79], (instregex "VPSLLDrm")>;
2134 def: InstRW<[SBWriteResGroup79], (instregex "VPSLLQrm")>;
2135 def: InstRW<[SBWriteResGroup79], (instregex "VPSLLWrm")>;
2136 def: InstRW<[SBWriteResGroup79], (instregex "VPSRADrm")>;
2137 def: InstRW<[SBWriteResGroup79], (instregex "VPSRAWrm")>;
2138 def: InstRW<[SBWriteResGroup79], (instregex "VPSRLDrm")>;
2139 def: InstRW<[SBWriteResGroup79], (instregex "VPSRLQrm")>;
19982140 def: InstRW<[SBWriteResGroup79], (instregex "VPSRLWrm")>;
19992141
20002142 def SBWriteResGroup80 : SchedWriteRes<[SBPort23,SBPort15]> {
20142156 let NumMicroOps = 4;
20152157 let ResourceCycles = [1,3];
20162158 }
2017 def: InstRW<[SBWriteResGroup81], (instregex "CMPXCHG64rm")>;
2159 def: InstRW<[SBWriteResGroup81], (instregex "CMPXCHG(16|32|64)rm")>;
20182160 def: InstRW<[SBWriteResGroup81], (instregex "CMPXCHG8rm")>;
20192161
2020 def SBWriteResGroup82 : SchedWriteRes<[SBPort23,SBPort0,SBPort015]> {
2162 def SBWriteResGroup82 : SchedWriteRes<[SBPort23,SBPort05,SBPort015]> {
20212163 let Latency = 8;
20222164 let NumMicroOps = 4;
20232165 let ResourceCycles = [1,2,1];
20242166 }
2025 def: InstRW<[SBWriteResGroup82], (instregex "CMOVA64rm")>;
2026 def: InstRW<[SBWriteResGroup82], (instregex "CMOVBE64rm")>;
2167 def: InstRW<[SBWriteResGroup82], (instregex "CMOVA(16|32|64)rm")>;
2168 def: InstRW<[SBWriteResGroup82], (instregex "CMOVBE(16|32|64)rm")>;
20272169
20282170 def SBWriteResGroup83 : SchedWriteRes<[SBPort23,SBPort015]> {
20292171 let Latency = 8;
20422184 }
20432185 def: InstRW<[SBWriteResGroup84], (instregex "FLDCW16m")>;
20442186
2045 def SBWriteResGroup85 : SchedWriteRes<[SBPort4,SBPort23,SBPort0]> {
2187 def SBWriteResGroup85 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
20462188 let Latency = 8;
20472189 let NumMicroOps = 5;
20482190 let ResourceCycles = [1,2,2];
20492191 }
2050 def: InstRW<[SBWriteResGroup85], (instregex "ROL64mi")>;
2051 def: InstRW<[SBWriteResGroup85], (instregex "ROL8mi")>;
2052 def: InstRW<[SBWriteResGroup85], (instregex "ROR64mi")>;
2192 def: InstRW<[SBWriteResGroup85], (instregex "ROL(16|32|64)mi")>;
2193 def: InstRW<[SBWriteResGroup85], (instregex "ROL8mi")>;
2194 def: InstRW<[SBWriteResGroup85], (instregex "ROR(16|32|64)mi")>;
20532195 def: InstRW<[SBWriteResGroup85], (instregex "ROR8mi")>;
20542196
20552197 def SBWriteResGroup86 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> {
20612203 def: InstRW<[SBWriteResGroup86], (instregex "MOVSL")>;
20622204 def: InstRW<[SBWriteResGroup86], (instregex "MOVSQ")>;
20632205 def: InstRW<[SBWriteResGroup86], (instregex "MOVSW")>;
2064 def: InstRW<[SBWriteResGroup86], (instregex "XADD64rm")>;
2206 def: InstRW<[SBWriteResGroup86], (instregex "XADD(16|32|64)rm")>;
20652207 def: InstRW<[SBWriteResGroup86], (instregex "XADD8rm")>;
20662208
20672209 def SBWriteResGroup87 : SchedWriteRes<[SBPort4,SBPort5,SBPort01,SBPort23]> {
20712213 }
20722214 def: InstRW<[SBWriteResGroup87], (instregex "FARCALL64")>;
20732215
2074 def SBWriteResGroup88 : SchedWriteRes<[SBPort4,SBPort23,SBPort0,SBPort015]> {
2216 def SBWriteResGroup88 : SchedWriteRes<[SBPort4,SBPort23,SBPort05,SBPort015]> {
20752217 let Latency = 8;
20762218 let NumMicroOps = 5;
20772219 let ResourceCycles = [1,2,1,1];
20782220 }
2079 def: InstRW<[SBWriteResGroup88], (instregex "SHLD64mri8")>;
2080 def: InstRW<[SBWriteResGroup88], (instregex "SHRD64mri8")>;
2221 def: InstRW<[SBWriteResGroup88], (instregex "SHLD(16|32|64)mri8")>;
2222 def: InstRW<[SBWriteResGroup88], (instregex "SHRD(16|32|64)mri8")>;
20812223
20822224 def SBWriteResGroup89 : SchedWriteRes<[SBPort0,SBPort23]> {
20832225 let Latency = 9;
21362278 def: InstRW<[SBWriteResGroup90], (instregex "MMX_CVTPI2PSirm")>;
21372279 def: InstRW<[SBWriteResGroup90], (instregex "MMX_CVTPS2PIirm")>;
21382280 def: InstRW<[SBWriteResGroup90], (instregex "MMX_CVTTPS2PIirm")>;
2139 def: InstRW<[SBWriteResGroup90], (instregex "POPCNT64rm")>;
2281 def: InstRW<[SBWriteResGroup90], (instregex "POPCNT(16|32|64)rm")>;
21402282 def: InstRW<[SBWriteResGroup90], (instregex "ROUNDPDm")>;
21412283 def: InstRW<[SBWriteResGroup90], (instregex "ROUNDPSm")>;
21422284 def: InstRW<[SBWriteResGroup90], (instregex "ROUNDSDm")>;
21772319 def: InstRW<[SBWriteResGroup90], (instregex "VSUBSDrm")>;
21782320 def: InstRW<[SBWriteResGroup90], (instregex "VSUBSSrm")>;
21792321
2180 def SBWriteResGroup91 : SchedWriteRes<[SBPort23,SBPort0]> {
2322 def SBWriteResGroup91 : SchedWriteRes<[SBPort23,SBPort05]> {
21812323 let Latency = 9;
21822324 let NumMicroOps = 3;
21832325 let ResourceCycles = [1,2];
21842326 }
2185 def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPDYrm")>;
2186 def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPSYrm")>;
2187 def: InstRW<[SBWriteResGroup91], (instregex "VMASKMOVPDrm")>;
2188 def: InstRW<[SBWriteResGroup91], (instregex "VMASKMOVPSrm")>;
2327 def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPDYrm")>;
2328 def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPSYrm")>;
2329 def: InstRW<[SBWriteResGroup91], (instregex "VMASKMOVPDYrm")>;
2330 def: InstRW<[SBWriteResGroup91], (instregex "VMASKMOVPSYrm")>;
21892331
21902332 def SBWriteResGroup92 : SchedWriteRes<[SBPort0,SBPort1,SBPort5]> {
21912333 let Latency = 9;
22082350 def: InstRW<[SBWriteResGroup93], (instregex "CVTTSD2SIrm")>;
22092351 def: InstRW<[SBWriteResGroup93], (instregex "CVTTSS2SI64rm")>;
22102352 def: InstRW<[SBWriteResGroup93], (instregex "CVTTSS2SIrm")>;
2211 def: InstRW<[SBWriteResGroup93], (instregex "MUL64m")>;
2353 def: InstRW<[SBWriteResGroup93], (instregex "MUL(16|32|64)m")>;
22122354
22132355 def SBWriteResGroup94 : SchedWriteRes<[SBPort0,SBPort5,SBPort23]> {
22142356 let Latency = 9;
22542396 def: InstRW<[SBWriteResGroup97], (instregex "IST_FP16m")>;
22552397 def: InstRW<[SBWriteResGroup97], (instregex "IST_FP32m")>;
22562398 def: InstRW<[SBWriteResGroup97], (instregex "IST_FP64m")>;
2257 def: InstRW<[SBWriteResGroup97], (instregex "SHL64mCL")>;
2258 def: InstRW<[SBWriteResGroup97], (instregex "SHL8mCL")>;
2399
2400 def SBWriteResGroup97_2 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
2401 let Latency = 9;
2402 let NumMicroOps = 6;
2403 let ResourceCycles = [1,2,3];
2404 }
2405 def: InstRW<[SBWriteResGroup97_2], (instregex "ROL(16|32|64)mCL")>;
2406 def: InstRW<[SBWriteResGroup97_2], (instregex "ROL8mCL")>;
2407 def: InstRW<[SBWriteResGroup97_2], (instregex "ROR(16|32|64)mCL")>;
2408 def: InstRW<[SBWriteResGroup97_2], (instregex "ROR8mCL")>;
2409 def: InstRW<[SBWriteResGroup97_2], (instregex "SAR(16|32|64)mCL")>;
2410 def: InstRW<[SBWriteResGroup97_2], (instregex "SAR8mCL")>;
2411 def: InstRW<[SBWriteResGroup97_2], (instregex "SHL(16|32|64)mCL")>;
2412 def: InstRW<[SBWriteResGroup97_2], (instregex "SHL8mCL")>;
2413 def: InstRW<[SBWriteResGroup97_2], (instregex "SHR(16|32|64)mCL")>;
2414 def: InstRW<[SBWriteResGroup97_2], (instregex "SHR8mCL")>;
22592415
22602416 def SBWriteResGroup98 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> {
22612417 let Latency = 9;
22622418 let NumMicroOps = 6;
22632419 let ResourceCycles = [1,2,3];
22642420 }
2265 def: InstRW<[SBWriteResGroup98], (instregex "ADC64mi8")>;
2266 def: InstRW<[SBWriteResGroup98], (instregex "ADC8mi")>;
2267 def: InstRW<[SBWriteResGroup98], (instregex "SBB64mi8")>;
2268 def: InstRW<[SBWriteResGroup98], (instregex "SBB8mi")>;
2269
2270 def SBWriteResGroup99 : SchedWriteRes<[SBPort4,SBPort23,SBPort0,SBPort015]> {
2421 def: InstRW<[SBWriteResGroup98], (instregex "ADC(16|32|64)mi8")>;
2422 def: InstRW<[SBWriteResGroup98], (instregex "ADC8mi")>;
2423 def: InstRW<[SBWriteResGroup98], (instregex "SBB(16|32|64)mi8")>;
2424 def: InstRW<[SBWriteResGroup98], (instregex "SBB8mi")>;
2425
2426 def SBWriteResGroup99 : SchedWriteRes<[SBPort4,SBPort23,SBPort05,SBPort015]> {
22712427 let Latency = 9;
22722428 let NumMicroOps = 6;
22732429 let ResourceCycles = [1,2,2,1];
22742430 }
2275 def: InstRW<[SBWriteResGroup99], (instregex "ADC64mr")>;
2276 def: InstRW<[SBWriteResGroup99], (instregex "ADC8mr")>;
2277 def: InstRW<[SBWriteResGroup99], (instregex "SBB64mr")>;
2431 def: InstRW<[SBWriteResGroup99], (instregex "ADC(16|32|64)mr")>;
2432 def: InstRW<[SBWriteResGroup99], (instregex "ADC8mr")>;
2433 def: InstRW<[SBWriteResGroup99], (instregex "SBB(16|32|64)mr")>;
22782434 def: InstRW<[SBWriteResGroup99], (instregex "SBB8mr")>;
22792435
2280 def SBWriteResGroup100 : SchedWriteRes<[SBPort4,SBPort5,SBPort23,SBPort0,SBPort015]> {
2436 def SBWriteResGroup100 : SchedWriteRes<[SBPort4,SBPort5,SBPort23,SBPort05,SBPort015]> {
22812437 let Latency = 9;
22822438 let NumMicroOps = 6;
22832439 let ResourceCycles = [1,1,2,1,1];
22842440 }
2285 def: InstRW<[SBWriteResGroup100], (instregex "BT64mr")>;
2286 def: InstRW<[SBWriteResGroup100], (instregex "BTC64mr")>;
2287 def: InstRW<[SBWriteResGroup100], (instregex "BTR64mr")>;
2288 def: InstRW<[SBWriteResGroup100], (instregex "BTS64mr")>;
2441 def: InstRW<[SBWriteResGroup100], (instregex "BT(16|32|64)mr")>;
2442 def: InstRW<[SBWriteResGroup100], (instregex "BTC(16|32|64)mr")>;
2443 def: InstRW<[SBWriteResGroup100], (instregex "BTR(16|32|64)mr")>;
2444 def: InstRW<[SBWriteResGroup100], (instregex "BTS(16|32|64)mr")>;
22892445
22902446 def SBWriteResGroup101 : SchedWriteRes<[SBPort1,SBPort23]> {
22912447 let Latency = 10;
22922448 let NumMicroOps = 2;
22932449 let ResourceCycles = [1,1];
22942450 }
2295 def: InstRW<[SBWriteResGroup101], (instregex "ADD_F32m")>;
2296 def: InstRW<[SBWriteResGroup101], (instregex "ADD_F64m")>;
2297 def: InstRW<[SBWriteResGroup101], (instregex "ILD_F16m")>;
2298 def: InstRW<[SBWriteResGroup101], (instregex "ILD_F32m")>;
2299 def: InstRW<[SBWriteResGroup101], (instregex "ILD_F64m")>;
2300 def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F32m")>;
2301 def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F64m")>;
2302 def: InstRW<[SBWriteResGroup101], (instregex "SUB_F32m")>;
2303 def: InstRW<[SBWriteResGroup101], (instregex "SUB_F64m")>;
2304 def: InstRW<[SBWriteResGroup101], (instregex "VADDPDYrm")>;
2305 def: InstRW<[SBWriteResGroup101], (instregex "VADDPSYrm")>;
2306 def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPDYrm")>;
2307 def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPSYrm")>;
2308 def: InstRW<[SBWriteResGroup101], (instregex "VCMPPDYrmi")>;
2309 def: InstRW<[SBWriteResGroup101], (instregex "VCMPPSYrmi")>;
2310 def: InstRW<[SBWriteResGroup101], (instregex "VCVTDQ2PSYrm")>;
2311 def: InstRW<[SBWriteResGroup101], (instregex "VCVTPS2DQYrm")>;
2312 def: InstRW<[SBWriteResGroup101], (instregex "VCVTTPS2DQrm")>;
2313 def: InstRW<[SBWriteResGroup101], (instregex "VMAXPDYrm")>;
2314 def: InstRW<[SBWriteResGroup101], (instregex "VMAXPSYrm")>;
2315 def: InstRW<[SBWriteResGroup101], (instregex "VMINPDrm")>;
2316 def: InstRW<[SBWriteResGroup101], (instregex "VMINPSrm")>;
2317 def: InstRW<[SBWriteResGroup101], (instregex "VROUNDPDm")>;
2318 def: InstRW<[SBWriteResGroup101], (instregex "VROUNDPSm")>;
2319 def: InstRW<[SBWriteResGroup101], (instregex "VSUBPDYrm")>;
2451 def: InstRW<[SBWriteResGroup101], (instregex "ADD_F32m")>;
2452 def: InstRW<[SBWriteResGroup101], (instregex "ADD_F64m")>;
2453 def: InstRW<[SBWriteResGroup101], (instregex "ILD_F16m")>;
2454 def: InstRW<[SBWriteResGroup101], (instregex "ILD_F32m")>;
2455 def: InstRW<[SBWriteResGroup101], (instregex "ILD_F64m")>;
2456 def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F32m")>;
2457 def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F64m")>;
2458 def: InstRW<[SBWriteResGroup101], (instregex "SUB_F32m")>;
2459 def: InstRW<[SBWriteResGroup101], (instregex "SUB_F64m")>;
2460 def: InstRW<[SBWriteResGroup101], (instregex "VADDPDYrm")>;
2461 def: InstRW<[SBWriteResGroup101], (instregex "VADDPSYrm")>;
2462 def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPDYrm")>;
2463 def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPSYrm")>;
2464 def: InstRW<[SBWriteResGroup101], (instregex "VCMPPDYrmi")>;
2465 def: InstRW<[SBWriteResGroup101], (instregex "VCMPPSYrmi")>;
2466 def: InstRW<[SBWriteResGroup101], (instregex "VCVTDQ2PSYrm")>;
2467 def: InstRW<[SBWriteResGroup101], (instregex "VCVTPS2DQYrm")>;
2468 def: InstRW<[SBWriteResGroup101], (instregex "VCVTTPS2DQYrm")>;
2469 def: InstRW<[SBWriteResGroup101], (instregex "VMAXPDYrm")>;
2470 def: InstRW<[SBWriteResGroup101], (instregex "VMAXPSYrm")>;
2471 def: InstRW<[SBWriteResGroup101], (instregex "VMINPDYrm")>;
2472 def: InstRW<[SBWriteResGroup101], (instregex "VMINPSYrm")>;
2473 def: InstRW<[SBWriteResGroup101], (instregex "VROUNDYPDm")>;
2474 def: InstRW<[SBWriteResGroup101], (instregex "VROUNDYPSm")>;
2475 def: InstRW<[SBWriteResGroup101], (instregex "VSUBPDYrm")>;
23202476 def: InstRW<[SBWriteResGroup101], (instregex "VSUBPSYrm")>;
23212477
23222478 def SBWriteResGroup102 : SchedWriteRes<[SBPort0,SBPort1,SBPort23]> {
23242480 let NumMicroOps = 3;
23252481 let ResourceCycles = [1,1,1];
23262482 }
2327 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SI64rm")>;
2328 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SI64rr")>;
2329 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SI64rm")>;
2330 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SIrm")>;
2331 def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SI64rm")>;
2332 def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SI64rr")>;
2333 def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSS2SI64rm")>;
2483 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SI64rm")>;
2484 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SIrm")>;
2485 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SI64rm")>;
2486 def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SIrm")>;
2487 def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SI64rm")>;
2488 def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SIrm")>;
2489 def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSS2SI64rm")>;
23342490 def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSS2SIrm")>;
23352491
23362492 def SBWriteResGroup103 : SchedWriteRes<[SBPort1,SBPort5,SBPort23]> {
23562512 def: InstRW<[SBWriteResGroup103], (instregex "VCVTSI2SS64rm")>;
23572513 def: InstRW<[SBWriteResGroup103], (instregex "VCVTSI2SSrm")>;
23582514 def: InstRW<[SBWriteResGroup103], (instregex "VCVTTPD2DQrm")>;
2515
2516 def SBWriteResGroup103_2 : SchedWriteRes<[SBPort4,SBPort23,SBPort05,SBPort015]> {
2517 let Latency = 10;
2518 let NumMicroOps = 7;
2519 let ResourceCycles = [1,2,3,1];
2520 }
2521 def: InstRW<[SBWriteResGroup103_2], (instregex "SHLD(16|32|64)mrCL")>;
2522 def: InstRW<[SBWriteResGroup103_2], (instregex "SHRD(16|32|64)mrCL")>;
23592523
23602524 def SBWriteResGroup104 : SchedWriteRes<[SBPort0,SBPort23]> {
23612525 let Latency = 11;
24662630 let NumMicroOps = 4;
24672631 let ResourceCycles = [1,2,1];
24682632 }
2469 def: InstRW<[SBWriteResGroup113], (instregex "VHADDPDrm")>;
2633 def: InstRW<[SBWriteResGroup113], (instregex "VHADDPDYrm")>;
24702634 def: InstRW<[SBWriteResGroup113], (instregex "VHADDPSYrm")>;
24712635 def: InstRW<[SBWriteResGroup113], (instregex "VHSUBPDYrm")>;
24722636 def: InstRW<[SBWriteResGroup113], (instregex "VHSUBPSYrm")>;
25172681 }
25182682 def: InstRW<[SBWriteResGroup117], (instregex "VSQRTSSm")>;
25192683
2520 def SBWriteResGroup118 : SchedWriteRes<[SBPort0,SBPort23,SBPort0]> {
2684 def SBWriteResGroup118 : SchedWriteRes<[SBPort0,SBPort23,SBPort05]> {
25212685 let Latency = 14;
25222686 let NumMicroOps = 4;
25232687 let ResourceCycles = [2,1,1];
25242688 }
2525 def: InstRW<[SBWriteResGroup118], (instregex "VRCPPSm")>;
2689 def: InstRW<[SBWriteResGroup118], (instregex "VRCPPSYm")>;
25262690 def: InstRW<[SBWriteResGroup118], (instregex "VRSQRTPSYm")>;
25272691
25282692 def SBWriteResGroup119 : SchedWriteRes<[SBPort0,SBPort1,SBPort23]> {
26242788 def: InstRW<[SBWriteResGroup128], (instregex "VDIVSDrm")>;
26252789 def: InstRW<[SBWriteResGroup128], (instregex "VSQRTPDm")>;
26262790
2627 def SBWriteResGroup129 : SchedWriteRes<[SBPort0,SBPort0]> {
2791 def SBWriteResGroup129 : SchedWriteRes<[SBPort0,SBPort05]> {
26282792 let Latency = 29;
26292793 let NumMicroOps = 3;
26302794 let ResourceCycles = [2,1];
26522816 def: InstRW<[SBWriteResGroup131], (instregex "DIV_FI16m")>;
26532817 def: InstRW<[SBWriteResGroup131], (instregex "DIV_FI32m")>;
26542818
2655 def SBWriteResGroup132 : SchedWriteRes<[SBPort0,SBPort23,SBPort0]> {
2819 def SBWriteResGroup132 : SchedWriteRes<[SBPort0,SBPort23,SBPort05]> {
26562820 let Latency = 36;
26572821 let NumMicroOps = 4;
26582822 let ResourceCycles = [2,1,1];
26602824 def: InstRW<[SBWriteResGroup132], (instregex "VDIVPSYrm")>;
26612825 def: InstRW<[SBWriteResGroup132], (instregex "VSQRTPSYm")>;
26622826
2663 def SBWriteResGroup133 : SchedWriteRes<[SBPort0,SBPort0]> {
2827 def SBWriteResGroup133 : SchedWriteRes<[SBPort0,SBPort05]> {
26642828 let Latency = 45;
26652829 let NumMicroOps = 3;
26662830 let ResourceCycles = [2,1];
26682832 def: InstRW<[SBWriteResGroup133], (instregex "VDIVPDYrr")>;
26692833 def: InstRW<[SBWriteResGroup133], (instregex "VSQRTPDYr")>;
26702834
2671 def SBWriteResGroup134 : SchedWriteRes<[SBPort0,SBPort23,SBPort0]> {
2835 def SBWriteResGroup134 : SchedWriteRes<[SBPort0,SBPort23,SBPort05]> {
26722836 let Latency = 52;
26732837 let NumMicroOps = 4;
26742838 let ResourceCycles = [2,1,1];
252252 ; GENERIC-LABEL: test_andpd:
253253 ; GENERIC: # BB#0:
254254 ; GENERIC-NEXT: vandpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
255 ; GENERIC-NEXT: vandpd (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
255 ; GENERIC-NEXT: vandpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
256256 ; GENERIC-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
257257 ; GENERIC-NEXT: retq # sched: [1:1.00]
258258 ;
259259 ; SANDY-LABEL: test_andpd:
260260 ; SANDY: # BB#0:
261261 ; SANDY-NEXT: vandpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
262 ; SANDY-NEXT: vandpd (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
262 ; SANDY-NEXT: vandpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
263263 ; SANDY-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
264264 ; SANDY-NEXT: retq # sched: [1:1.00]
265265 ;
298298 ; GENERIC-LABEL: test_andps:
299299 ; GENERIC: # BB#0:
300300 ; GENERIC-NEXT: vandps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
301 ; GENERIC-NEXT: vandps (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
301 ; GENERIC-NEXT: vandps (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
302302 ; GENERIC-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
303303 ; GENERIC-NEXT: retq # sched: [1:1.00]
304304 ;
305305 ; SANDY-LABEL: test_andps:
306306 ; SANDY: # BB#0:
307307 ; SANDY-NEXT: vandps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
308 ; SANDY-NEXT: vandps (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
308 ; SANDY-NEXT: vandps (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
309309 ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
310310 ; SANDY-NEXT: retq # sched: [1:1.00]
311311 ;
343343 define <4 x double> @test_blendpd(<4 x double> %a0, <4 x double> %a1, <4 x double> *%a2) {
344344 ; GENERIC-LABEL: test_blendpd:
345345 ; GENERIC: # BB#0:
346 ; GENERIC-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3] sched: [1:1.00]
346 ; GENERIC-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3] sched: [1:0.50]
347347 ; GENERIC-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
348 ; GENERIC-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],mem[1,2],ymm0[3] sched: [8:1.00]
348 ; GENERIC-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],mem[1,2],ymm0[3] sched: [8:0.50]
349349 ; GENERIC-NEXT: retq # sched: [1:1.00]
350350 ;
351351 ; SANDY-LABEL: test_blendpd:
352352 ; SANDY: # BB#0:
353 ; SANDY-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3] sched: [1:1.00]
353 ; SANDY-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3] sched: [1:0.50]
354354 ; SANDY-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
355 ; SANDY-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],mem[1,2],ymm0[3] sched: [8:1.00]
355 ; SANDY-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],mem[1,2],ymm0[3] sched: [8:0.50]
356356 ; SANDY-NEXT: retq # sched: [1:1.00]
357357 ;
358358 ; HASWELL-LABEL: test_blendpd:
385385 define <8 x float> @test_blendps(<8 x float> %a0, <8 x float> %a1, <8 x float> *%a2) {
386386 ; GENERIC-LABEL: test_blendps:
387387 ; GENERIC: # BB#0:
388 ; GENERIC-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3,4,5,6,7] sched: [1:1.00]
389 ; GENERIC-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],mem[2],ymm0[3],mem[4,5,6],ymm0[7] sched: [8:1.00]
388 ; GENERIC-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3,4,5,6,7] sched: [1:0.50]
389 ; GENERIC-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],mem[2],ymm0[3],mem[4,5,6],ymm0[7] sched: [8:0.50]
390390 ; GENERIC-NEXT: retq # sched: [1:1.00]
391391 ;
392392 ; SANDY-LABEL: test_blendps:
393393 ; SANDY: # BB#0:
394 ; SANDY-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3,4,5,6,7] sched: [1:1.00]
395 ; SANDY-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],mem[2],ymm0[3],mem[4,5,6],ymm0[7] sched: [8:1.00]
394 ; SANDY-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2],ymm0[3,4,5,6,7] sched: [1:0.50]
395 ; SANDY-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],mem[2],ymm0[3],mem[4,5,6],ymm0[7] sched: [8:0.50]
396396 ; SANDY-NEXT: retq # sched: [1:1.00]
397397 ;
398398 ; HASWELL-LABEL: test_blendps:
421421 define <4 x double> @test_blendvpd(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, <4 x double> *%a3) {
422422 ; GENERIC-LABEL: test_blendvpd:
423423 ; GENERIC: # BB#0:
424 ; GENERIC-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:2.00]
425 ; GENERIC-NEXT: vblendvpd %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:2.00]
424 ; GENERIC-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:1.00]
425 ; GENERIC-NEXT: vblendvpd %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:1.00]
426426 ; GENERIC-NEXT: retq # sched: [1:1.00]
427427 ;
428428 ; SANDY-LABEL: test_blendvpd:
429429 ; SANDY: # BB#0:
430 ; SANDY-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:2.00]
431 ; SANDY-NEXT: vblendvpd %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:2.00]
430 ; SANDY-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:1.00]
431 ; SANDY-NEXT: vblendvpd %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:1.00]
432432 ; SANDY-NEXT: retq # sched: [1:1.00]
433433 ;
434434 ; HASWELL-LABEL: test_blendvpd:
458458 define <8 x float> @test_blendvps(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2, <8 x float> *%a3) {
459459 ; GENERIC-LABEL: test_blendvps:
460460 ; GENERIC: # BB#0:
461 ; GENERIC-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:2.00]
462 ; GENERIC-NEXT: vblendvps %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:2.00]
461 ; GENERIC-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:1.00]
462 ; GENERIC-NEXT: vblendvps %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:1.00]
463463 ; GENERIC-NEXT: retq # sched: [1:1.00]
464464 ;
465465 ; SANDY-LABEL: test_blendvps:
466466 ; SANDY: # BB#0:
467 ; SANDY-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:2.00]
468 ; SANDY-NEXT: vblendvps %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:2.00]
467 ; SANDY-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [2:1.00]
468 ; SANDY-NEXT: vblendvps %ymm2, (%rdi), %ymm0, %ymm0 # sched: [9:1.00]
469469 ; SANDY-NEXT: retq # sched: [1:1.00]
470470 ;
471471 ; HASWELL-LABEL: test_blendvps:
495495 define <8 x float> @test_broadcastf128(<4 x float> *%a0) {
496496 ; GENERIC-LABEL: test_broadcastf128:
497497 ; GENERIC: # BB#0:
498 ; GENERIC-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] sched: [3:1.00]
498 ; GENERIC-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] sched: [7:1.00]
499499 ; GENERIC-NEXT: retq # sched: [1:1.00]
500500 ;
501501 ; SANDY-LABEL: test_broadcastf128:
502502 ; SANDY: # BB#0:
503 ; SANDY-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] sched: [3:1.00]
503 ; SANDY-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] sched: [7:1.00]
504504 ; SANDY-NEXT: retq # sched: [1:1.00]
505505 ;
506506 ; HASWELL-LABEL: test_broadcastf128:
587587 define <8 x float> @test_broadcastss_ymm(float *%a0) {
588588 ; GENERIC-LABEL: test_broadcastss_ymm:
589589 ; GENERIC: # BB#0:
590 ; GENERIC-NEXT: vbroadcastss (%rdi), %ymm0 # sched: [5:1.00]
590 ; GENERIC-NEXT: vbroadcastss (%rdi), %ymm0 # sched: [7:0.50]
591591 ; GENERIC-NEXT: retq # sched: [1:1.00]
592592 ;
593593 ; SANDY-LABEL: test_broadcastss_ymm:
594594 ; SANDY: # BB#0:
595 ; SANDY-NEXT: vbroadcastss (%rdi), %ymm0 # sched: [5:1.00]
595 ; SANDY-NEXT: vbroadcastss (%rdi), %ymm0 # sched: [7:0.50]
596596 ; SANDY-NEXT: retq # sched: [1:1.00]
597597 ;
598598 ; HASWELL-LABEL: test_broadcastss_ymm:
759759 ; SANDY: # BB#0:
760760 ; SANDY-NEXT: vcvtdq2ps %ymm0, %ymm0 # sched: [3:1.00]
761761 ; SANDY-NEXT: vmovaps (%rdi), %xmm1 # sched: [6:0.50]
762 ; SANDY-NEXT: vinsertf128 $1, 16(%rdi), %ymm1, %ymm1 # sched: [7:1.00]
762 ; SANDY-NEXT: vinsertf128 $1, 16(%rdi), %ymm1, %ymm1 # sched: [7:0.50]
763763 ; SANDY-NEXT: vcvtdq2ps %ymm1, %ymm1 # sched: [3:1.00]
764764 ; SANDY-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
765765 ; SANDY-NEXT: retq # sched: [1:1.00]
879879 ; GENERIC-LABEL: test_cvtps2dq:
880880 ; GENERIC: # BB#0:
881881 ; GENERIC-NEXT: vcvttps2dq %ymm0, %ymm0 # sched: [3:1.00]
882 ; GENERIC-NEXT: vcvttps2dq (%rdi), %ymm1 # sched: [7:1.00]
882 ; GENERIC-NEXT: vcvttps2dq (%rdi), %ymm1 # sched: [10:1.00]
883883 ; GENERIC-NEXT: vorps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
884884 ; GENERIC-NEXT: retq # sched: [1:1.00]
885885 ;
886886 ; SANDY-LABEL: test_cvtps2dq:
887887 ; SANDY: # BB#0:
888888 ; SANDY-NEXT: vcvttps2dq %ymm0, %ymm0 # sched: [3:1.00]
889 ; SANDY-NEXT: vcvttps2dq (%rdi), %ymm1 # sched: [7:1.00]
889 ; SANDY-NEXT: vcvttps2dq (%rdi), %ymm1 # sched: [10:1.00]
890890 ; SANDY-NEXT: vorps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
891891 ; SANDY-NEXT: retq # sched: [1:1.00]
892892 ;
920920 define <4 x double> @test_divpd(<4 x double> %a0, <4 x double> %a1, <4 x double> *%a2) {
921921 ; GENERIC-LABEL: test_divpd:
922922 ; GENERIC: # BB#0:
923 ; GENERIC-NEXT: vdivpd %ymm1, %ymm0, %ymm0 # sched: [45:3.00]
924 ; GENERIC-NEXT: vdivpd (%rdi), %ymm0, %ymm0 # sched: [52:3.00]
923 ; GENERIC-NEXT: vdivpd %ymm1, %ymm0, %ymm0 # sched: [45:2.00]
924 ; GENERIC-NEXT: vdivpd (%rdi), %ymm0, %ymm0 # sched: [52:2.00]
925925 ; GENERIC-NEXT: retq # sched: [1:1.00]
926926 ;
927927 ; SANDY-LABEL: test_divpd:
928928 ; SANDY: # BB#0:
929 ; SANDY-NEXT: vdivpd %ymm1, %ymm0, %ymm0 # sched: [45:3.00]
930 ; SANDY-NEXT: vdivpd (%rdi), %ymm0, %ymm0 # sched: [52:3.00]
929 ; SANDY-NEXT: vdivpd %ymm1, %ymm0, %ymm0 # sched: [45:2.00]
930 ; SANDY-NEXT: vdivpd (%rdi), %ymm0, %ymm0 # sched: [52:2.00]
931931 ; SANDY-NEXT: retq # sched: [1:1.00]
932932 ;
933933 ; HASWELL-LABEL: test_divpd:
956956 define <8 x float> @test_divps(<8 x float> %a0, <8 x float> %a1, <8 x float> *%a2) {
957957 ; GENERIC-LABEL: test_divps:
958958 ; GENERIC: # BB#0:
959 ; GENERIC-NEXT: vdivps %ymm1, %ymm0, %ymm0 # sched: [29:3.00]
960 ; GENERIC-NEXT: vdivps (%rdi), %ymm0, %ymm0 # sched: [36:3.00]
959 ; GENERIC-NEXT: vdivps %ymm1, %ymm0, %ymm0 # sched: [29:2.00]
960 ; GENERIC-NEXT: vdivps (%rdi), %ymm0, %ymm0 # sched: [36:2.00]
961961 ; GENERIC-NEXT: retq # sched: [1:1.00]
962962 ;
963963 ; SANDY-LABEL: test_divps:
964964 ; SANDY: # BB#0:
965 ; SANDY-NEXT: vdivps %ymm1, %ymm0, %ymm0 # sched: [29:3.00]
966 ; SANDY-NEXT: vdivps (%rdi), %ymm0, %ymm0 # sched: [36:3.00]
965 ; SANDY-NEXT: vdivps %ymm1, %ymm0, %ymm0 # sched: [29:2.00]
966 ; SANDY-NEXT: vdivps (%rdi), %ymm0, %ymm0 # sched: [36:2.00]
967967 ; SANDY-NEXT: retq # sched: [1:1.00]
968968 ;
969969 ; HASWELL-LABEL: test_divps:
10691069 define <4 x double> @test_haddpd(<4 x double> %a0, <4 x double> %a1, <4 x double> *%a2) {
10701070 ; GENERIC-LABEL: test_haddpd:
10711071 ; GENERIC: # BB#0:
1072 ; GENERIC-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
1073 ; GENERIC-NEXT: vhaddpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1072 ; GENERIC-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00]
1073 ; GENERIC-NEXT: vhaddpd (%rdi), %ymm0, %ymm0 # sched: [12:2.00]
10741074 ; GENERIC-NEXT: retq # sched: [1:1.00]
10751075 ;
10761076 ; SANDY-LABEL: test_haddpd:
10771077 ; SANDY: # BB#0:
1078 ; SANDY-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
1079 ; SANDY-NEXT: vhaddpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1078 ; SANDY-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 # sched: [5:2.00]
1079 ; SANDY-NEXT: vhaddpd (%rdi), %ymm0, %ymm0 # sched: [12:2.00]
10801080 ; SANDY-NEXT: retq # sched: [1:1.00]
10811081 ;
10821082 ; HASWELL-LABEL: test_haddpd:
12181218 ; GENERIC-LABEL: test_insertf128:
12191219 ; GENERIC: # BB#0:
12201220 ; GENERIC-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 # sched: [1:1.00]
1221 ; GENERIC-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1221 ; GENERIC-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 # sched: [7:0.50]
12221222 ; GENERIC-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
12231223 ; GENERIC-NEXT: retq # sched: [1:1.00]
12241224 ;
12251225 ; SANDY-LABEL: test_insertf128:
12261226 ; SANDY: # BB#0:
12271227 ; SANDY-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 # sched: [1:1.00]
1228 ; SANDY-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1228 ; SANDY-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 # sched: [7:0.50]
12291229 ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
12301230 ; SANDY-NEXT: retq # sched: [1:1.00]
12311231 ;
12911291 define <2 x double> @test_maskmovpd(i8* %a0, <2 x i64> %a1, <2 x double> %a2) {
12921292 ; GENERIC-LABEL: test_maskmovpd:
12931293 ; GENERIC: # BB#0:
1294 ; GENERIC-NEXT: vmaskmovpd (%rdi), %xmm0, %xmm2 # sched: [8:2.00]
1294 ; GENERIC-NEXT: vmaskmovpd (%rdi), %xmm0, %xmm2 # sched: [8:1.00]
12951295 ; GENERIC-NEXT: vmaskmovpd %xmm1, %xmm0, (%rdi) # sched: [5:1.00]
12961296 ; GENERIC-NEXT: vmovapd %xmm2, %xmm0 # sched: [1:1.00]
12971297 ; GENERIC-NEXT: retq # sched: [1:1.00]
12981298 ;
12991299 ; SANDY-LABEL: test_maskmovpd:
13001300 ; SANDY: # BB#0:
1301 ; SANDY-NEXT: vmaskmovpd (%rdi), %xmm0, %xmm2 # sched: [8:2.00]
1301 ; SANDY-NEXT: vmaskmovpd (%rdi), %xmm0, %xmm2 # sched: [8:1.00]
13021302 ; SANDY-NEXT: vmaskmovpd %xmm1, %xmm0, (%rdi) # sched: [5:1.00]
13031303 ; SANDY-NEXT: vmovapd %xmm2, %xmm0 # sched: [1:1.00]
13041304 ; SANDY-NEXT: retq # sched: [1:1.00]
13331333 define <4 x double> @test_maskmovpd_ymm(i8* %a0, <4 x i64> %a1, <4 x double> %a2) {
13341334 ; GENERIC-LABEL: test_maskmovpd_ymm:
13351335 ; GENERIC: # BB#0:
1336 ; GENERIC-NEXT: vmaskmovpd (%rdi), %ymm0, %ymm2 # sched: [5:1.00]
1337 ; GENERIC-NEXT: vmaskmovpd %ymm1, %ymm0, (%rdi)
1336 ; GENERIC-NEXT: vmaskmovpd (%rdi), %ymm0, %ymm2 # sched: [9:1.00]
1337 ; GENERIC-NEXT: vmaskmovpd %ymm1, %ymm0, (%rdi) # sched: [5:1.00]
13381338 ; GENERIC-NEXT: vmovapd %ymm2, %ymm0 # sched: [1:1.00]
13391339 ; GENERIC-NEXT: retq # sched: [1:1.00]
13401340 ;
13411341 ; SANDY-LABEL: test_maskmovpd_ymm:
13421342 ; SANDY: # BB#0:
1343 ; SANDY-NEXT: vmaskmovpd (%rdi), %ymm0, %ymm2 # sched: [5:1.00]
1344 ; SANDY-NEXT: vmaskmovpd %ymm1, %ymm0, (%rdi)
1343 ; SANDY-NEXT: vmaskmovpd (%rdi), %ymm0, %ymm2 # sched: [9:1.00]
1344 ; SANDY-NEXT: vmaskmovpd %ymm1, %ymm0, (%rdi) # sched: [5:1.00]
13451345 ; SANDY-NEXT: vmovapd %ymm2, %ymm0 # sched: [1:1.00]
13461346 ; SANDY-NEXT: retq # sched: [1:1.00]
13471347 ;
13751375 define <4 x float> @test_maskmovps(i8* %a0, <4 x i32> %a1, <4 x float> %a2) {
13761376 ; GENERIC-LABEL: test_maskmovps:
13771377 ; GENERIC: # BB#0:
1378 ; GENERIC-NEXT: vmaskmovps (%rdi), %xmm0, %xmm2 # sched: [8:2.00]
1378 ; GENERIC-NEXT: vmaskmovps (%rdi), %xmm0, %xmm2 # sched: [8:1.00]
13791379 ; GENERIC-NEXT: vmaskmovps %xmm1, %xmm0, (%rdi) # sched: [5:1.00]
13801380 ; GENERIC-NEXT: vmovaps %xmm2, %xmm0 # sched: [1:1.00]
13811381 ; GENERIC-NEXT: retq # sched: [1:1.00]
13821382 ;
13831383 ; SANDY-LABEL: test_maskmovps:
13841384 ; SANDY: # BB#0:
1385 ; SANDY-NEXT: vmaskmovps (%rdi), %xmm0, %xmm2 # sched: [8:2.00]
1385 ; SANDY-NEXT: vmaskmovps (%rdi), %xmm0, %xmm2 # sched: [8:1.00]
13861386 ; SANDY-NEXT: vmaskmovps %xmm1, %xmm0, (%rdi) # sched: [5:1.00]
13871387 ; SANDY-NEXT: vmovaps %xmm2, %xmm0 # sched: [1:1.00]
13881388 ; SANDY-NEXT: retq # sched: [1:1.00]
14171417 define <8 x float> @test_maskmovps_ymm(i8* %a0, <8 x i32> %a1, <8 x float> %a2) {
14181418 ; GENERIC-LABEL: test_maskmovps_ymm:
14191419 ; GENERIC: # BB#0:
1420 ; GENERIC-NEXT: vmaskmovps (%rdi), %ymm0, %ymm2 # sched: [1:0.50]
1421 ; GENERIC-NEXT: vmaskmovps %ymm1, %ymm0, (%rdi)
1420 ; GENERIC-NEXT: vmaskmovps (%rdi), %ymm0, %ymm2 # sched: [9:1.00]
1421 ; GENERIC-NEXT: vmaskmovps %ymm1, %ymm0, (%rdi) # sched: [5:1.00]
14221422 ; GENERIC-NEXT: vmovaps %ymm2, %ymm0 # sched: [1:1.00]
14231423 ; GENERIC-NEXT: retq # sched: [1:1.00]
14241424 ;
14251425 ; SANDY-LABEL: test_maskmovps_ymm:
14261426 ; SANDY: # BB#0:
1427 ; SANDY-NEXT: vmaskmovps (%rdi), %ymm0, %ymm2 # sched: [1:0.50]
1428 ; SANDY-NEXT: vmaskmovps %ymm1, %ymm0, (%rdi)
1427 ; SANDY-NEXT: vmaskmovps (%rdi), %ymm0, %ymm2 # sched: [9:1.00]
1428 ; SANDY-NEXT: vmaskmovps %ymm1, %ymm0, (%rdi) # sched: [5:1.00]
14291429 ; SANDY-NEXT: vmovaps %ymm2, %ymm0 # sched: [1:1.00]
14301430 ; SANDY-NEXT: retq # sched: [1:1.00]
14311431 ;
15341534 ; GENERIC-LABEL: test_minpd:
15351535 ; GENERIC: # BB#0:
15361536 ; GENERIC-NEXT: vminpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
1537 ; GENERIC-NEXT: vminpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1537 ; GENERIC-NEXT: vminpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00]
15381538 ; GENERIC-NEXT: retq # sched: [1:1.00]
15391539 ;
15401540 ; SANDY-LABEL: test_minpd:
15411541 ; SANDY: # BB#0:
15421542 ; SANDY-NEXT: vminpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
1543 ; SANDY-NEXT: vminpd (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1543 ; SANDY-NEXT: vminpd (%rdi), %ymm0, %ymm0 # sched: [10:1.00]
15441544 ; SANDY-NEXT: retq # sched: [1:1.00]
15451545 ;
15461546 ; HASWELL-LABEL: test_minpd:
15711571 ; GENERIC-LABEL: test_minps:
15721572 ; GENERIC: # BB#0:
15731573 ; GENERIC-NEXT: vminps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
1574 ; GENERIC-NEXT: vminps (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1574 ; GENERIC-NEXT: vminps (%rdi), %ymm0, %ymm0 # sched: [10:1.00]
15751575 ; GENERIC-NEXT: retq # sched: [1:1.00]
15761576 ;
15771577 ; SANDY-LABEL: test_minps:
15781578 ; SANDY: # BB#0:
15791579 ; SANDY-NEXT: vminps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
1580 ; SANDY-NEXT: vminps (%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1580 ; SANDY-NEXT: vminps (%rdi), %ymm0, %ymm0 # sched: [10:1.00]
15811581 ; SANDY-NEXT: retq # sched: [1:1.00]
15821582 ;
15831583 ; HASWELL-LABEL: test_minps:
17651765 define i32 @test_movmskps(<8 x float> %a0) {
17661766 ; GENERIC-LABEL: test_movmskps:
17671767 ; GENERIC: # BB#0:
1768 ; GENERIC-NEXT: vmovmskps %ymm0, %eax # sched: [3:1.00]
1768 ; GENERIC-NEXT: vmovmskps %ymm0, %eax # sched: [2:1.00]
17691769 ; GENERIC-NEXT: vzeroupper
17701770 ; GENERIC-NEXT: retq # sched: [1:1.00]
17711771 ;
17721772 ; SANDY-LABEL: test_movmskps:
17731773 ; SANDY: # BB#0:
1774 ; SANDY-NEXT: vmovmskps %ymm0, %eax # sched: [3:1.00]
1774 ; SANDY-NEXT: vmovmskps %ymm0, %eax # sched: [2:1.00]
17751775 ; SANDY-NEXT: vzeroupper
17761776 ; SANDY-NEXT: retq # sched: [1:1.00]
17771777 ;
19611961 ; SANDY-LABEL: test_movupd:
19621962 ; SANDY: # BB#0:
19631963 ; SANDY-NEXT: vmovups (%rdi), %xmm0 # sched: [6:0.50]
1964 ; SANDY-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 # sched: [7:1.00]
1964 ; SANDY-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 # sched: [7:0.50]
19651965 ; SANDY-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [3:1.00]
19661966 ; SANDY-NEXT: vextractf128 $1, %ymm0, 16(%rsi) # sched: [5:1.00]
19671967 ; SANDY-NEXT: vmovupd %xmm0, (%rsi) # sched: [5:1.00]
20042004 ; SANDY-LABEL: test_movups:
20052005 ; SANDY: # BB#0:
20062006 ; SANDY-NEXT: vmovups (%rdi), %xmm0 # sched: [6:0.50]
2007 ; SANDY-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 # sched: [7:1.00]
2007 ; SANDY-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 # sched: [7:0.50]
20082008 ; SANDY-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [3:1.00]
20092009 ; SANDY-NEXT: vextractf128 $1, %ymm0, 16(%rsi) # sched: [5:1.00]
20102010 ; SANDY-NEXT: vmovups %xmm0, (%rsi) # sched: [5:1.00]
22452245 define <4 x double> @test_permilpd_ymm(<4 x double> %a0, <4 x double> *%a1) {
22462246 ; GENERIC-LABEL: test_permilpd_ymm:
22472247 ; GENERIC: # BB#0:
2248 ; GENERIC-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] sched: [8:1.00]
2249 ; GENERIC-NEXT: vpermilpd {{.*#+}} ymm1 = mem[1,0,2,3] sched: [5:1.00]
2248 ; GENERIC-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] sched: [1:1.00]
2249 ; GENERIC-NEXT: vpermilpd {{.*#+}} ymm1 = mem[1,0,2,3] sched: [8:1.00]
22502250 ; GENERIC-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
22512251 ; GENERIC-NEXT: retq # sched: [1:1.00]
22522252 ;
22532253 ; SANDY-LABEL: test_permilpd_ymm:
22542254 ; SANDY: # BB#0:
2255 ; SANDY-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] sched: [8:1.00]
2256 ; SANDY-NEXT: vpermilpd {{.*#+}} ymm1 = mem[1,0,2,3] sched: [5:1.00]
2255 ; SANDY-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] sched: [1:1.00]
2256 ; SANDY-NEXT: vpermilpd {{.*#+}} ymm1 = mem[1,0,2,3] sched: [8:1.00]
22572257 ; SANDY-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
22582258 ; SANDY-NEXT: retq # sched: [1:1.00]
22592259 ;
23292329 define <8 x float> @test_permilps_ymm(<8 x float> %a0, <8 x float> *%a1) {
23302330 ; GENERIC-LABEL: test_permilps_ymm:
23312331 ; GENERIC: # BB#0:
2332 ; GENERIC-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] sched: [8:1.00]
2333 ; GENERIC-NEXT: vpermilps {{.*#+}} ymm1 = mem[3,2,1,0,7,6,5,4] sched: [5:1.00]
2332 ; GENERIC-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] sched: [1:1.00]
2333 ; GENERIC-NEXT: vpermilps {{.*#+}} ymm1 = mem[3,2,1,0,7,6,5,4] sched: [8:1.00]
23342334 ; GENERIC-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
23352335 ; GENERIC-NEXT: retq # sched: [1:1.00]
23362336 ;
23372337 ; SANDY-LABEL: test_permilps_ymm:
23382338 ; SANDY: # BB#0:
2339 ; SANDY-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] sched: [8:1.00]
2340 ; SANDY-NEXT: vpermilps {{.*#+}} ymm1 = mem[3,2,1,0,7,6,5,4] sched: [5:1.00]
2339 ; SANDY-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] sched: [1:1.00]
2340 ; SANDY-NEXT: vpermilps {{.*#+}} ymm1 = mem[3,2,1,0,7,6,5,4] sched: [8:1.00]
23412341 ; SANDY-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
23422342 ; SANDY-NEXT: retq # sched: [1:1.00]
23432343 ;
23722372 ; GENERIC-LABEL: test_permilvarpd:
23732373 ; GENERIC: # BB#0:
23742374 ; GENERIC-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
2375 ; GENERIC-NEXT: vpermilpd (%rdi), %xmm0, %xmm0 # sched: [1:1.00]
2375 ; GENERIC-NEXT: vpermilpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
23762376 ; GENERIC-NEXT: retq # sched: [1:1.00]
23772377 ;
23782378 ; SANDY-LABEL: test_permilvarpd:
23792379 ; SANDY: # BB#0:
23802380 ; SANDY-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
2381 ; SANDY-NEXT: vpermilpd (%rdi), %xmm0, %xmm0 # sched: [1:1.00]
2381 ; SANDY-NEXT: vpermilpd (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
23822382 ; SANDY-NEXT: retq # sched: [1:1.00]
23832383 ;
23842384 ; HASWELL-LABEL: test_permilvarpd:
24092409 ; GENERIC-LABEL: test_permilvarpd_ymm:
24102410 ; GENERIC: # BB#0:
24112411 ; GENERIC-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
2412 ; GENERIC-NEXT: vpermilpd (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
2412 ; GENERIC-NEXT: vpermilpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
24132413 ; GENERIC-NEXT: retq # sched: [1:1.00]
24142414 ;
24152415 ; SANDY-LABEL: test_permilvarpd_ymm:
24162416 ; SANDY: # BB#0:
24172417 ; SANDY-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
2418 ; SANDY-NEXT: vpermilpd (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
2418 ; SANDY-NEXT: vpermilpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
24192419 ; SANDY-NEXT: retq # sched: [1:1.00]
24202420 ;
24212421 ; HASWELL-LABEL: test_permilvarpd_ymm:
24462446 ; GENERIC-LABEL: test_permilvarps:
24472447 ; GENERIC: # BB#0:
24482448 ; GENERIC-NEXT: vpermilps %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
2449 ; GENERIC-NEXT: vpermilps (%rdi), %xmm0, %xmm0 # sched: [1:1.00]
2449 ; GENERIC-NEXT: vpermilps (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
24502450 ; GENERIC-NEXT: retq # sched: [1:1.00]
24512451 ;
24522452 ; SANDY-LABEL: test_permilvarps:
24532453 ; SANDY: # BB#0:
24542454 ; SANDY-NEXT: vpermilps %xmm1, %xmm0, %xmm0 # sched: [1:1.00]
2455 ; SANDY-NEXT: vpermilps (%rdi), %xmm0, %xmm0 # sched: [1:1.00]
2455 ; SANDY-NEXT: vpermilps (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
24562456 ; SANDY-NEXT: retq # sched: [1:1.00]
24572457 ;
24582458 ; HASWELL-LABEL: test_permilvarps:
24832483 ; GENERIC-LABEL: test_permilvarps_ymm:
24842484 ; GENERIC: # BB#0:
24852485 ; GENERIC-NEXT: vpermilps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
2486 ; GENERIC-NEXT: vpermilps (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
2486 ; GENERIC-NEXT: vpermilps (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
24872487 ; GENERIC-NEXT: retq # sched: [1:1.00]
24882488 ;
24892489 ; SANDY-LABEL: test_permilvarps_ymm:
24902490 ; SANDY: # BB#0:
24912491 ; SANDY-NEXT: vpermilps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
2492 ; SANDY-NEXT: vpermilps (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
2492 ; SANDY-NEXT: vpermilps (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
24932493 ; SANDY-NEXT: retq # sched: [1:1.00]
24942494 ;
24952495 ; HASWELL-LABEL: test_permilvarps_ymm:
25192519 define <8 x float> @test_rcpps(<8 x float> %a0, <8 x float> *%a1) {
25202520 ; GENERIC-LABEL: test_rcpps:
25212521 ; GENERIC: # BB#0:
2522 ; GENERIC-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:1.00]
2523 ; GENERIC-NEXT: vrcpps (%rdi), %ymm1 # sched: [9:1.00]
2522 ; GENERIC-NEXT: vrcpps (%rdi), %ymm1 # sched: [14:2.00]
2523 ; GENERIC-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00]
25242524 ; GENERIC-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
25252525 ; GENERIC-NEXT: retq # sched: [1:1.00]
25262526 ;
25272527 ; SANDY-LABEL: test_rcpps:
25282528 ; SANDY: # BB#0:
2529 ; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:1.00]
2530 ; SANDY-NEXT: vrcpps (%rdi), %ymm1 # sched: [9:1.00]
2529 ; SANDY-NEXT: vrcpps (%rdi), %ymm1 # sched: [14:2.00]
2530 ; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00]
25312531 ; SANDY-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
25322532 ; SANDY-NEXT: retq # sched: [1:1.00]
25332533 ;
25632563 ; GENERIC-LABEL: test_roundpd:
25642564 ; GENERIC: # BB#0:
25652565 ; GENERIC-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [3:1.00]
2566 ; GENERIC-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [7:1.00]
2566 ; GENERIC-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [10:1.00]
25672567 ; GENERIC-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
25682568 ; GENERIC-NEXT: retq # sched: [1:1.00]
25692569 ;
25702570 ; SANDY-LABEL: test_roundpd:
25712571 ; SANDY: # BB#0:
25722572 ; SANDY-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [3:1.00]
2573 ; SANDY-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [7:1.00]
2573 ; SANDY-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [10:1.00]
25742574 ; SANDY-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
25752575 ; SANDY-NEXT: retq # sched: [1:1.00]
25762576 ;
26062606 ; GENERIC-LABEL: test_roundps:
26072607 ; GENERIC: # BB#0:
26082608 ; GENERIC-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [3:1.00]
2609 ; GENERIC-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [7:1.00]
2609 ; GENERIC-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [10:1.00]
26102610 ; GENERIC-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
26112611 ; GENERIC-NEXT: retq # sched: [1:1.00]
26122612 ;
26132613 ; SANDY-LABEL: test_roundps:
26142614 ; SANDY: # BB#0:
26152615 ; SANDY-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [3:1.00]
2616 ; SANDY-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [7:1.00]
2616 ; SANDY-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [10:1.00]
26172617 ; SANDY-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
26182618 ; SANDY-NEXT: retq # sched: [1:1.00]
26192619 ;
26482648 define <8 x float> @test_rsqrtps(<8 x float> %a0, <8 x float> *%a1) {
26492649 ; GENERIC-LABEL: test_rsqrtps:
26502650 ; GENERIC: # BB#0:
2651 ; GENERIC-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [14:3.00]
2652 ; GENERIC-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [7:3.00]
2651 ; GENERIC-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [14:2.00]
2652 ; GENERIC-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [7:2.00]
26532653 ; GENERIC-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
26542654 ; GENERIC-NEXT: retq # sched: [1:1.00]
26552655 ;
26562656 ; SANDY-LABEL: test_rsqrtps:
26572657 ; SANDY: # BB#0:
2658 ; SANDY-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [14:3.00]
2659 ; SANDY-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [7:3.00]
2658 ; SANDY-NEXT: vrsqrtps (%rdi), %ymm1 # sched: [14:2.00]
2659 ; SANDY-NEXT: vrsqrtps %ymm0, %ymm0 # sched: [7:2.00]
26602660 ; SANDY-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
26612661 ; SANDY-NEXT: retq # sched: [1:1.00]
26622662 ;
27692769 define <4 x double> @test_sqrtpd(<4 x double> %a0, <4 x double> *%a1) {
27702770 ; GENERIC-LABEL: test_sqrtpd:
27712771 ; GENERIC: # BB#0:
2772 ; GENERIC-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [52:3.00]
2773 ; GENERIC-NEXT: vsqrtpd %ymm0, %ymm0 # sched: [45:3.00]
2772 ; GENERIC-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [52:2.00]
2773 ; GENERIC-NEXT: vsqrtpd %ymm0, %ymm0 # sched: [45:2.00]
27742774 ; GENERIC-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
27752775 ; GENERIC-NEXT: retq # sched: [1:1.00]
27762776 ;
27772777 ; SANDY-LABEL: test_sqrtpd:
27782778 ; SANDY: # BB#0:
2779 ; SANDY-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [52:3.00]
2780 ; SANDY-NEXT: vsqrtpd %ymm0, %ymm0 # sched: [45:3.00]
2779 ; SANDY-NEXT: vsqrtpd (%rdi), %ymm1 # sched: [52:2.00]
2780 ; SANDY-NEXT: vsqrtpd %ymm0, %ymm0 # sched: [45:2.00]
27812781 ; SANDY-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
27822782 ; SANDY-NEXT: retq # sched: [1:1.00]
27832783 ;
28122812 define <8 x float> @test_sqrtps(<8 x float> %a0, <8 x float> *%a1) {
28132813 ; GENERIC-LABEL: test_sqrtps:
28142814 ; GENERIC: # BB#0:
2815 ; GENERIC-NEXT: vsqrtps (%rdi), %ymm1 # sched: [36:3.00]
2816 ; GENERIC-NEXT: vsqrtps %ymm0, %ymm0 # sched: [29:3.00]
2815 ; GENERIC-NEXT: vsqrtps (%rdi), %ymm1 # sched: [36:2.00]
2816 ; GENERIC-NEXT: vsqrtps %ymm0, %ymm0 # sched: [29:2.00]
28172817 ; GENERIC-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
28182818 ; GENERIC-NEXT: retq # sched: [1:1.00]
28192819 ;
28202820 ; SANDY-LABEL: test_sqrtps:
28212821 ; SANDY: # BB#0:
2822 ; SANDY-NEXT: vsqrtps (%rdi), %ymm1 # sched: [36:3.00]
2823 ; SANDY-NEXT: vsqrtps %ymm0, %ymm0 # sched: [29:3.00]
2822 ; SANDY-NEXT: vsqrtps (%rdi), %ymm1 # sched: [36:2.00]
2823 ; SANDY-NEXT: vsqrtps %ymm0, %ymm0 # sched: [29:2.00]
28242824 ; SANDY-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
28252825 ; SANDY-NEXT: retq # sched: [1:1.00]
28262826 ;
29292929 ; GENERIC: # BB#0:
29302930 ; GENERIC-NEXT: xorl %eax, %eax # sched: [1:0.33]
29312931 ; GENERIC-NEXT: vtestpd %xmm1, %xmm0 # sched: [1:1.00]
2932 ; GENERIC-NEXT: setb %al # sched: [1:1.00]
2932 ; GENERIC-NEXT: setb %al # sched: [1:0.50]
29332933 ; GENERIC-NEXT: vtestpd (%rdi), %xmm0 # sched: [7:1.00]
2934 ; GENERIC-NEXT: adcl $0, %eax # sched: [1:0.33]
2934 ; GENERIC-NEXT: adcl $0, %eax # sched: [2:0.67]
29352935 ; GENERIC-NEXT: retq # sched: [1:1.00]
29362936 ;
29372937 ; SANDY-LABEL: test_testpd:
29382938 ; SANDY: # BB#0:
29392939 ; SANDY-NEXT: xorl %eax, %eax # sched: [1:0.33]
29402940 ; SANDY-NEXT: vtestpd %xmm1, %xmm0 # sched: [1:1.00]
2941 ; SANDY-NEXT: setb %al # sched: [1:1.00]
2941 ; SANDY-NEXT: setb %al # sched: [1:0.50]
29422942 ; SANDY-NEXT: vtestpd (%rdi), %xmm0 # sched: [7:1.00]
2943 ; SANDY-NEXT: adcl $0, %eax # sched: [1:0.33]
2943 ; SANDY-NEXT: adcl $0, %eax # sched: [2:0.67]
29442944 ; SANDY-NEXT: retq # sched: [1:1.00]
29452945 ;
29462946 ; HASWELL-LABEL: test_testpd:
29822982 ; GENERIC: # BB#0:
29832983 ; GENERIC-NEXT: xorl %eax, %eax # sched: [1:0.33]
29842984 ; GENERIC-NEXT: vtestpd %ymm1, %ymm0 # sched: [1:1.00]
2985 ; GENERIC-NEXT: setb %al # sched: [1:1.00]
2985 ; GENERIC-NEXT: setb %al # sched: [1:0.50]
29862986 ; GENERIC-NEXT: vtestpd (%rdi), %ymm0 # sched: [8:1.00]
2987 ; GENERIC-NEXT: adcl $0, %eax # sched: [1:0.33]
2987 ; GENERIC-NEXT: adcl $0, %eax # sched: [2:0.67]
29882988 ; GENERIC-NEXT: vzeroupper
29892989 ; GENERIC-NEXT: retq # sched: [1:1.00]
29902990 ;
29922992 ; SANDY: # BB#0:
29932993 ; SANDY-NEXT: xorl %eax, %eax # sched: [1:0.33]
29942994 ; SANDY-NEXT: vtestpd %ymm1, %ymm0 # sched: [1:1.00]
2995 ; SANDY-NEXT: setb %al # sched: [1:1.00]
2995 ; SANDY-NEXT: setb %al # sched: [1:0.50]
29962996 ; SANDY-NEXT: vtestpd (%rdi), %ymm0 # sched: [8:1.00]
2997 ; SANDY-NEXT: adcl $0, %eax # sched: [1:0.33]
2997 ; SANDY-NEXT: adcl $0, %eax # sched: [2:0.67]
29982998 ; SANDY-NEXT: vzeroupper
29992999 ; SANDY-NEXT: retq # sched: [1:1.00]
30003000 ;
30393039 ; GENERIC: # BB#0:
30403040 ; GENERIC-NEXT: xorl %eax, %eax # sched: [1:0.33]
30413041 ; GENERIC-NEXT: vtestps %xmm1, %xmm0 # sched: [1:1.00]
3042 ; GENERIC-NEXT: setb %al # sched: [1:1.00]
3042 ; GENERIC-NEXT: setb %al # sched: [1:0.50]
30433043 ; GENERIC-NEXT: vtestps (%rdi), %xmm0 # sched: [7:1.00]
3044 ; GENERIC-NEXT: adcl $0, %eax # sched: [1:0.33]
3044 ; GENERIC-NEXT: adcl $0, %eax # sched: [2:0.67]
30453045 ; GENERIC-NEXT: retq # sched: [1:1.00]
30463046 ;
30473047 ; SANDY-LABEL: test_testps:
30483048 ; SANDY: # BB#0:
30493049 ; SANDY-NEXT: xorl %eax, %eax # sched: [1:0.33]
30503050 ; SANDY-NEXT: vtestps %xmm1, %xmm0 # sched: [1:1.00]
3051 ; SANDY-NEXT: setb %al # sched: [1:1.00]
3051 ; SANDY-NEXT: setb %al # sched: [1:0.50]
30523052 ; SANDY-NEXT: vtestps (%rdi), %xmm0 # sched: [7:1.00]
3053 ; SANDY-NEXT: adcl $0, %eax # sched: [1:0.33]
3053 ; SANDY-NEXT: adcl $0, %eax # sched: [2:0.67]
30543054 ; SANDY-NEXT: retq # sched: [1:1.00]
30553055 ;
30563056 ; HASWELL-LABEL: test_testps:
30923092 ; GENERIC: # BB#0:
30933093 ; GENERIC-NEXT: xorl %eax, %eax # sched: [1:0.33]
30943094 ; GENERIC-NEXT: vtestps %ymm1, %ymm0 # sched: [1:1.00]
3095 ; GENERIC-NEXT: setb %al # sched: [1:1.00]
3095 ; GENERIC-NEXT: setb %al # sched: [1:0.50]
30963096 ; GENERIC-NEXT: vtestps (%rdi), %ymm0 # sched: [8:1.00]
3097 ; GENERIC-NEXT: adcl $0, %eax # sched: [1:0.33]
3097 ; GENERIC-NEXT: adcl $0, %eax # sched: [2:0.67]
30983098 ; GENERIC-NEXT: vzeroupper
30993099 ; GENERIC-NEXT: retq # sched: [1:1.00]
31003100 ;
31023102 ; SANDY: # BB#0:
31033103 ; SANDY-NEXT: xorl %eax, %eax # sched: [1:0.33]
31043104 ; SANDY-NEXT: vtestps %ymm1, %ymm0 # sched: [1:1.00]
3105 ; SANDY-NEXT: setb %al # sched: [1:1.00]
3105 ; SANDY-NEXT: setb %al # sched: [1:0.50]
31063106 ; SANDY-NEXT: vtestps (%rdi), %ymm0 # sched: [8:1.00]
3107 ; SANDY-NEXT: adcl $0, %eax # sched: [1:0.33]
3107 ; SANDY-NEXT: adcl $0, %eax # sched: [2:0.67]
31083108 ; SANDY-NEXT: vzeroupper
31093109 ; SANDY-NEXT: retq # sched: [1:1.00]
31103110 ;
31483148 ; GENERIC-LABEL: test_unpckhpd:
31493149 ; GENERIC: # BB#0:
31503150 ; GENERIC-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3] sched: [1:1.00]
3151 ; GENERIC-NEXT: vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3] sched: [5:1.00]
3151 ; GENERIC-NEXT: vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3] sched: [8:1.00]
31523152 ; GENERIC-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
31533153 ; GENERIC-NEXT: retq # sched: [1:1.00]
31543154 ;
31553155 ; SANDY-LABEL: test_unpckhpd:
31563156 ; SANDY: # BB#0:
31573157 ; SANDY-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3] sched: [1:1.00]
3158 ; SANDY-NEXT: vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3] sched: [5:1.00]
3158 ; SANDY-NEXT: vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3] sched: [8:1.00]
31593159 ; SANDY-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [3:1.00]
31603160 ; SANDY-NEXT: retq # sched: [1:1.00]
31613161 ;
31903190 ; GENERIC-LABEL: test_unpckhps:
31913191 ; GENERIC: # BB#0:
31923192 ; GENERIC-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] sched: [1:1.00]
3193 ; GENERIC-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],mem[2],ymm0[3],mem[3],ymm0[6],mem[6],ymm0[7],mem[7] sched: [5:1.00]
3193 ; GENERIC-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],mem[2],ymm0[3],mem[3],ymm0[6],mem[6],ymm0[7],mem[7] sched: [8:1.00]
31943194 ; GENERIC-NEXT: retq # sched: [1:1.00]
31953195 ;
31963196 ; SANDY-LABEL: test_unpckhps:
31973197 ; SANDY: # BB#0:
31983198 ; SANDY-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] sched: [1:1.00]
3199 ; SANDY-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],mem[2],ymm0[3],mem[3],ymm0[6],mem[6],ymm0[7],mem[7] sched: [5:1.00]
3199 ; SANDY-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],mem[2],ymm0[3],mem[3],ymm0[6],mem[6],ymm0[7],mem[7] sched: [8:1.00]
32003200 ; SANDY-NEXT: retq # sched: [1:1.00]
32013201 ;
32023202 ; HASWELL-LABEL: test_unpckhps:
33043304 ; GENERIC-LABEL: test_xorpd:
33053305 ; GENERIC: # BB#0:
33063306 ; GENERIC-NEXT: vxorpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
3307 ; GENERIC-NEXT: vxorpd (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
3307 ; GENERIC-NEXT: vxorpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
33083308 ; GENERIC-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
33093309 ; GENERIC-NEXT: retq # sched: [1:1.00]
33103310 ;
33113311 ; SANDY-LABEL: test_xorpd:
33123312 ; SANDY: # BB#0:
33133313 ; SANDY-NEXT: vxorpd %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
3314 ; SANDY-NEXT: vxorpd (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
3314 ; SANDY-NEXT: vxorpd (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
33153315 ; SANDY-NEXT: vaddpd %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
33163316 ; SANDY-NEXT: retq # sched: [1:1.00]
33173317 ;
33503350 ; GENERIC-LABEL: test_xorps:
33513351 ; GENERIC: # BB#0:
33523352 ; GENERIC-NEXT: vxorps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
3353 ; GENERIC-NEXT: vxorps (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
3353 ; GENERIC-NEXT: vxorps (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
33543354 ; GENERIC-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
33553355 ; GENERIC-NEXT: retq # sched: [1:1.00]
33563356 ;
33573357 ; SANDY-LABEL: test_xorps:
33583358 ; SANDY: # BB#0:
33593359 ; SANDY-NEXT: vxorps %ymm1, %ymm0, %ymm0 # sched: [1:1.00]
3360 ; SANDY-NEXT: vxorps (%rdi), %ymm0, %ymm0 # sched: [5:1.00]
3360 ; SANDY-NEXT: vxorps (%rdi), %ymm0, %ymm0 # sched: [8:1.00]
33613361 ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
33623362 ; SANDY-NEXT: retq # sched: [1:1.00]
33633363 ;
1010 ; GENERIC: # BB#0:
1111 ; GENERIC-NEXT: andnl %esi, %edi, %eax # sched: [1:0.33]
1212 ; GENERIC-NEXT: notl %edi # sched: [1:0.33]
13 ; GENERIC-NEXT: andw (%rdx), %di # sched: [5:0.50]
13 ; GENERIC-NEXT: andw (%rdx), %di # sched: [6:0.50]
1414 ; GENERIC-NEXT: addl %edi, %eax # sched: [1:0.33]
1515 ; GENERIC-NEXT: # kill: %AX %AX %EAX
1616 ; GENERIC-NEXT: retq # sched: [1:1.00]
1212 define i16 @test_ctpop_i16(i16 zeroext %a0, i16 *%a1) {
1313 ; GENERIC-LABEL: test_ctpop_i16:
1414 ; GENERIC: # BB#0:
15 ; GENERIC-NEXT: popcntw (%rsi), %cx # sched: [7:1.00]
15 ; GENERIC-NEXT: popcntw (%rsi), %cx # sched: [9:1.00]
1616 ; GENERIC-NEXT: popcntw %di, %ax # sched: [3:1.00]
1717 ; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
1818 ; GENERIC-NEXT: # kill: %AX %AX %EAX
2828 ;
2929 ; SANDY-LABEL: test_ctpop_i16:
3030 ; SANDY: # BB#0:
31 ; SANDY-NEXT: popcntw (%rsi), %cx # sched: [7:1.00]
31 ; SANDY-NEXT: popcntw (%rsi), %cx # sched: [9:1.00]
3232 ; SANDY-NEXT: popcntw %di, %ax # sched: [3:1.00]
3333 ; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
3434 ; SANDY-NEXT: # kill: %AX %AX %EAX
6868 define i32 @test_ctpop_i32(i32 %a0, i32 *%a1) {
6969 ; GENERIC-LABEL: test_ctpop_i32:
7070 ; GENERIC: # BB#0:
71 ; GENERIC-NEXT: popcntl (%rsi), %ecx # sched: [7:1.00]
71 ; GENERIC-NEXT: popcntl (%rsi), %ecx # sched: [9:1.00]
7272 ; GENERIC-NEXT: popcntl %edi, %eax # sched: [3:1.00]
7373 ; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
7474 ; GENERIC-NEXT: retq # sched: [1:1.00]
8282 ;
8383 ; SANDY-LABEL: test_ctpop_i32:
8484 ; SANDY: # BB#0:
85 ; SANDY-NEXT: popcntl (%rsi), %ecx # sched: [7:1.00]
85 ; SANDY-NEXT: popcntl (%rsi), %ecx # sched: [9:1.00]
8686 ; SANDY-NEXT: popcntl %edi, %eax # sched: [3:1.00]
8787 ; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
8888 ; SANDY-NEXT: retq # sched: [1:1.00]
5959 ; SSE2-BROKEN-NEXT: Lcfi2:
6060 ; SSE2-BROKEN-NEXT: .cfi_def_cfa_register %rbp
6161 ; SSE2-BROKEN-NEXT: fnstcw -4(%rbp)
62 ; SSE2-BROKEN-NEXT: fldt 16(%rbp)
6263 ; SSE2-BROKEN-NEXT: movzwl -4(%rbp), %eax
6364 ; SSE2-BROKEN-NEXT: movw $3199, -4(%rbp) ## imm = 0xC7F
6465 ; SSE2-BROKEN-NEXT: fldcw -4(%rbp)
65 ; SSE2-BROKEN-NEXT: fldt 16(%rbp)
6666 ; SSE2-BROKEN-NEXT: movw %ax, -4(%rbp)
6767 ; SSE2-BROKEN-NEXT: fistl -8(%rbp)
6868 ; SSE2-BROKEN-NEXT: fldcw -4(%rbp)
7070 ; SSE2-BROKEN-NEXT: movsd %xmm0, -64(%rbp)
7171 ; SSE2-BROKEN-NEXT: movsd %xmm0, -32(%rbp)
7272 ; SSE2-BROKEN-NEXT: fsubl -32(%rbp)
73 ; SSE2-BROKEN-NEXT: flds {{.*}}(%rip)
7374 ; SSE2-BROKEN-NEXT: fnstcw -2(%rbp)
74 ; SSE2-BROKEN-NEXT: flds {{.*}}(%rip)
75 ; SSE2-BROKEN-NEXT: fmul %st(0), %st(1)
7576 ; SSE2-BROKEN-NEXT: movzwl -2(%rbp), %eax
7677 ; SSE2-BROKEN-NEXT: movw $3199, -2(%rbp) ## imm = 0xC7F
7778 ; SSE2-BROKEN-NEXT: fldcw -2(%rbp)
78 ; SSE2-BROKEN-NEXT: fmul %st(0), %st(1)
7979 ; SSE2-BROKEN-NEXT: movw %ax, -2(%rbp)
8080 ; SSE2-BROKEN-NEXT: fxch %st(1)
8181 ; SSE2-BROKEN-NEXT: fistl -12(%rbp)
349349 ;
350350 ; SANDY-LABEL: v4f32_one_step:
351351 ; SANDY: # BB#0:
352 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [7:3.00]
352 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
353353 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
354354 ; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
355355 ; SANDY-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00]
452452 ;
453453 ; SANDY-LABEL: v4f32_two_step:
454454 ; SANDY: # BB#0:
455 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [7:3.00]
455 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
456456 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:1.00]
457457 ; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
458458 ; SANDY-NEXT: vsubps %xmm2, %xmm3, %xmm2 # sched: [3:1.00]
546546 ; SANDY-LABEL: v8f32_no_estimate:
547547 ; SANDY: # BB#0:
548548 ; SANDY-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
549 ; SANDY-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [29:3.00]
549 ; SANDY-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [29:2.00]
550550 ; SANDY-NEXT: retq # sched: [1:1.00]
551551 ;
552552 ; HASWELL-LABEL: v8f32_no_estimate:
618618 ;
619619 ; SANDY-LABEL: v8f32_one_step:
620620 ; SANDY: # BB#0:
621 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:1.00]
621 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
622622 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00]
623623 ; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
624624 ; SANDY-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00]
734734 ;
735735 ; SANDY-LABEL: v8f32_two_step:
736736 ; SANDY: # BB#0:
737 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:1.00]
737 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
738738 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:1.00]
739739 ; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
740740 ; SANDY-NEXT: vsubps %ymm2, %ymm3, %ymm2 # sched: [3:1.00]
402402 ;
403403 ; SANDY-LABEL: v4f32_one_step2:
404404 ; SANDY: # BB#0:
405 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [7:3.00]
405 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
406406 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
407407 ; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
408408 ; SANDY-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00]
500500 ;
501501 ; SANDY-LABEL: v4f32_one_step_2_divs:
502502 ; SANDY: # BB#0:
503 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [7:3.00]
503 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
504504 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
505505 ; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
506506 ; SANDY-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00]
618618 ;
619619 ; SANDY-LABEL: v4f32_two_step2:
620620 ; SANDY: # BB#0:
621 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [7:3.00]
621 ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
622622 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:1.00]
623623 ; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
624624 ; SANDY-NEXT: vsubps %xmm2, %xmm3, %xmm2 # sched: [3:1.00]
738738 ;
739739 ; SANDY-LABEL: v8f32_one_step2:
740740 ; SANDY: # BB#0:
741 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:1.00]
741 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
742742 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00]
743743 ; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
744744 ; SANDY-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00]
845845 ;
846846 ; SANDY-LABEL: v8f32_one_step_2_divs:
847847 ; SANDY: # BB#0:
848 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:1.00]
848 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
849849 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00]
850850 ; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
851851 ; SANDY-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00]
977977 ;
978978 ; SANDY-LABEL: v8f32_two_step2:
979979 ; SANDY: # BB#0:
980 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:1.00]
980 ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
981981 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:1.00]
982982 ; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
983983 ; SANDY-NEXT: vsubps %ymm2, %ymm3, %ymm2 # sched: [3:1.00]
10681068 ;
10691069 ; SANDY-LABEL: v8f32_no_step:
10701070 ; SANDY: # BB#0:
1071 ; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:1.00]
1071 ; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00]
10721072 ; SANDY-NEXT: retq # sched: [1:1.00]
10731073 ;
10741074 ; HASWELL-LABEL: v8f32_no_step:
11231123 ;
11241124 ; SANDY-LABEL: v8f32_no_step2:
11251125 ; SANDY: # BB#0:
1126 ; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [5:1.00]
1126 ; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00]
11271127 ; SANDY-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00]
11281128 ; SANDY-NEXT: retq # sched: [1:1.00]
11291129 ;
333333 ; GENERIC-LABEL: test_comiss: