llvm.org GIT mirror llvm / 273f7e4
Detect and handle COPY in many places. This code is transitional, it will soon be possible to eliminate isExtractSubreg, isInsertSubreg, and isMoveInstr in most places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107547 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 9 years ago
10 changed file(s) with 73 addition(s) and 40 deletion(s). Raw diff Collapse all Expand all
230230 return getOpcode() == TargetOpcode::COPY;
231231 }
232232
233 /// isCopyLike - Return true if the instruction behaves like a copy.
234 /// This does not include native copy instructions.
235 bool isCopyLike() const {
236 return isCopy() || isSubregToReg() || isExtractSubreg() || isInsertSubreg();
237 }
238
233239 /// readsRegister - Return true if the MachineInstr reads the specified
234240 /// register. If TargetRegisterInfo is passed, then it also checks if there
235241 /// is a read of a super-register.
320320
321321 MachineInstr *CopyMI = NULL;
322322 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
323 if (mi->isExtractSubreg() || mi->isInsertSubreg() || mi->isSubregToReg() ||
323 if (mi->isCopyLike() ||
324324 tii_->isMoveInstr(*mi, SrcReg, DstReg, SrcSubReg, DstSubReg)) {
325325 CopyMI = mi;
326326
456456
457457 // A re-def may be a copy. e.g. %reg1030:6 = VMOVD %reg1026, ...
458458 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
459 if (PartReDef &&
460 tii_->isMoveInstr(*mi, SrcReg, DstReg, SrcSubReg, DstSubReg))
459 if (PartReDef && (mi->isCopyLike() ||
460 tii_->isMoveInstr(*mi, SrcReg, DstReg, SrcSubReg, DstSubReg)))
461461 OldValNo->setCopy(&*mi);
462462
463463 // Add the new live interval which replaces the range for the input copy.
487487 VNInfo *ValNo;
488488 MachineInstr *CopyMI = NULL;
489489 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
490 if (mi->isExtractSubreg() || mi->isInsertSubreg() || mi->isSubregToReg()||
490 if (mi->isCopyLike() ||
491491 tii_->isMoveInstr(*mi, SrcReg, DstReg, SrcSubReg, DstSubReg))
492492 CopyMI = mi;
493493 ValNo = interval.getNextValue(defIndex, CopyMI, true, VNInfoAllocator);
604604 else if (allocatableRegs_[MO.getReg()]) {
605605 MachineInstr *CopyMI = NULL;
606606 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
607 if (MI->isExtractSubreg() || MI->isInsertSubreg() || MI->isSubregToReg() ||
607 if (MI->isCopyLike() ||
608608 tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg))
609609 CopyMI = MI;
610610 handlePhysicalRegisterDef(MBB, MI, MIIdx, MO,
240240
241241 static bool isCopy(const MachineInstr *MI, const TargetInstrInfo *TII) {
242242 unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
243 return TII->isMoveInstr(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) ||
244 MI->isExtractSubreg() || MI->isInsertSubreg() || MI->isSubregToReg();
243 return MI->isCopyLike() ||
244 TII->isMoveInstr(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx);
245245 }
246246
247247 bool MachineCSE::isCSECandidate(MachineInstr *MI) {
106106 SrcSubIdx == 0 && DstSubIdx == 0 &&
107107 TargetRegisterInfo::isVirtualRegister(MvSrcReg))
108108 SrcMI = MRI->getVRegDef(MvSrcReg);
109 else if (SrcMI && SrcMI->isCopy() &&
110 !SrcMI->getOperand(0).getSubReg() &&
111 !SrcMI->getOperand(1).getSubReg() &&
112 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg()))
113 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
109114 if (!SrcMI)
110115 return false;
111116
676676
677677 // If the def is a move, set the copy field.
678678 unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
679 if (TII->isMoveInstr(*DI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
679 if (TII->isMoveInstr(*DI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
680680 if (DstReg == LI->reg)
681681 NewVN->setCopy(&*DI);
682
682 } else if (DI->isCopyLike() && DI->getOperand(0).getReg() == LI->reg)
683 NewVN->setCopy(&*DI);
684
683685 NewVNs[&*DI] = NewVN;
684686 }
685687
4545 const TargetInstrInfo *tii_) {
4646 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
4747 if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
48 Reg == SrcReg && SrcSubReg == 0 && DstSubReg == 0)
48 Reg == SrcReg && DstSubReg == 0)
4949 return true;
5050
51 if (OpIdx == 2 && MI->isSubregToReg())
52 return true;
53 if (OpIdx == 1 && MI->isExtractSubreg())
54 return true;
55 return false;
51 switch(OpIdx) {
52 case 1: return (MI->isExtractSubreg() || MI->isCopy()) &&
53 MI->getOperand(0).getSubReg() == 0;
54 case 2: return MI->isSubregToReg() && MI->getOperand(0).getSubReg() == 0;
55 default: return false;
56 }
5657 }
5758
5859 /// processImplicitDefs - Process IMPLICIT_DEF instructions and make sure
218219
219220 // Turn a copy use into an implicit_def.
220221 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
221 if (tii_->isMoveInstr(*RMI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
222 Reg == SrcReg && SrcSubReg == 0 && DstSubReg == 0) {
222 if ((RMI->isCopy() && RMI->getOperand(1).getReg() == Reg &&
223 RMI->getOperand(0).getSubReg() == 0) ||
224 (tii_->isMoveInstr(*RMI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
225 Reg == SrcReg && DstSubReg == 0)) {
223226 RMI->setDesc(tii_->get(TargetOpcode::IMPLICIT_DEF));
224227
225228 bool isKill = false;
518518 // If there is no hint, peek at the only use of this register.
519519 if ((!Hint || !TargetRegisterInfo::isPhysicalRegister(Hint)) &&
520520 MRI->hasOneNonDBGUse(VirtReg)) {
521 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg);
521522 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
522523 // It's a copy, use the destination register as a hint.
523 if (TII->isMoveInstr(*MRI->use_nodbg_begin(VirtReg),
524 SrcReg, DstReg, SrcSubReg, DstSubReg))
524 if (UseMI.isCopyLike())
525 Hint = UseMI.getOperand(0).getReg();
526 else if (TII->isMoveInstr(UseMI, SrcReg, DstReg, SrcSubReg, DstSubReg))
525527 Hint = DstReg;
526528 }
527529 allocVirtReg(MI, *LRI, Hint);
770772
771773 // If this is a copy, we may be able to coalesce.
772774 unsigned CopySrc, CopyDst, CopySrcSub, CopyDstSub;
773 if (!TII->isMoveInstr(*MI, CopySrc, CopyDst, CopySrcSub, CopyDstSub))
775 if (MI->isCopy()) {
776 CopyDst = MI->getOperand(0).getReg();
777 CopySrc = MI->getOperand(1).getReg();
778 CopyDstSub = MI->getOperand(0).getSubReg();
779 CopySrcSub = MI->getOperand(1).getSubReg();
780 } else if (!TII->isMoveInstr(*MI, CopySrc, CopyDst, CopySrcSub, CopyDstSub))
774781 CopySrc = CopyDst = 0;
775782
776783 // Track registers used by instruction.
4343 bool CoalescerPair::isMoveInstr(const MachineInstr *MI,
4444 unsigned &Src, unsigned &Dst,
4545 unsigned &SrcSub, unsigned &DstSub) const {
46 if (MI->isExtractSubreg()) {
46 if (MI->isCopy()) {
47 Dst = MI->getOperand(0).getReg();
48 DstSub = MI->getOperand(0).getSubReg();
49 Src = MI->getOperand(1).getReg();
50 SrcSub = MI->getOperand(1).getSubReg();
51 } else if (MI->isExtractSubreg()) {
4752 Dst = MI->getOperand(0).getReg();
4853 DstSub = MI->getOperand(0).getSubReg();
4954 Src = MI->getOperand(1).getReg();
449449 UseMO.setIsKill(false);
450450 }
451451 unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
452 if (!tii_->isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
452 if (UseMI->isCopy()) {
453 if (UseMI->getOperand(0).getReg() != IntB.reg ||
454 UseMI->getOperand(0).getSubReg())
455 continue;
456 } else if (tii_->isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)){
457 if (DstReg != IntB.reg || DstSubIdx)
458 continue;
459 } else
453460 continue;
454 if (DstReg == IntB.reg && DstSubIdx == 0) {
455 // This copy will become a noop. If it's defining a new val#,
456 // remove that val# as well. However this live range is being
457 // extended to the end of the existing live range defined by the copy.
458 SlotIndex DefIdx = UseIdx.getDefIndex();
459 const LiveRange *DLR = IntB.getLiveRangeContaining(DefIdx);
460 BHasPHIKill |= DLR->valno->hasPHIKill();
461 assert(DLR->valno->def == DefIdx);
462 BDeadValNos.push_back(DLR->valno);
463 BExtend[DLR->start] = DLR->end;
464 JoinedCopies.insert(UseMI);
465 }
461 // This copy will become a noop. If it's defining a new val#,
462 // remove that val# as well. However this live range is being
463 // extended to the end of the existing live range defined by the copy.
464 SlotIndex DefIdx = UseIdx.getDefIndex();
465 const LiveRange *DLR = IntB.getLiveRangeContaining(DefIdx);
466 BHasPHIKill |= DLR->valno->hasPHIKill();
467 assert(DLR->valno->def == DefIdx);
468 BDeadValNos.push_back(DLR->valno);
469 BExtend[DLR->start] = DLR->end;
470 JoinedCopies.insert(UseMI);
466471 }
467472
468473 // We need to insert a new liverange: [ALR.start, LastUse). It may be we can
603608 LastUse->setIsKill();
604609 removeRange(li, LastUseIdx.getDefIndex(), LR->end, li_, tri_);
605610 unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
606 if (tii_->isMoveInstr(*LastUseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
607 DstReg == li.reg && DstSubIdx == 0) {
611 if ((LastUseMI->isCopy() && !LastUseMI->getOperand(0).getSubReg()) ||
612 (tii_->isMoveInstr(*LastUseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
613 DstReg == li.reg && DstSubIdx == 0)) {
608614 // Last use is itself an identity code.
609615 int DeadIdx = LastUseMI->findRegisterDefOperandIdx(li.reg,
610616 false, false, tri_);
15551561 // If this isn't a copy nor a extract_subreg, we can't join intervals.
15561562 unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
15571563 bool isInsUndef = false;
1558 if (Inst->isExtractSubreg()) {
1564 if (Inst->isCopy() || Inst->isExtractSubreg()) {
15591565 DstReg = Inst->getOperand(0).getReg();
15601566 SrcReg = Inst->getOperand(1).getReg();
15611567 } else if (Inst->isInsertSubreg()) {
17921798 // Delete all coalesced copies.
17931799 bool DoDelete = true;
17941800 if (!tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
1795 assert((MI->isExtractSubreg() || MI->isInsertSubreg() ||
1796 MI->isSubregToReg()) && "Unrecognized copy instruction");
1801 assert(MI->isCopyLike() && "Unrecognized copy instruction");
17971802 SrcReg = MI->getOperand(MI->isSubregToReg() ? 2 : 1).getReg();
17981803 if (TargetRegisterInfo::isPhysicalRegister(SrcReg))
17991804 // Do not delete extract_subreg, insert_subreg of physical
381381 DstReg = 0;
382382 unsigned SrcSubIdx, DstSubIdx;
383383 if (!TII->isMoveInstr(MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
384 if (MI.isExtractSubreg()) {
384 if (MI.isCopy() || MI.isExtractSubreg()) {
385385 DstReg = MI.getOperand(0).getReg();
386386 SrcReg = MI.getOperand(1).getReg();
387387 } else if (MI.isInsertSubreg()) {