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Always compute all the bits in ComputeMaskedBits. This allows us to keep passing reduced masks to SimplifyDemandedBits, but know about all the bits if SimplifyDemandedBits fails. This allows instcombine to simplify cases like the one in the included testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 8 years ago
35 changed file(s) with 269 addition(s) and 421 deletion(s). Raw diff Collapse all Expand all
3535 /// where V is a vector, the mask, known zero, and known one values are the
3636 /// same width as the vector element, and the bit is set only if it is true
3737 /// for all of the elements in the vector.
38 void ComputeMaskedBits(Value *V, const APInt &Mask, APInt &KnownZero,
39 APInt &KnownOne, const TargetData *TD = 0,
40 unsigned Depth = 0);
41 void computeMaskedBitsLoad(const MDNode &Ranges, const APInt &Mask,
42 APInt &KnownZero);
38 void ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne,
39 const TargetData *TD = 0, unsigned Depth = 0);
40 void computeMaskedBitsLoad(const MDNode &Ranges, APInt &KnownZero);
4341
4442 /// ComputeSignBit - Determine whether the sign bit is known to be zero or
4543 /// one. Convenience wrapper around ComputeMaskedBits.
979979 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
980980 /// processing. Targets can implement the computeMaskedBitsForTargetNode
981981 /// method in the TargetLowering class to allow target nodes to be understood.
982 void ComputeMaskedBits(SDValue Op, const APInt &Mask, APInt &KnownZero,
983 APInt &KnownOne, unsigned Depth = 0) const;
982 void ComputeMaskedBits(SDValue Op, APInt &KnownZero, APInt &KnownOne,
983 unsigned Depth = 0) const;
984984
985985 /// ComputeNumSignBits - Return the number of times the sign bit of the
986986 /// register is replicated into the other bits. We know that at least 1 bit
872872 /// Mask are known to be either zero or one and return them in the
873873 /// KnownZero/KnownOne bitsets.
874874 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
875 const APInt &Mask,
876875 APInt &KnownZero,
877876 APInt &KnownOne,
878877 const SelectionDAG &DAG,
415415
416416 if (Align != 0) {
417417 unsigned BitWidth = TD->getTypeSizeInBits(Ptr->getType());
418 APInt Mask = APInt::getAllOnesValue(BitWidth),
419 KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
420 ComputeMaskedBits(Ptr, Mask, KnownZero, KnownOne, TD);
418 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
419 ComputeMaskedBits(Ptr, KnownZero, KnownOne, TD);
421420 Assert1(!(KnownOne & APInt::getLowBitsSet(BitWidth, Log2_32(Align))),
422421 "Undefined behavior: Memory reference address is misaligned", &I);
423422 }
475474 if (isa(V)) return true;
476475
477476 unsigned BitWidth = cast(V->getType())->getBitWidth();
478 APInt Mask = APInt::getAllOnesValue(BitWidth),
479 KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
480 ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD);
477 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
478 ComputeMaskedBits(V, KnownZero, KnownOne, TD);
481479 return KnownZero.isAllOnesValue();
482480 }
483481
32603260 if (const SCEVUnknown *U = dyn_cast(S)) {
32613261 // For a SCEVUnknown, ask ValueTracking.
32623262 unsigned BitWidth = getTypeSizeInBits(U->getType());
3263 APInt Mask = APInt::getAllOnesValue(BitWidth);
32643263 APInt Zeros(BitWidth, 0), Ones(BitWidth, 0);
3265 ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones);
3264 ComputeMaskedBits(U->getValue(), Zeros, Ones);
32663265 return Zeros.countTrailingOnes();
32673266 }
32683267
34003399
34013400 if (const SCEVUnknown *U = dyn_cast(S)) {
34023401 // For a SCEVUnknown, ask ValueTracking.
3403 APInt Mask = APInt::getAllOnesValue(BitWidth);
34043402 APInt Zeros(BitWidth, 0), Ones(BitWidth, 0);
3405 ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones, TD);
3403 ComputeMaskedBits(U->getValue(), Zeros, Ones, TD);
34063404 if (Ones == ~Zeros + 1)
34073405 return setUnsignedRange(U, ConservativeResult);
34083406 return setUnsignedRange(U,
36593657 // knew about to reconstruct a low-bits mask value.
36603658 unsigned LZ = A.countLeadingZeros();
36613659 unsigned BitWidth = A.getBitWidth();
3662 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
36633660 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
3664 ComputeMaskedBits(U->getOperand(0), AllOnes, KnownZero, KnownOne, TD);
3661 ComputeMaskedBits(U->getOperand(0), KnownZero, KnownOne, TD);
36653662
36663663 APInt EffectiveMask = APInt::getLowBitsSet(BitWidth, BitWidth - LZ);
36673664
4343 }
4444
4545 static void ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW,
46 const APInt &Mask,
4746 APInt &KnownZero, APInt &KnownOne,
4847 APInt &KnownZero2, APInt &KnownOne2,
4948 const TargetData *TD, unsigned Depth) {
5352 // than C (i.e. no wrap-around can happen). For example, 20-X is
5453 // positive if we can prove that X is >= 0 and < 16.
5554 if (!CLHS->getValue().isNegative()) {
56 unsigned BitWidth = Mask.getBitWidth();
55 unsigned BitWidth = KnownZero.getBitWidth();
5756 unsigned NLZ = (CLHS->getValue()+1).countLeadingZeros();
5857 // NLZ can't be BitWidth with no sign bit
5958 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
60 llvm::ComputeMaskedBits(Op1, MaskV, KnownZero2, KnownOne2, TD, Depth+1);
59 llvm::ComputeMaskedBits(Op1, KnownZero2, KnownOne2, TD, Depth+1);
6160
6261 // If all of the MaskV bits are known to be zero, then we know the
6362 // output top bits are zero, because we now know that the output is
6564 if ((KnownZero2 & MaskV) == MaskV) {
6665 unsigned NLZ2 = CLHS->getValue().countLeadingZeros();
6766 // Top bits known zero.
68 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
67 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
6968 }
7069 }
7170 }
7271 }
7372
74 unsigned BitWidth = Mask.getBitWidth();
73 unsigned BitWidth = KnownZero.getBitWidth();
7574
7675 // If one of the operands has trailing zeros, then the bits that the
7776 // other operand has in those bit positions will be preserved in the
7877 // result. For an add, this works with either operand. For a subtract,
7978 // this only works if the known zeros are in the right operand.
8079 APInt LHSKnownZero(BitWidth, 0), LHSKnownOne(BitWidth, 0);
81 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
82 BitWidth - Mask.countLeadingZeros());
83 llvm::ComputeMaskedBits(Op0, Mask2, LHSKnownZero, LHSKnownOne, TD, Depth+1);
80 llvm::ComputeMaskedBits(Op0, LHSKnownZero, LHSKnownOne, TD, Depth+1);
8481 assert((LHSKnownZero & LHSKnownOne) == 0 &&
8582 "Bits known to be one AND zero?");
8683 unsigned LHSKnownZeroOut = LHSKnownZero.countTrailingOnes();
8784
88 llvm::ComputeMaskedBits(Op1, Mask2, KnownZero2, KnownOne2, TD, Depth+1);
85 llvm::ComputeMaskedBits(Op1, KnownZero2, KnownOne2, TD, Depth+1);
8986 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
9087 unsigned RHSKnownZeroOut = KnownZero2.countTrailingOnes();
9188
110107 }
111108
112109 // Are we still trying to solve for the sign bit?
113 if (Mask.isNegative() && !KnownZero.isNegative() && !KnownOne.isNegative()) {
110 if (!KnownZero.isNegative() && !KnownOne.isNegative()) {
114111 if (NSW) {
115112 if (Add) {
116113 // Adding two positive numbers can't wrap into negative
132129 }
133130
134131 static void ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW,
135 const APInt &Mask,
136132 APInt &KnownZero, APInt &KnownOne,
137133 APInt &KnownZero2, APInt &KnownOne2,
138134 const TargetData *TD, unsigned Depth) {
139 unsigned BitWidth = Mask.getBitWidth();
140 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
141 ComputeMaskedBits(Op1, Mask2, KnownZero, KnownOne, TD, Depth+1);
142 ComputeMaskedBits(Op0, Mask2, KnownZero2, KnownOne2, TD, Depth+1);
135 unsigned BitWidth = KnownZero.getBitWidth();
136 ComputeMaskedBits(Op1, KnownZero, KnownOne, TD, Depth+1);
137 ComputeMaskedBits(Op0, KnownZero2, KnownOne2, TD, Depth+1);
143138 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
144139 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
145140
146141 bool isKnownNegative = false;
147142 bool isKnownNonNegative = false;
148143 // If the multiplication is known not to overflow, compute the sign bit.
149 if (Mask.isNegative() && NSW) {
144 if (NSW) {
150145 if (Op0 == Op1) {
151146 // The product of a number with itself is non-negative.
152147 isKnownNonNegative = true;
183178 LeadZ = std::min(LeadZ, BitWidth);
184179 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
185180 APInt::getHighBitsSet(BitWidth, LeadZ);
186 KnownZero &= Mask;
187181
188182 // Only make use of no-wrap flags if we failed to compute the sign bit
189183 // directly. This matters if the multiplication always overflows, in
196190 KnownOne.setBit(BitWidth - 1);
197191 }
198192
199 void llvm::computeMaskedBitsLoad(const MDNode &Ranges, const APInt &Mask,
200 APInt &KnownZero) {
201 unsigned BitWidth = Mask.getBitWidth();
193 void llvm::computeMaskedBitsLoad(const MDNode &Ranges, APInt &KnownZero) {
194 unsigned BitWidth = KnownZero.getBitWidth();
202195 unsigned NumRanges = Ranges.getNumOperands() / 2;
203196 assert(NumRanges >= 1);
204197
214207 MinLeadingZeros = std::min(LeadingZeros, MinLeadingZeros);
215208 }
216209
217 KnownZero = Mask & APInt::getHighBitsSet(BitWidth, MinLeadingZeros);
218 }
219 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
220 /// known to be either zero or one and return them in the KnownZero/KnownOne
221 /// bit sets. This code only analyzes bits in Mask, in order to short-circuit
222 /// processing.
210 KnownZero = APInt::getHighBitsSet(BitWidth, MinLeadingZeros);
211 }
212 /// ComputeMaskedBits - Determine which of the bits are known to be either zero
213 /// or one and return them in the KnownZero/KnownOne bit sets.
214 ///
223215 /// NOTE: we cannot consider 'undef' to be "IsZero" here. The problem is that
224216 /// we cannot optimize based on the assumption that it is zero without changing
225217 /// it to be an explicit zero. If we don't change it to zero, other code could
229221 ///
230222 /// This function is defined on values with integer type, values with pointer
231223 /// type (but only if TD is non-null), and vectors of integers. In the case
232 /// where V is a vector, the mask, known zero, and known one values are the
224 /// where V is a vector, known zero, and known one values are the
233225 /// same width as the vector element, and the bit is set only if it is true
234226 /// for all of the elements in the vector.
235 void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
236 APInt &KnownZero, APInt &KnownOne,
227 void llvm::ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne,
237228 const TargetData *TD, unsigned Depth) {
238229 assert(V && "No Value?");
239230 assert(Depth <= MaxDepth && "Limit Search Depth");
240 unsigned BitWidth = Mask.getBitWidth();
231 unsigned BitWidth = KnownZero.getBitWidth();
232
241233 assert((V->getType()->isIntOrIntVectorTy() ||
242234 V->getType()->getScalarType()->isPointerTy()) &&
243235 "Not integer or pointer type!");
251243
252244 if (ConstantInt *CI = dyn_cast(V)) {
253245 // We know all of the bits for a constant!
254 KnownOne = CI->getValue() & Mask;
255 KnownZero = ~KnownOne & Mask;
246 KnownOne = CI->getValue();
247 KnownZero = ~KnownOne;
256248 return;
257249 }
258250 // Null and aggregate-zero are all-zeros.
259251 if (isa(V) ||
260252 isa(V)) {
261253 KnownOne.clearAllBits();
262 KnownZero = Mask;
254 KnownZero = APInt::getAllOnesValue(BitWidth);
263255 return;
264256 }
265257 // Handle a constant vector by taking the intersection of the known bits of
296288 }
297289 }
298290 if (Align > 0)
299 KnownZero = Mask & APInt::getLowBitsSet(BitWidth,
300 CountTrailingZeros_32(Align));
291 KnownZero = APInt::getLowBitsSet(BitWidth,
292 CountTrailingZeros_32(Align));
301293 else
302294 KnownZero.clearAllBits();
303295 KnownOne.clearAllBits();
309301 if (GA->mayBeOverridden()) {
310302 KnownZero.clearAllBits(); KnownOne.clearAllBits();
311303 } else {
312 ComputeMaskedBits(GA->getAliasee(), Mask, KnownZero, KnownOne,
313 TD, Depth+1);
304 ComputeMaskedBits(GA->getAliasee(), KnownZero, KnownOne, TD, Depth+1);
314305 }
315306 return;
316307 }
319310 // Get alignment information off byval arguments if specified in the IR.
320311 if (A->hasByValAttr())
321312 if (unsigned Align = A->getParamAlignment())
322 KnownZero = Mask & APInt::getLowBitsSet(BitWidth,
323 CountTrailingZeros_32(Align));
313 KnownZero = APInt::getLowBitsSet(BitWidth,
314 CountTrailingZeros_32(Align));
324315 return;
325316 }
326317
327318 // Start out not knowing anything.
328319 KnownZero.clearAllBits(); KnownOne.clearAllBits();
329320
330 if (Depth == MaxDepth || Mask == 0)
321 if (Depth == MaxDepth)
331322 return; // Limit search depth.
332323
333324 Operator *I = dyn_cast(V);
338329 default: break;
339330 case Instruction::Load:
340331 if (MDNode *MD = cast(I)->getMetadata(LLVMContext::MD_range))
341 computeMaskedBitsLoad(*MD, Mask, KnownZero);
332 computeMaskedBitsLoad(*MD, KnownZero);
342333 return;
343334 case Instruction::And: {
344335 // If either the LHS or the RHS are Zero, the result is zero.
345 ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, TD, Depth+1);
346 APInt Mask2(Mask & ~KnownZero);
347 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
348 Depth+1);
336 ComputeMaskedBits(I->getOperand(1), KnownZero, KnownOne, TD, Depth+1);
337 ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1);
349338 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
350339 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
351340
356345 return;
357346 }
358347 case Instruction::Or: {
359 ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, TD, Depth+1);
360 APInt Mask2(Mask & ~KnownOne);
361 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
362 Depth+1);
348 ComputeMaskedBits(I->getOperand(1), KnownZero, KnownOne, TD, Depth+1);
349 ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1);
363350 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
364351 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
365352
370357 return;
371358 }
372359 case Instruction::Xor: {
373 ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, TD, Depth+1);
374 ComputeMaskedBits(I->getOperand(0), Mask, KnownZero2, KnownOne2, TD,
375 Depth+1);
360 ComputeMaskedBits(I->getOperand(1), KnownZero, KnownOne, TD, Depth+1);
361 ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1);
376362 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
377363 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
378364
386372 case Instruction::Mul: {
387373 bool NSW = cast(I)->hasNoSignedWrap();
388374 ComputeMaskedBitsMul(I->getOperand(0), I->getOperand(1), NSW,
389 Mask, KnownZero, KnownOne, KnownZero2, KnownOne2,
390 TD, Depth);
375 KnownZero, KnownOne, KnownZero2, KnownOne2, TD, Depth);
391376 break;
392377 }
393378 case Instruction::UDiv: {
394379 // For the purposes of computing leading zeros we can conservatively
395380 // treat a udiv as a logical right shift by the power of 2 known to
396381 // be less than the denominator.
397 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
398 ComputeMaskedBits(I->getOperand(0),
399 AllOnes, KnownZero2, KnownOne2, TD, Depth+1);
382 ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1);
400383 unsigned LeadZ = KnownZero2.countLeadingOnes();
401384
402385 KnownOne2.clearAllBits();
403386 KnownZero2.clearAllBits();
404 ComputeMaskedBits(I->getOperand(1),
405 AllOnes, KnownZero2, KnownOne2, TD, Depth+1);
387 ComputeMaskedBits(I->getOperand(1), KnownZero2, KnownOne2, TD, Depth+1);
406388 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
407389 if (RHSUnknownLeadingOnes != BitWidth)
408390 LeadZ = std::min(BitWidth,
409391 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
410392
411 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
393 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
412394 return;
413395 }
414396 case Instruction::Select:
415 ComputeMaskedBits(I->getOperand(2), Mask, KnownZero, KnownOne, TD, Depth+1);
416 ComputeMaskedBits(I->getOperand(1), Mask, KnownZero2, KnownOne2, TD,
397 ComputeMaskedBits(I->getOperand(2), KnownZero, KnownOne, TD, Depth+1);
398 ComputeMaskedBits(I->getOperand(1), KnownZero2, KnownOne2, TD,
417399 Depth+1);
418400 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
419401 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
446428 else
447429 SrcBitWidth = SrcTy->getScalarSizeInBits();
448430
449 APInt MaskIn = Mask.zextOrTrunc(SrcBitWidth);
450431 KnownZero = KnownZero.zextOrTrunc(SrcBitWidth);
451432 KnownOne = KnownOne.zextOrTrunc(SrcBitWidth);
452 ComputeMaskedBits(I->getOperand(0), MaskIn, KnownZero, KnownOne, TD,
453 Depth+1);
433 ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
454434 KnownZero = KnownZero.zextOrTrunc(BitWidth);
455435 KnownOne = KnownOne.zextOrTrunc(BitWidth);
456436 // Any top bits are known to be zero.
464444 // TODO: For now, not handling conversions like:
465445 // (bitcast i64 %x to <2 x i32>)
466446 !I->getType()->isVectorTy()) {
467 ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, TD,
468 Depth+1);
447 ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
469448 return;
470449 }
471450 break;
474453 // Compute the bits in the result that are not present in the input.
475454 unsigned SrcBitWidth = I->getOperand(0)->getType()->getScalarSizeInBits();
476455
477 APInt MaskIn = Mask.trunc(SrcBitWidth);
478456 KnownZero = KnownZero.trunc(SrcBitWidth);
479457 KnownOne = KnownOne.trunc(SrcBitWidth);
480 ComputeMaskedBits(I->getOperand(0), MaskIn, KnownZero, KnownOne, TD,
481 Depth+1);
458 ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
482459 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
483460 KnownZero = KnownZero.zext(BitWidth);
484461 KnownOne = KnownOne.zext(BitWidth);
495472 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
496473 if (ConstantInt *SA = dyn_cast(I->getOperand(1))) {
497474 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth);
498 APInt Mask2(Mask.lshr(ShiftAmt));
499 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne, TD,
500 Depth+1);
475 ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
501476 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
502477 KnownZero <<= ShiftAmt;
503478 KnownOne <<= ShiftAmt;
512487 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth);
513488
514489 // Unsigned shift right.
515 APInt Mask2(Mask.shl(ShiftAmt));
516 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero,KnownOne, TD,
517 Depth+1);
490 ComputeMaskedBits(I->getOperand(0), KnownZero,KnownOne, TD, Depth+1);
518491 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
519492 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
520493 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
530503 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
531504
532505 // Signed shift right.
533 APInt Mask2(Mask.shl(ShiftAmt));
534 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne, TD,
535 Depth+1);
506 ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
536507 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
537508 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
538509 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
548519 case Instruction::Sub: {
549520 bool NSW = cast(I)->hasNoSignedWrap();
550521 ComputeMaskedBitsAddSub(false, I->getOperand(0), I->getOperand(1), NSW,
551 Mask, KnownZero, KnownOne, KnownZero2, KnownOne2,
552 TD, Depth);
522 KnownZero, KnownOne, KnownZero2, KnownOne2, TD,
523 Depth);
553524 break;
554525 }
555526 case Instruction::Add: {
556527 bool NSW = cast(I)->hasNoSignedWrap();
557528 ComputeMaskedBitsAddSub(true, I->getOperand(0), I->getOperand(1), NSW,
558 Mask, KnownZero, KnownOne, KnownZero2, KnownOne2,
559 TD, Depth);
529 KnownZero, KnownOne, KnownZero2, KnownOne2, TD,
530 Depth);
560531 break;
561532 }
562533 case Instruction::SRem:
564535 APInt RA = Rem->getValue().abs();
565536 if (RA.isPowerOf2()) {
566537 APInt LowBits = RA - 1;
567 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
568 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
569 Depth+1);
538 ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1);
570539
571540 // The low bits of the first operand are unchanged by the srem.
572541 KnownZero = KnownZero2 & LowBits;
582551 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
583552 KnownOne |= ~LowBits;
584553
585 KnownZero &= Mask;
586 KnownOne &= Mask;
587
588554 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
589555 }
590556 }
591557
592558 // The sign bit is the LHS's sign bit, except when the result of the
593559 // remainder is zero.
594 if (Mask.isNegative() && KnownZero.isNonNegative()) {
595 APInt Mask2 = APInt::getSignBit(BitWidth);
560 if (KnownZero.isNonNegative()) {
596561 APInt LHSKnownZero(BitWidth, 0), LHSKnownOne(BitWidth, 0);
597 ComputeMaskedBits(I->getOperand(0), Mask2, LHSKnownZero, LHSKnownOne, TD,
562 ComputeMaskedBits(I->getOperand(0), LHSKnownZero, LHSKnownOne, TD,
598563 Depth+1);
599564 // If it's known zero, our sign bit is also zero.
600565 if (LHSKnownZero.isNegative())
607572 APInt RA = Rem->getValue();
608573 if (RA.isPowerOf2()) {
609574 APInt LowBits = (RA - 1);
610 APInt Mask2 = LowBits & Mask;
611 KnownZero |= ~LowBits & Mask;
612 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne, TD,
575 ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD,
613576 Depth+1);
614577 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
578 KnownZero |= ~LowBits;
579 KnownOne &= LowBits;
615580 break;
616581 }
617582 }
618583
619584 // Since the result is less than or equal to either operand, any leading
620585 // zero bits in either operand must also exist in the result.
621 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
622 ComputeMaskedBits(I->getOperand(0), AllOnes, KnownZero, KnownOne,
623 TD, Depth+1);
624 ComputeMaskedBits(I->getOperand(1), AllOnes, KnownZero2, KnownOne2,
625 TD, Depth+1);
586 ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
587 ComputeMaskedBits(I->getOperand(1), KnownZero2, KnownOne2, TD, Depth+1);
626588
627589 unsigned Leaders = std::max(KnownZero.countLeadingOnes(),
628590 KnownZero2.countLeadingOnes());
629591 KnownOne.clearAllBits();
630 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
592 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
631593 break;
632594 }
633595
638600 Align = TD->getABITypeAlignment(AI->getType()->getElementType());
639601
640602 if (Align > 0)
641 KnownZero = Mask & APInt::getLowBitsSet(BitWidth,
642 CountTrailingZeros_32(Align));
603 KnownZero = APInt::getLowBitsSet(BitWidth, CountTrailingZeros_32(Align));
643604 break;
644605 }
645606 case Instruction::GetElementPtr: {
646607 // Analyze all of the subscripts of this getelementptr instruction
647608 // to determine if we can prove known low zero bits.
648 APInt LocalMask = APInt::getAllOnesValue(BitWidth);
649609 APInt LocalKnownZero(BitWidth, 0), LocalKnownOne(BitWidth, 0);
650 ComputeMaskedBits(I->getOperand(0), LocalMask,
651 LocalKnownZero, LocalKnownOne, TD, Depth+1);
610 ComputeMaskedBits(I->getOperand(0), LocalKnownZero, LocalKnownOne, TD,
611 Depth+1);
652612 unsigned TrailZ = LocalKnownZero.countTrailingOnes();
653613
654614 gep_type_iterator GTI = gep_type_begin(I);
668628 if (!IndexedTy->isSized()) return;
669629 unsigned GEPOpiBits = Index->getType()->getScalarSizeInBits();
670630 uint64_t TypeSize = TD ? TD->getTypeAllocSize(IndexedTy) : 1;
671 LocalMask = APInt::getAllOnesValue(GEPOpiBits);
672631 LocalKnownZero = LocalKnownOne = APInt(GEPOpiBits, 0);
673 ComputeMaskedBits(Index, LocalMask,
674 LocalKnownZero, LocalKnownOne, TD, Depth+1);
632 ComputeMaskedBits(Index, LocalKnownZero, LocalKnownOne, TD, Depth+1);
675633 TrailZ = std::min(TrailZ,
676634 unsigned(CountTrailingZeros_64(TypeSize) +
677635 LocalKnownZero.countTrailingOnes()));
678636 }
679637 }
680638
681 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) & Mask;
639 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ);
682640 break;
683641 }
684642 case Instruction::PHI: {
713671 break;
714672 // Ok, we have a PHI of the form L op= R. Check for low
715673 // zero bits.
716 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
717 ComputeMaskedBits(R, Mask2, KnownZero2, KnownOne2, TD, Depth+1);
718 Mask2 = APInt::getLowBitsSet(BitWidth,
719 KnownZero2.countTrailingOnes());
674 ComputeMaskedBits(R, KnownZero2, KnownOne2, TD, Depth+1);
720675
721676 // We need to take the minimum number of known bits
722677 APInt KnownZero3(KnownZero), KnownOne3(KnownOne);
723 ComputeMaskedBits(L, Mask2, KnownZero3, KnownOne3, TD, Depth+1);
724
725 KnownZero = Mask &
726 APInt::getLowBitsSet(BitWidth,
678 ComputeMaskedBits(L, KnownZero3, KnownOne3, TD, Depth+1);
679
680 KnownZero = APInt::getLowBitsSet(BitWidth,
727681 std::min(KnownZero2.countTrailingOnes(),
728682 KnownZero3.countTrailingOnes()));
729683 break;
742696 if (P->hasConstantValue() == P)
743697 break;
744698
745 KnownZero = Mask;
746 KnownOne = Mask;
699 KnownZero = APInt::getAllOnesValue(BitWidth);
700 KnownOne = APInt::getAllOnesValue(BitWidth);
747701 for (unsigned i = 0, e = P->getNumIncomingValues(); i != e; ++i) {
748702 // Skip direct self references.
749703 if (P->getIncomingValue(i) == P) continue;
752706 KnownOne2 = APInt(BitWidth, 0);
753707 // Recurse, but cap the recursion to one level, because we don't
754708 // want to waste time spinning around in loops.
755 ComputeMaskedBits(P->getIncomingValue(i), KnownZero | KnownOne,
756 KnownZero2, KnownOne2, TD, MaxDepth-1);
709 ComputeMaskedBits(P->getIncomingValue(i), KnownZero2, KnownOne2, TD,
710 MaxDepth-1);
757711 KnownZero &= KnownZero2;
758712 KnownOne &= KnownOne2;
759713 // If all bits have been ruled out, there's no need to check
774728 // If this call is undefined for 0, the result will be less than 2^n.
775729 if (II->getArgOperand(1) == ConstantInt::getTrue(II->getContext()))
776730 LowBits -= 1;
777 KnownZero = Mask & APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
731 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
778732 break;
779733 }
780734 case Intrinsic::ctpop: {
781735 unsigned LowBits = Log2_32(BitWidth)+1;
782 KnownZero = Mask & APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
736 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
783737 break;
784738 }
785739 case Intrinsic::x86_sse42_crc32_64_8:
786740 case Intrinsic::x86_sse42_crc32_64_64:
787 KnownZero = Mask & APInt::getHighBitsSet(64, 32);
741 KnownZero = APInt::getHighBitsSet(64, 32);
788742 break;
789743 }
790744 }
799753 case Intrinsic::uadd_with_overflow:
800754 case Intrinsic::sadd_with_overflow:
801755 ComputeMaskedBitsAddSub(true, II->getArgOperand(0),
802 II->getArgOperand(1), false, Mask,
803 KnownZero, KnownOne, KnownZero2, KnownOne2,
804 TD, Depth);
756 II->getArgOperand(1), false, KnownZero,
757 KnownOne, KnownZero2, KnownOne2, TD, Depth);
805758 break;
806759 case Intrinsic::usub_with_overflow:
807760 case Intrinsic::ssub_with_overflow:
808761 ComputeMaskedBitsAddSub(false, II->getArgOperand(0),
809 II->getArgOperand(1), false, Mask,
810 KnownZero, KnownOne, KnownZero2, KnownOne2,
811 TD, Depth);
762 II->getArgOperand(1), false, KnownZero,
763 KnownOne, KnownZero2, KnownOne2, TD, Depth);
812764 break;
813765 case Intrinsic::umul_with_overflow:
814766 case Intrinsic::smul_with_overflow:
815767 ComputeMaskedBitsMul(II->getArgOperand(0), II->getArgOperand(1),
816 false, Mask, KnownZero, KnownOne,
768 false, KnownZero, KnownOne,
817769 KnownZero2, KnownOne2, TD, Depth);
818770 break;
819771 }
834786 }
835787 APInt ZeroBits(BitWidth, 0);
836788 APInt OneBits(BitWidth, 0);
837 ComputeMaskedBits(V, APInt::getSignBit(BitWidth), ZeroBits, OneBits, TD,
838 Depth);
789 ComputeMaskedBits(V, ZeroBits, OneBits, TD, Depth);
839790 KnownOne = OneBits[BitWidth - 1];
840791 KnownZero = ZeroBits[BitWidth - 1];
841792 }
943894
944895 APInt KnownZero(BitWidth, 0);
945896 APInt KnownOne(BitWidth, 0);
946 ComputeMaskedBits(X, APInt(BitWidth, 1), KnownZero, KnownOne, TD, Depth);
897 ComputeMaskedBits(X, KnownZero, KnownOne, TD, Depth);
947898 if (KnownOne[0])
948899 return true;
949900 }
985936 APInt Mask = APInt::getSignedMaxValue(BitWidth);
986937 // The sign bit of X is set. If some other bit is set then X is not equal
987938 // to INT_MIN.
988 ComputeMaskedBits(X, Mask, KnownZero, KnownOne, TD, Depth);
939 ComputeMaskedBits(X, KnownZero, KnownOne, TD, Depth);
989940 if ((KnownOne & Mask) != 0)
990941 return true;
991942 // The sign bit of Y is set. If some other bit is set then Y is not equal
992943 // to INT_MIN.
993 ComputeMaskedBits(Y, Mask, KnownZero, KnownOne, TD, Depth);
944 ComputeMaskedBits(Y, KnownZero, KnownOne, TD, Depth);
994945 if ((KnownOne & Mask) != 0)
995946 return true;
996947 }
1020971 if (!BitWidth) return false;
1021972 APInt KnownZero(BitWidth, 0);
1022973 APInt KnownOne(BitWidth, 0);
1023 ComputeMaskedBits(V, APInt::getAllOnesValue(BitWidth), KnownZero, KnownOne,
1024 TD, Depth);
974 ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth);
1025975 return KnownOne != 0;
1026976 }
1027977
1037987 bool llvm::MaskedValueIsZero(Value *V, const APInt &Mask,
1038988 const TargetData *TD, unsigned Depth) {
1039989 APInt KnownZero(Mask.getBitWidth(), 0), KnownOne(Mask.getBitWidth(), 0);
1040 ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD, Depth);
990 ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth);
1041991 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1042992 return (KnownZero & Mask) == Mask;
1043993 }
11281078 if (ConstantInt *CRHS = dyn_cast(U->getOperand(1)))
11291079 if (CRHS->isAllOnesValue()) {
11301080 APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
1131 APInt Mask = APInt::getAllOnesValue(TyBits);
1132 ComputeMaskedBits(U->getOperand(0), Mask, KnownZero, KnownOne, TD,
1133 Depth+1);
1081 ComputeMaskedBits(U->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
11341082
11351083 // If the input is known to be 0 or 1, the output is 0/-1, which is all
11361084 // sign bits set.
1137 if ((KnownZero | APInt(TyBits, 1)) == Mask)
1085 if ((KnownZero | APInt(TyBits, 1)).isAllOnesValue())
11381086 return TyBits;
11391087
11401088 // If we are subtracting one from a positive number, there is no carry
11551103 if (ConstantInt *CLHS = dyn_cast(U->getOperand(0)))
11561104 if (CLHS->isNullValue()) {
11571105 APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
1158 APInt Mask = APInt::getAllOnesValue(TyBits);
1159 ComputeMaskedBits(U->getOperand(1), Mask, KnownZero, KnownOne,
1160 TD, Depth+1);
1106 ComputeMaskedBits(U->getOperand(1), KnownZero, KnownOne, TD, Depth+1);
11611107 // If the input is known to be 0 or 1, the output is 0/-1, which is all
11621108 // sign bits set.
1163 if ((KnownZero | APInt(TyBits, 1)) == Mask)
1109 if ((KnownZero | APInt(TyBits, 1)).isAllOnesValue())
11641110 return TyBits;
11651111
11661112 // If the input is known to be positive (the sign bit is known clear),
12021148 // Finally, if we can prove that the top bits of the result are 0's or 1's,
12031149 // use this information.
12041150 APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
1205 APInt Mask = APInt::getAllOnesValue(TyBits);
1206 ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD, Depth);
1151 APInt Mask;
1152 ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth);
12071153
12081154 if (KnownZero.isNegative()) { // sign bit is 0
12091155 Mask = KnownZero;
18951841 return false;
18961842 APInt KnownZero(BitWidth, 0);
18971843 APInt KnownOne(BitWidth, 0);
1898 ComputeMaskedBits(Op, APInt::getAllOnesValue(BitWidth),
1899 KnownZero, KnownOne, TD);
1844 ComputeMaskedBits(Op, KnownZero, KnownOne, TD);
19001845 return !!KnownZero;
19011846 }
19021847 case Instruction::Load: {
14511451 if (VT.isInteger() && !VT.isVector()) {
14521452 APInt LHSZero, LHSOne;
14531453 APInt RHSZero, RHSOne;
1454 APInt Mask = APInt::getAllOnesValue(VT.getScalarType().getSizeInBits());
1455 DAG.ComputeMaskedBits(N0, Mask, LHSZero, LHSOne);
1454 DAG.ComputeMaskedBits(N0, LHSZero, LHSOne);
14561455
14571456 if (LHSZero.getBoolValue()) {
1458 DAG.ComputeMaskedBits(N1, Mask, RHSZero, RHSOne);
1457 DAG.ComputeMaskedBits(N1, RHSZero, RHSOne);
14591458
14601459 // If all possibly-set bits on the LHS are clear on the RHS, return an OR.
14611460 // If all possibly-set bits on the RHS are clear on the LHS, return an OR.
1462 if ((RHSZero & (~LHSZero & Mask)) == (~LHSZero & Mask) ||
1463 (LHSZero & (~RHSZero & Mask)) == (~RHSZero & Mask))
1461 if ((RHSZero & ~LHSZero) == ~LHSZero || (LHSZero & ~RHSZero) == ~RHSZero)
14641462 return DAG.getNode(ISD::OR, N->getDebugLoc(), VT, N0, N1);
14651463 }
14661464 }
15461544 // fold (addc a, b) -> (or a, b), CARRY_FALSE iff a and b share no bits.
15471545 APInt LHSZero, LHSOne;
15481546 APInt RHSZero, RHSOne;
1549 APInt Mask = APInt::getAllOnesValue(VT.getScalarType().getSizeInBits());
1550 DAG.ComputeMaskedBits(N0, Mask, LHSZero, LHSOne);
1547 DAG.ComputeMaskedBits(N0, LHSZero, LHSOne);
15511548
15521549 if (LHSZero.getBoolValue()) {
1553 DAG.ComputeMaskedBits(N1, Mask, RHSZero, RHSOne);
1550 DAG.ComputeMaskedBits(N1, RHSZero, RHSOne);
15541551
15551552 // If all possibly-set bits on the LHS are clear on the RHS, return an OR.
15561553 // If all possibly-set bits on the RHS are clear on the LHS, return an OR.
1557 if ((RHSZero & (~LHSZero & Mask)) == (~LHSZero & Mask) ||
1558 (LHSZero & (~RHSZero & Mask)) == (~RHSZero & Mask))
1554 if ((RHSZero & ~LHSZero) == ~LHSZero || (LHSZero & ~RHSZero) == ~RHSZero)
15591555 return CombineTo(N, DAG.getNode(ISD::OR, N->getDebugLoc(), VT, N0, N1),
15601556 DAG.getNode(ISD::CARRY_FALSE,
15611557 N->getDebugLoc(), MVT::Glue));
38343830 if (N1C && N0.getOpcode() == ISD::CTLZ &&
38353831 N1C->getAPIntValue() == Log2_32(VT.getSizeInBits())) {
38363832 APInt KnownZero, KnownOne;
3837 APInt Mask = APInt::getAllOnesValue(VT.getScalarType().getSizeInBits());
3838 DAG.ComputeMaskedBits(N0.getOperand(0), Mask, KnownZero, KnownOne);
3833 DAG.ComputeMaskedBits(N0.getOperand(0), KnownZero, KnownOne);
38393834
38403835 // If any of the input bits are KnownOne, then the input couldn't be all
38413836 // zeros, thus the result of the srl will always be zero.
38433838
38443839 // If all of the bits input the to ctlz node are known to be zero, then
38453840 // the result of the ctlz is "32" and the result of the shift is one.
3846 APInt UnknownBits = ~KnownZero & Mask;
3841 APInt UnknownBits = ~KnownZero;
38473842 if (UnknownBits == 0) return DAG.getConstant(1, VT);
38483843
38493844 // Otherwise, check to see if there is exactly one bit input to the ctlz.
44384433 std::min(Op.getValueSizeInBits(),
44394434 VT.getSizeInBits()));
44404435 APInt KnownZero, KnownOne;
4441 DAG.ComputeMaskedBits(Op, TruncatedBits, KnownZero, KnownOne);
4442 if (TruncatedBits == KnownZero) {
4436 DAG.ComputeMaskedBits(Op, KnownZero, KnownOne);
4437 if (TruncatedBits == (KnownZero & TruncatedBits)) {
44434438 if (VT.bitsGT(Op.getValueType()))
44444439 return DAG.getNode(ISD::ZERO_EXTEND, N->getDebugLoc(), VT, Op);
44454440 if (VT.bitsLT(Op.getValueType()))
13611361
13621362 APInt HighBitMask = APInt::getHighBitsSet(ShBits, ShBits - Log2_32(NVTBits));
13631363 APInt KnownZero, KnownOne;
1364 DAG.ComputeMaskedBits(N->getOperand(1), HighBitMask, KnownZero, KnownOne);
1364 DAG.ComputeMaskedBits(N->getOperand(1), KnownZero, KnownOne);
13651365
13661366 // If we don't know anything about the high bits, exit.
13671367 if (((KnownZero|KnownOne) & HighBitMask) == 0)
16261626 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
16271627 unsigned Depth) const {
16281628 APInt KnownZero, KnownOne;
1629 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1629 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
16301630 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
16311631 return (KnownZero & Mask) == Mask;
16321632 }
16351635 /// known to be either zero or one and return them in the KnownZero/KnownOne
16361636 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
16371637 /// processing.
1638 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1639 APInt &KnownZero, APInt &KnownOne,
1640 unsigned Depth) const {
1641 unsigned BitWidth = Mask.getBitWidth();
1642 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1643 "Mask size mismatches value type size!");
1638 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1639 APInt &KnownOne, unsigned Depth) const {
1640 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
16441641
16451642 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1646 if (Depth == 6 || Mask == 0)
1643 if (Depth == 6)
16471644 return; // Limit search depth.
16481645
16491646 APInt KnownZero2, KnownOne2;
16511648 switch (Op.getOpcode()) {
16521649 case ISD::Constant:
16531650 // We know all of the bits for a constant!
1654 KnownOne = cast(Op)->getAPIntValue() & Mask;
1655 KnownZero = ~KnownOne & Mask;
1651 KnownOne = cast(Op)->getAPIntValue();
1652 KnownZero = ~KnownOne;
16561653 return;
16571654 case ISD::AND:
16581655 // If either the LHS or the RHS are Zero, the result is zero.
1659 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1660 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1661 KnownZero2, KnownOne2, Depth+1);
1656 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1657 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
16621658 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
16631659 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
16641660
16681664 KnownZero |= KnownZero2;
16691665 return;
16701666 case ISD::OR:
1671 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1672 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1673 KnownZero2, KnownOne2, Depth+1);
1667 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1668 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
16741669 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
16751670 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
16761671
16801675 KnownOne |= KnownOne2;
16811676 return;
16821677 case ISD::XOR: {
1683 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1684 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1678 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1679 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
16851680 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
16861681 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
16871682
16931688 return;
16941689 }
16951690 case ISD::MUL: {
1696 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1697 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1698 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1691 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1692 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
16991693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
17001694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
17011695
17141708 LeadZ = std::min(LeadZ, BitWidth);
17151709 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
17161710 APInt::getHighBitsSet(BitWidth, LeadZ);
1717 KnownZero &= Mask;
17181711 return;
17191712 }
17201713 case ISD::UDIV: {
17211714 // For the purposes of computing leading zeros we can conservatively
17221715 // treat a udiv as a logical right shift by the power of 2 known to
17231716 // be less than the denominator.
1724 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1725 ComputeMaskedBits(Op.getOperand(0),
1726 AllOnes, KnownZero2, KnownOne2, Depth+1);
1717 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
17271718 unsigned LeadZ = KnownZero2.countLeadingOnes();
17281719
17291720 KnownOne2.clearAllBits();
17301721 KnownZero2.clearAllBits();
1731 ComputeMaskedBits(Op.getOperand(1),
1732 AllOnes, KnownZero2, KnownOne2, Depth+1);
1722 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
17331723 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
17341724 if (RHSUnknownLeadingOnes != BitWidth)
17351725 LeadZ = std::min(BitWidth,
17361726 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
17371727
1738 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1728 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
17391729 return;
17401730 }
17411731 case ISD::SELECT:
1742 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1743 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1732 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1733 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
17441734 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
17451735 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
17461736
17491739 KnownZero &= KnownZero2;
17501740 return;
17511741 case ISD::SELECT_CC:
1752 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1753 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1742 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1743 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
17541744 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
17551745 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
17561746
17821772 if (ShAmt >= BitWidth)
17831773 return;
17841774
1785 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1786 KnownZero, KnownOne, Depth+1);
1775 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
17871776 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
17881777 KnownZero <<= ShAmt;
17891778 KnownOne <<= ShAmt;
18001789 if (ShAmt >= BitWidth)
18011790 return;
18021791
1803 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1804 KnownZero, KnownOne, Depth+1);
1792 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
18051793 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
18061794 KnownZero = KnownZero.lshr(ShAmt);
18071795 KnownOne = KnownOne.lshr(ShAmt);
18081796
1809 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1797 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
18101798 KnownZero |= HighBits; // High bits known zero.
18111799 }
18121800 return;
18181806 if (ShAmt >= BitWidth)
18191807 return;
18201808
1821 APInt InDemandedMask = (Mask << ShAmt);
18221809 // If any of the demanded bits are produced by the sign extension, we also
18231810 // demand the input sign bit.
1824 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1825 if (HighBits.getBoolValue())
1826 InDemandedMask |= APInt::getSignBit(BitWidth);
1827
1828 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1829 Depth+1);
1811 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1812
1813 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
18301814 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
18311815 KnownZero = KnownZero.lshr(ShAmt);
18321816 KnownOne = KnownOne.lshr(ShAmt);
18481832
18491833 // Sign extension. Compute the demanded bits in the result that are not
18501834 // present in the input.
1851 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1835 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
18521836
18531837 APInt InSignBit = APInt::getSignBit(EBits);
1854 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1838 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
18551839
18561840 // If the sign extended bits are demanded, we know that the sign
18571841 // bit is demanded.
18591843 if (NewBits.getBoolValue())
18601844 InputDemandedBits |= InSignBit;
18611845
1862 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1863 KnownZero, KnownOne, Depth+1);
1846 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1847 KnownOne &= InputDemandedBits;
1848 KnownZero &= InputDemandedBits;
18641849 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
18651850
18661851 // If the sign bit of the input is known set or clear, then we know the
18921877 if (ISD::isZEXTLoad(Op.getNode())) {
18931878 EVT VT = LD->getMemoryVT();
18941879 unsigned MemBits = VT.getScalarType().getSizeInBits();
1895 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1880 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
18961881 } else if (const MDNode *Ranges = LD->getRanges()) {
1897 computeMaskedBitsLoad(*Ranges, Mask, KnownZero);
1882 computeMaskedBitsLoad(*Ranges, KnownZero);
18981883 }
18991884 return;
19001885 }
19011886 case ISD::ZERO_EXTEND: {
19021887 EVT InVT = Op.getOperand(0).getValueType();
19031888 unsigned InBits = InVT.getScalarType().getSizeInBits();
1904 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1905 APInt InMask = Mask.trunc(InBits);
1889 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
19061890 KnownZero = KnownZero.trunc(InBits);
19071891 KnownOne = KnownOne.trunc(InBits);
1908 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1892 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
19091893 KnownZero = KnownZero.zext(BitWidth);
19101894 KnownOne = KnownOne.zext(BitWidth);
19111895 KnownZero |= NewBits;
19151899 EVT InVT = Op.getOperand(0).getValueType();
19161900 unsigned InBits = InVT.getScalarType().getSizeInBits();
19171901 APInt InSignBit = APInt::getSignBit(InBits);
1918 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1919 APInt InMask = Mask.trunc(InBits);
1920
1921 // If any of the sign extended bits are demanded, we know that the sign
1922 // bit is demanded. Temporarily set this bit in the mask for our callee.
1923 if (NewBits.getBoolValue())
1924 InMask |= InSignBit;
1902 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
19251903
19261904 KnownZero = KnownZero.trunc(InBits);
19271905 KnownOne = KnownOne.trunc(InBits);
1928 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1906 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
19291907
19301908 // Note if the sign bit is known to be zero or one.
19311909 bool SignBitKnownZero = KnownZero.isNegative();
19321910 bool SignBitKnownOne = KnownOne.isNegative();
19331911 assert(!(SignBitKnownZero && SignBitKnownOne) &&
19341912 "Sign bit can't be known to be both zero and one!");
1935
1936 // If the sign bit wasn't actually demanded by our caller, we don't
1937 // want it set in the KnownZero and KnownOne result values. Reset the
1938 // mask and reapply it to the result values.
1939 InMask = Mask.trunc(InBits);
1940 KnownZero &= InMask;
1941 KnownOne &= InMask;
19421913
19431914 KnownZero = KnownZero.zext(BitWidth);
19441915 KnownOne = KnownOne.zext(BitWidth);
19531924 case ISD::ANY_EXTEND: {
19541925 EVT InVT = Op.getOperand(0).getValueType();
19551926 unsigned InBits = InVT.getScalarType().getSizeInBits();
1956 APInt InMask = Mask.trunc(InBits);
19571927 KnownZero = KnownZero.trunc(InBits);
19581928 KnownOne = KnownOne.trunc(InBits);
1959 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1929 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
19601930 KnownZero = KnownZero.zext(BitWidth);
19611931 KnownOne = KnownOne.zext(BitWidth);
19621932 return;
19641934 case ISD::TRUNCATE: {
19651935 EVT InVT = Op.getOperand(0).getValueType();
19661936 unsigned InBits = InVT.getScalarType().getSizeInBits();
1967 APInt InMask = Mask.zext(InBits);
19681937 KnownZero = KnownZero.zext(InBits);
19691938 KnownOne = KnownOne.zext(InBits);
1970 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1939 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
19711940 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
19721941 KnownZero = KnownZero.trunc(BitWidth);
19731942 KnownOne = KnownOne.trunc(BitWidth);
19761945 case ISD::AssertZext: {
19771946 EVT VT = cast(Op.getOperand(1))->getVT();
19781947 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1979 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1980 KnownOne, Depth+1);
1981 KnownZero |= (~InMask) & Mask;
1948 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1949 KnownZero |= (~InMask);
19821950 return;
19831951 }
19841952 case ISD::FGETSIGN:
19951963 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
19961964 // NLZ can't be BitWidth with no sign bit
19971965 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1998 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1999 Depth+1);
1966 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
20001967
20011968 // If all of the MaskV bits are known to be zero, then we know the
20021969 // output top bits are zero, because we now know that the output is
20041971 if ((KnownZero2 & MaskV) == MaskV) {
20051972 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
20061973 // Top bits known zero.
2007 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1974 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
20081975 }
20091976 }
20101977 }
20151982 // Output known-0 bits are known if clear or set in both the low clear bits
20161983 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
20171984 // low 3 bits clear.
2018 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
2019 BitWidth - Mask.countLeadingZeros());
2020 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1985 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
20211986 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
20221987 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
20231988
2024 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1989 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
20251990 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
20261991 KnownZeroOut = std::min(KnownZeroOut,
20271992 KnownZero2.countTrailingOnes());
20452010 if (RA.isPowerOf2()) {
20462011 APInt LowBits = RA - 1;
20472012 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2048 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2013 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
20492014
20502015 // The low bits of the first operand are unchanged by the srem.
20512016 KnownZero = KnownZero2 & LowBits;
20602025 // the upper bits are all one.
20612026 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
20622027 KnownOne |= ~LowBits;
2063
2064 KnownZero &= Mask;
2065 KnownOne &= Mask;
2066
20672028 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
20682029 }
20692030 }
20732034 const APInt &RA = Rem->getAPIntValue();
20742035 if (RA.isPowerOf2()) {
20752036 APInt LowBits = (RA - 1);
2076 APInt Mask2 = LowBits & Mask;
2077 KnownZero |= ~LowBits & Mask;
2078 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2037 KnownZero |= ~LowBits;
2038 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
20792039 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
20802040 break;
20812041 }
20832043
20842044 // Since the result is less than or equal to either operand, any leading
20852045 // zero bits in either operand must also exist in the result.
2086 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2087 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2088 Depth+1);
2089 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2090 Depth+1);
2046 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2047 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
20912048
20922049 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
20932050 KnownZero2.countLeadingOnes());
20942051 KnownOne.clearAllBits();
2095 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2052 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
20962053 return;
20972054 }
20982055 case ISD::FrameIndex:
21122069 case ISD::INTRINSIC_W_CHAIN:
21132070 case ISD::INTRINSIC_VOID:
21142071 // Allow the target to implement this method for its nodes.
2115 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2116 Depth);
2072 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
21172073 return;
21182074 }
21192075 }
22372193 if (ConstantSDNode *CRHS = dyn_cast(Op.getOperand(1)))
22382194 if (CRHS->isAllOnesValue()) {
22392195 APInt KnownZero, KnownOne;
2240 APInt Mask = APInt::getAllOnesValue(VTBits);
2241 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2196 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
22422197
22432198 // If the input is known to be 0 or 1, the output is 0/-1, which is all
22442199 // sign bits set.
2245 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2200 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
22462201 return VTBits;
22472202
22482203 // If we are subtracting one from a positive number, there is no carry
22632218 if (ConstantSDNode *CLHS = dyn_cast(Op.getOperand(0)))
22642219 if (CLHS->isNullValue()) {
22652220 APInt KnownZero, KnownOne;
2266 APInt Mask = APInt::getAllOnesValue(VTBits);
2267 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2221 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
22682222 // If the input is known to be 0 or 1, the output is 0/-1, which is all
22692223 // sign bits set.
2270 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2224 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
22712225 return VTBits;
22722226
22732227 // If the input is known to be positive (the sign bit is known clear),
23162270 // Finally, if we can prove that the top bits of the result are 0's or 1's,
23172271 // use this information.
23182272 APInt KnownZero, KnownOne;
2319 APInt Mask = APInt::getAllOnesValue(VTBits);
2320 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2321
2273 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2274
2275 APInt Mask;
23222276 if (KnownZero.isNegative()) { // sign bit is 0
23232277 Mask = KnownZero;
23242278 } else if (KnownOne.isNegative()) { // sign bit is 1;
60395993 int64_t GVOffset = 0;
60405994 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
60415995 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6042 APInt AllOnes = APInt::getAllOnesValue(PtrWidth);
60435996 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6044 llvm::ComputeMaskedBits(const_cast(GV), AllOnes,
6045 KnownZero, KnownOne, TLI.getTargetData());
5997 llvm::ComputeMaskedBits(const_cast(GV), KnownZero, KnownOne,
5998 TLI.getTargetData());
60465999 unsigned AlignBits = KnownZero.countTrailingOnes();
60476000 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
60486001 if (Align)
507507
508508 Worklist.push_back(CurDAG->getRoot().getNode());
509509
510 APInt Mask;
511510 APInt KnownZero;
512511 APInt KnownOne;
513512
538537 continue;
539538
540539 unsigned NumSignBits = CurDAG->ComputeNumSignBits(Src);
541 Mask = APInt::getAllOnesValue(SrcVT.getSizeInBits());
542 CurDAG->ComputeMaskedBits(Src, Mask, KnownZero, KnownOne);
540 CurDAG->ComputeMaskedBits(Src, KnownZero, KnownOne);
543541 FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne);
544542 } while (!Worklist.empty());
545543 }
14431441 APInt NeededMask = DesiredMask & ~ActualMask;
14441442
14451443 APInt KnownZero, KnownOne;
1446 CurDAG->ComputeMaskedBits(LHS, NeededMask, KnownZero, KnownOne);
1444 CurDAG->ComputeMaskedBits(LHS, KnownZero, KnownOne);
14471445
14481446 // If all the missing bits in the or are already known to be set, match!
14491447 if ((NeededMask & KnownOne) == NeededMask)
12431243 if (Depth != 0) {
12441244 // If not at the root, Just compute the KnownZero/KnownOne bits to
12451245 // simplify things downstream.
1246 TLO.DAG.ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth);
1246 TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
12471247 return false;
12481248 }
12491249 // If this is the root being simplified, allow it to have multiple uses,
12621262 switch (Op.getOpcode()) {
12631263 case ISD::Constant:
12641264 // We know all of the bits for a constant!
1265 KnownOne = cast(Op)->getAPIntValue() & NewMask;
1266 KnownZero = ~KnownOne & NewMask;
1265 KnownOne = cast(Op)->getAPIntValue();
1266 KnownZero = ~KnownOne;
12671267 return false; // Don't fall through, will infinitely loop.
12681268 case ISD::AND:
12691269 // If the RHS is a constant, check to see if the LHS would be zero without
12731273 if (ConstantSDNode *RHSC = dyn_cast(Op.getOperand(1))) {
12741274 APInt LHSZero, LHSOne;
12751275 // Do not increment Depth here; that can cause an infinite loop.
1276 TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask,
1277 LHSZero, LHSOne, Depth);
1276 TLO.DAG.ComputeMaskedBits(Op.getOperand(0), LHSZero, LHSOne, Depth);
12781277 // If the LHS already has zeros where RHSC does, this and is dead.
12791278 if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask))
12801279 return TLO.CombineTo(Op, Op.getOperand(0));
17241723
17251724 // If the sign bit is known one, the top bits match.
17261725 if (KnownOne.intersects(InSignBit)) {
1727 KnownOne |= NewBits;
1728 KnownZero &= ~NewBits;
1726 KnownOne |= NewBits;
1727 assert((KnownZero & NewBits) == 0);
17291728 } else { // Otherwise, top bits aren't known.
1730 KnownOne &= ~NewBits;
1731 KnownZero &= ~NewBits;
1729 assert((KnownOne & NewBits) == 0);
1730 assert((KnownZero & NewBits) == 0);
17321731 }
17331732 break;
17341733 }
18621861 // FALL THROUGH
18631862 default:
18641863 // Just use ComputeMaskedBits to compute output bits.
1865 TLO.DAG.ComputeMaskedBits(Op, NewMask, KnownZero, KnownOne, Depth);
1864 TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
18661865 break;
18671866 }
18681867
18781877 /// in Mask are known to be either zero or one and return them in the
18791878 /// KnownZero/KnownOne bitsets.
18801879 void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
1881 const APInt &Mask,
18821880 APInt &KnownZero,
18831881 APInt &KnownOne,
18841882 const SelectionDAG &DAG,
18891887 Op.getOpcode() == ISD::INTRINSIC_VOID) &&
18901888 "Should use MaskedValueIsZero if you don't know whether Op"
18911889 " is a target node!");
1892 KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);
1890 KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0);
18931891 }
18941892
18951893 /// ComputeNumSignBitsForTargetNode - This method can be implemented by
19331931 // Fall back to ComputeMaskedBits to catch other known cases.
19341932 EVT OpVT = Val.getValueType();
19351933 unsigned BitWidth = OpVT.getScalarType().getSizeInBits();
1936 APInt Mask = APInt::getAllOnesValue(BitWidth);
19371934 APInt KnownZero, KnownOne;
1938 DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
1935 DAG.ComputeMaskedBits(Val, KnownZero, KnownOne);
19391936 return (KnownZero.countPopulation() == BitWidth - 1) &&
19401937 (KnownOne.countPopulation() == 1);
19411938 }
82878287
82888288 if (Res.getNode()) {
82898289 APInt KnownZero, KnownOne;
8290 APInt Mask = APInt::getAllOnesValue(VT.getScalarType().getSizeInBits());
8291 DAG.ComputeMaskedBits(SDValue(N,0), Mask, KnownZero, KnownOne);
8290 DAG.ComputeMaskedBits(SDValue(N,0), KnownZero, KnownOne);
82928291 // Capture demanded bits information that would be otherwise lost.
82938292 if (KnownZero == 0xfffffffe)
82948293 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res,
88048803 }
88058804
88068805 void ARMTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
8807 const APInt &Mask,
88088806 APInt &KnownZero,
88098807 APInt &KnownOne,
88108808 const SelectionDAG &DAG,
88118809 unsigned Depth) const {
8812 KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);
8810 KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0);
88138811 switch (Op.getOpcode()) {
88148812 default: break;
88158813 case ARMISD::CMOV: {
88168814 // Bits are known zero/one if known on the LHS and RHS.
8817 DAG.ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
8815 DAG.ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
88188816 if (KnownZero == 0 && KnownOne == 0) return;
88198817
88208818 APInt KnownZeroRHS, KnownOneRHS;
8821 DAG.ComputeMaskedBits(Op.getOperand(1), Mask,
8822 KnownZeroRHS, KnownOneRHS, Depth+1);
8819 DAG.ComputeMaskedBits(Op.getOperand(1), KnownZeroRHS, KnownOneRHS, Depth+1);
88238820 KnownZero &= KnownZeroRHS;
88248821 KnownOne &= KnownOneRHS;
88258822 return;
314314 SelectionDAG &DAG) const;
315315
316316 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
317 const APInt &Mask,
318317 APInt &KnownZero,
319318 APInt &KnownOne,
320319 const SelectionDAG &DAG,
31573157 //! Compute used/known bits for a SPU operand
31583158 void
31593159 SPUTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
3160 const APInt &Mask,
31613160 APInt &KnownZero,
31623161 APInt &KnownOne,
31633162 const SelectionDAG &DAG,
120120 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
121121
122122 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
123 const APInt &Mask,
124123 APInt &KnownZero,
125124 APInt &KnownOne,
126125 const SelectionDAG &DAG,
376376 DebugLoc dl = N->getDebugLoc();
377377
378378 APInt LKZ, LKO, RKZ, RKO;
379 CurDAG->ComputeMaskedBits(Op0, APInt::getAllOnesValue(32), LKZ, LKO);
380 CurDAG->ComputeMaskedBits(Op1, APInt::getAllOnesValue(32), RKZ, RKO);
379 CurDAG->ComputeMaskedBits(Op0, LKZ, LKO);
380 CurDAG->ComputeMaskedBits(Op1, RKZ, RKO);
381381
382382 unsigned TargetMask = LKZ.getZExtValue();
383383 unsigned InsertMask = RKZ.getZExtValue();
859859 APInt LHSKnownZero, LHSKnownOne;
860860 APInt RHSKnownZero, RHSKnownOne;
861861 DAG.ComputeMaskedBits(N.getOperand(0),
862 APInt::getAllOnesValue(N.getOperand(0)
863 .getValueSizeInBits()),
864862 LHSKnownZero, LHSKnownOne);
865863
866864 if (LHSKnownZero.getBoolValue()) {
867865 DAG.ComputeMaskedBits(N.getOperand(1),
868 APInt::getAllOnesValue(N.getOperand(1)
869 .getValueSizeInBits()),
870866 RHSKnownZero, RHSKnownOne);
871867 // If all of the bits are known zero on the LHS or RHS, the add won't
872868 // carry.
921917 // (for better address arithmetic) if the LHS and RHS of the OR are
922918 // provably disjoint.
923919 APInt LHSKnownZero, LHSKnownOne;
924 DAG.ComputeMaskedBits(N.getOperand(0),
925 APInt::getAllOnesValue(N.getOperand(0)
926 .getValueSizeInBits()),
927 LHSKnownZero, LHSKnownOne);
920 DAG.ComputeMaskedBits(N.getOperand(0), LHSKnownZero, LHSKnownOne);
928921
929922 if ((LHSKnownZero.getZExtValue()|~(uint64_t)imm) == ~0ULL) {
930923 // If all of the bits are known zero on the LHS or RHS, the add won't
10371030 // (for better address arithmetic) if the LHS and RHS of the OR are
10381031 // provably disjoint.
10391032 APInt LHSKnownZero, LHSKnownOne;
1040 DAG.ComputeMaskedBits(N.getOperand(0),
1041 APInt::getAllOnesValue(N.getOperand(0)
1042 .getValueSizeInBits()),
1043 LHSKnownZero, LHSKnownOne);
1033 DAG.ComputeMaskedBits(N.getOperand(0), LHSKnownZero, LHSKnownOne);
10441034 if ((LHSKnownZero.getZExtValue()|~(uint64_t)imm) == ~0ULL) {
10451035 // If all of the bits are known zero on the LHS or RHS, the add won't
10461036 // carry.
55165506 //===----------------------------------------------------------------------===//
55175507
55185508 void PPCTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
5519 const APInt &Mask,
55205509 APInt &KnownZero,
55215510 APInt &KnownOne,
55225511 const SelectionDAG &DAG,
55235512 unsigned Depth) const {
5524 KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);
5513 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0);
55255514 switch (Op.getOpcode()) {
55265515 default: break;
55275516 case PPCISD::LBRX: {
295295 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
296296
297297 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
298 const APInt &Mask,
299298 APInt &KnownZero,
300299 APInt &KnownOne,
301300 const SelectionDAG &DAG,
831831 /// be zero. Op is expected to be a target specific node. Used by DAG
832832 /// combiner.
833833 void SparcTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
834 const APInt &Mask,
835834 APInt &KnownZero,
836835 APInt &KnownOne,
837836 const SelectionDAG &DAG,
838837 unsigned Depth) const {
839838 APInt KnownZero2, KnownOne2;
840 KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0); // Don't know anything.
839 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0);
841840
842841 switch (Op.getOpcode()) {
843842 default: break;
844843 case SPISD::SELECT_ICC:
845844 case SPISD::SELECT_FCC:
846 DAG.ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne,
847 Depth+1);
848 DAG.ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2,
849 Depth+1);
845 DAG.ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
846 DAG.ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
850847 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
851848 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
852849
4949 /// in Mask are known to be either zero or one and return them in the
5050 /// KnownZero/KnownOne bitsets.
5151 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
52 const APInt &Mask,
5352 APInt &KnownZero,
5453 APInt &KnownOne,
5554 const SelectionDAG &DAG,
895895 APInt MaskedHighBits = APInt::getHighBitsSet(X.getValueSizeInBits(),
896896 MaskLZ);
897897 APInt KnownZero, KnownOne;
898 DAG.ComputeMaskedBits(X, MaskedHighBits, KnownZero, KnownOne);
898 DAG.ComputeMaskedBits(X, KnownZero, KnownOne);
899899 if (MaskedHighBits != KnownZero) return true;
900900
901901 // We've identified a pattern that can be transformed into a single shift
80988098 unsigned BitWidth = Op0.getValueSizeInBits();
80998099 unsigned AndBitWidth = And.getValueSizeInBits();
81008100 if (BitWidth > AndBitWidth) {
8101 APInt Mask = APInt::getAllOnesValue(BitWidth), Zeros, Ones;
8102 DAG.ComputeMaskedBits(Op0, Mask, Zeros, Ones);
8101 APInt Zeros, Ones;
8102 DAG.ComputeMaskedBits(Op0, Zeros, Ones);
81038103 if (Zeros.countLeadingOnes() < BitWidth - AndBitWidth)
81048104 return SDValue();
81058105 }
1261912619 //===----------------------------------------------------------------------===//
1262012620
1262112621 void X86TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
12622 const APInt &Mask,
1262312622 APInt &KnownZero,
1262412623 APInt &KnownOne,
1262512624 const SelectionDAG &DAG,
1262612625 unsigned Depth) const {
12626 unsigned BitWidth = KnownZero.getBitWidth();
1262712627 unsigned Opc = Op.getOpcode();
1262812628 assert((Opc >= ISD::BUILTIN_OP_END ||
1262912629 Opc == ISD::INTRINSIC_WO_CHAIN ||
1263212632 "Should use MaskedValueIsZero if you don't know whether Op"
1263312633 " is a target node!");
1263412634
12635 KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0); // Don't know anything.
12635 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1263612636 switch (Opc) {
1263712637 default: break;
1263812638 case X86ISD::ADD:
1265112651 break;
1265212652 // Fallthrough
1265312653 case X86ISD::SETCC:
12654 KnownZero |= APInt::getHighBitsSet(Mask.getBitWidth(),
12655 Mask.getBitWidth() - 1);
12654 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1265612655 break;
1265712656 case ISD::INTRINSIC_WO_CHAIN: {
1265812657 unsigned IntId = cast(Op.getOperand(0))->getZExtValue();
1267712676 case Intrinsic::x86_sse2_pmovmskb_128: NumLoBits = 16; break;
1267812677 case Intrinsic::x86_avx2_pmovmskb: NumLoBits = 32; break;
1267912678 }
12680 KnownZero = APInt::getHighBitsSet(Mask.getBitWidth(),
12681 Mask.getBitWidth() - NumLoBits);
12679 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - NumLoBits);
1268212680 break;
1268312681 }
1268412682 }
503503 /// in Mask are known to be either zero or one and return them in the
504504 /// KnownZero/KnownOne bitsets.
505505 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
506 const APInt &Mask,
507506 APInt &KnownZero,
508507 APInt &KnownOne,
509508 const SelectionDAG &DAG,
11661166 if (ConstantSDNode *CN = dyn_cast(N->getOperand(1)))
11671167 return CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue());
11681168
1169 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits();
1170 APInt Mask = APInt::getAllOnesValue(BitWidth);
11711169 APInt KnownZero0, KnownOne0;
1172 CurDAG->ComputeMaskedBits(N->getOperand(0), Mask, KnownZero0, KnownOne0, 0);
1170 CurDAG->ComputeMaskedBits(N->getOperand(0), KnownZero0, KnownOne0, 0);
11731171 APInt KnownZero1, KnownOne1;
1174 CurDAG->ComputeMaskedBits(N->getOperand(1), Mask, KnownZero1, KnownOne1, 0);
1172 CurDAG->ComputeMaskedBits(N->getOperand(1), KnownZero1, KnownOne1, 0);
11751173 return (~KnownZero0 & ~KnownZero1) == 0;
11761174 }]>;
11771175
13621362 APInt KnownZero, KnownOne;
13631363 APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(),
13641364 VT.getSizeInBits() - 1);
1365 DAG.ComputeMaskedBits(N2, Mask, KnownZero, KnownOne);
1366 if (KnownZero == Mask) {
1365 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne);
1366 if ((KnownZero & Mask) == Mask) {
13671367 SDValue Carry = DAG.getConstant(0, VT);
13681368 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2);
13691369 SDValue Ops [] = { Carry, Result };
13851385 APInt KnownZero, KnownOne;
13861386 APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(),
13871387 VT.getSizeInBits() - 1);
1388 DAG.ComputeMaskedBits(N2, Mask, KnownZero, KnownOne);
1389 if (KnownZero == Mask) {
1388 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne);
1389 if ((KnownZero & Mask) == Mask) {
13901390 SDValue Borrow = N2;
13911391 SDValue Result = DAG.getNode(ISD::SUB, dl, VT,
13921392 DAG.getConstant(0, VT), N2);
14011401 APInt KnownZero, KnownOne;
14021402 APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(),
14031403 VT.getSizeInBits() - 1);
1404 DAG.ComputeMaskedBits(N2, Mask, KnownZero, KnownOne);
1405 if (KnownZero == Mask) {
1404 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne);
1405 if ((KnownZero & Mask) == Mask) {
14061406 SDValue Borrow = DAG.getConstant(0, VT);
14071407 SDValue Result = DAG.getNode(ISD::SUB, dl, VT, N0, N2);
14081408 SDValue Ops [] = { Borrow, Result };
15201520 }
15211521
15221522 void XCoreTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
1523 const APInt &Mask,
15241523 APInt &KnownZero,
15251524 APInt &KnownOne,
15261525 const SelectionDAG &DAG,
15271526 unsigned Depth) const {
1528 KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);
1527 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0);
15291528 switch (Op.getOpcode()) {
15301529 default: break;
15311530 case XCoreISD::LADD:
15321531 case XCoreISD::LSUB:
15331532 if (Op.getResNo() == 0) {
15341533 // Top bits of carry / borrow are clear.
1535 KnownZero = APInt::getHighBitsSet(Mask.getBitWidth(),
1536 Mask.getBitWidth() - 1);
1537 KnownZero &= Mask;
1534 KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(),
1535 KnownZero.getBitWidth() - 1);
15381536 }
15391537 break;
15401538 }
159159 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
160160
161161 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
162 const APInt &Mask,
163162 APInt &KnownZero,
164163 APInt &KnownOne,
165164 const SelectionDAG &DAG,
290290 return 0; // Don't do anything with FI
291291 }
292292
293 void ComputeMaskedBits(Value *V, const APInt &Mask, APInt &KnownZero,
293 void ComputeMaskedBits(Value *V, APInt &KnownZero,
294294 APInt &KnownOne, unsigned Depth = 0) const {
295 return llvm::ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD, Depth);
295 return llvm::ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth);
296296 }
297297
298298 bool MaskedValueIsZero(Value *V, const APInt &Mask,
140140 // a sub and fuse this add with it.
141141 if (LHS->hasOneUse() && (XorRHS->getValue()+1).isPowerOf2()) {
142142 IntegerType *IT = cast(I.getType());
143 APInt Mask = APInt::getAllOnesValue(IT->getBitWidth());
144143 APInt LHSKnownOne(IT->getBitWidth(), 0);
145144 APInt LHSKnownZero(IT->getBitWidth(), 0);
146 ComputeMaskedBits(XorLHS, Mask, LHSKnownZero, LHSKnownOne);
145 ComputeMaskedBits(XorLHS, LHSKnownZero, LHSKnownOne);
147146 if ((XorRHS->getValue() | LHSKnownZero).isAllOnesValue())
148147 return BinaryOperator::CreateSub(ConstantExpr::getAdd(XorRHS, CI),
149148 XorLHS);
201200
202201 // A+B --> A|B iff A and B have no bits set in common.
203202 if (IntegerType *IT = dyn_cast(I.getType())) {
204 APInt Mask = APInt::getAllOnesValue(IT->getBitWidth());
205203 APInt LHSKnownOne(IT->getBitWidth(), 0);
206204 APInt LHSKnownZero(IT->getBitWidth(), 0);
207 ComputeMaskedBits(LHS, Mask, LHSKnownZero, LHSKnownOne);
205 ComputeMaskedBits(LHS, LHSKnownZero, LHSKnownOne);
208206 if (LHSKnownZero != 0) {
209207 APInt RHSKnownOne(IT->getBitWidth(), 0);
210208 APInt RHSKnownZero(IT->getBitWidth(), 0);
211 ComputeMaskedBits(RHS, Mask, RHSKnownZero, RHSKnownOne);
209 ComputeMaskedBits(RHS, RHSKnownZero, RHSKnownOne);
212210
213211 // No bits in common -> bitwise or.
214212 if ((LHSKnownZero|RHSKnownZero).isAllOnesValue())
360360 uint32_t BitWidth = IT->getBitWidth();
361361 APInt KnownZero(BitWidth, 0);
362362 APInt KnownOne(BitWidth, 0);
363 ComputeMaskedBits(II->getArgOperand(0), APInt::getAllOnesValue(BitWidth),
364 KnownZero, KnownOne);
363 ComputeMaskedBits(II->getArgOperand(0), KnownZero, KnownOne);
365364 unsigned TrailingZeros = KnownOne.countTrailingZeros();
366365 APInt Mask(APInt::getLowBitsSet(BitWidth, TrailingZeros));
367366 if ((Mask & KnownZero) == Mask)
379378 uint32_t BitWidth = IT->getBitWidth();
380379 APInt KnownZero(BitWidth, 0);
381380 APInt KnownOne(BitWidth, 0);
382 ComputeMaskedBits(II->getArgOperand(0), APInt::getAllOnesValue(BitWidth),
383 KnownZero, KnownOne);
381 ComputeMaskedBits(II->getArgOperand(0), KnownZero, KnownOne);
384382 unsigned LeadingZeros = KnownOne.countLeadingZeros();
385383 APInt Mask(APInt::getHighBitsSet(BitWidth, LeadingZeros));
386384 if ((Mask & KnownZero) == Mask)
393391 Value *LHS = II->getArgOperand(0), *RHS = II->getArgOperand(1);
394392 IntegerType *IT = cast(II->getArgOperand(0)->getType());
395393 uint32_t BitWidth = IT->getBitWidth();
396 APInt Mask = APInt::getSignBit(BitWidth);
397394 APInt LHSKnownZero(BitWidth, 0);
398395 APInt LHSKnownOne(BitWidth, 0);
399 ComputeMaskedBits(LHS, Mask, LHSKnownZero, LHSKnownOne);
396 ComputeMaskedBits(LHS, LHSKnownZero, LHSKnownOne);
400397 bool LHSKnownNegative = LHSKnownOne[BitWidth - 1];
401398 bool LHSKnownPositive = LHSKnownZero[BitWidth - 1];
402399
403400 if (LHSKnownNegative || LHSKnownPositive) {
404401 APInt RHSKnownZero(BitWidth, 0);
405402 APInt RHSKnownOne(BitWidth, 0);
406 ComputeMaskedBits(RHS, Mask, RHSKnownZero, RHSKnownOne);
403 ComputeMaskedBits(RHS, RHSKnownZero, RHSKnownOne);
407404 bool RHSKnownNegative = RHSKnownOne[BitWidth - 1];
408405 bool RHSKnownPositive = RHSKnownZero[BitWidth - 1];
409406 if (LHSKnownNegative && RHSKnownNegative) {
487484 case Intrinsic::umul_with_overflow: {
488485 Value *LHS = II->getArgOperand(0), *RHS = II->getArgOperand(1);
489486 unsigned BitWidth = cast(LHS->getType())->getBitWidth();
490 APInt Mask = APInt::getAllOnesValue(BitWidth);
491487
492488 APInt LHSKnownZero(BitWidth, 0);
493489 APInt LHSKnownOne(BitWidth, 0);
494 ComputeMaskedBits(LHS, Mask, LHSKnownZero, LHSKnownOne);
490 ComputeMaskedBits(LHS, LHSKnownZero, LHSKnownOne);
495491 APInt RHSKnownZero(BitWidth, 0);
496492 APInt RHSKnownOne(BitWidth, 0);
497 ComputeMaskedBits(RHS, Mask, RHSKnownZero, RHSKnownOne);
493 ComputeMaskedBits(RHS, RHSKnownZero, RHSKnownOne);
498494
499495 // Get the largest possible values for each operand.
500496 APInt LHSMax = ~LHSKnownZero;
540540 // If Op1C some other power of two, convert:
541541 uint32_t BitWidth = Op1C->getType()->getBitWidth();
542542 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
543 APInt TypeMask(APInt::getAllOnesValue(BitWidth));
544 ComputeMaskedBits(ICI->getOperand(0), TypeMask, KnownZero, KnownOne);
543 ComputeMaskedBits(ICI->getOperand(0), KnownZero, KnownOne);
545544
546545 APInt KnownZeroMask(~KnownZero);
547546 if (KnownZeroMask.isPowerOf2()) { // Exactly 1 possible 1?
589588
590589 APInt KnownZeroLHS(BitWidth, 0), KnownOneLHS(BitWidth, 0);
591590 APInt KnownZeroRHS(BitWidth, 0), KnownOneRHS(BitWidth, 0);
592 APInt TypeMask(APInt::getAllOnesValue(BitWidth));
593 ComputeMaskedBits(LHS, TypeMask, KnownZeroLHS, KnownOneLHS);
594 ComputeMaskedBits(RHS, TypeMask, KnownZeroRHS, KnownOneRHS);
591 ComputeMaskedBits(LHS, KnownZeroLHS, KnownOneLHS);
592 ComputeMaskedBits(RHS, KnownZeroRHS, KnownOneRHS);
595593
596594 if (KnownZeroLHS == KnownZeroRHS && KnownOneLHS == KnownOneRHS) {
597595 APInt KnownBits = KnownZeroLHS | KnownOneLHS;
910908 ICI->isEquality() && (Op1C->isZero() || Op1C->getValue().isPowerOf2())){
911909 unsigned BitWidth = Op1C->getType()->getBitWidth();
912910 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
913 APInt TypeMask(APInt::getAllOnesValue(BitWidth));
914 ComputeMaskedBits(Op0, TypeMask, KnownZero, KnownOne);
911 ComputeMaskedBits(Op0, KnownZero, KnownOne);
915912
916913 APInt KnownZeroMask(~KnownZero);
917914 if (KnownZeroMask.isPowerOf2()) {
10271027 // of the high bits truncated out of x are known.
10281028 unsigned DstBits = LHSI->getType()->getPrimitiveSizeInBits(),
10291029 SrcBits = LHSI->getOperand(0)->getType()->getPrimitiveSizeInBits();
1030 APInt Mask(APInt::getHighBitsSet(SrcBits, SrcBits-DstBits));
10311030 APInt KnownZero(SrcBits, 0), KnownOne(SrcBits, 0);
1032 ComputeMaskedBits(LHSI->getOperand(0), Mask, KnownZero, KnownOne);
1031 ComputeMaskedBits(LHSI->getOperand(0), KnownZero, KnownOne);
10331032
10341033 // If all the high bits are known, we can do this xform.
10351034 if ((KnownZero|KnownOne).countLeadingOnes() >= SrcBits-DstBits) {
141141
142142 Instruction *I = dyn_cast(V);
143143 if (!I) {
144 ComputeMaskedBits(V, DemandedMask, KnownZero, KnownOne, Depth);
144 ComputeMaskedBits(V, KnownZero, KnownOne, Depth);
145145 return 0; // Only analyze instructions.
146146 }
147147
155155 // this instruction has a simpler value in that context.
156156 if (I->getOpcode() == Instruction::And) {
157157 // If either the LHS or the RHS are Zero, the result is zero.
158 ComputeMaskedBits(I->getOperand(1), DemandedMask,
159 RHSKnownZero, RHSKnownOne, Depth+1);
160 ComputeMaskedBits(I->getOperand(0), DemandedMask & ~RHSKnownZero,
161 LHSKnownZero, LHSKnownOne, Depth+1);
158 ComputeMaskedBits(I->getOperand(1), RHSKnownZero, RHSKnownOne, Depth+1);
159 ComputeMaskedBits(I->getOperand(0), LHSKnownZero, LHSKnownOne, Depth+1);
162160
163161 // If all of the demanded bits are known 1 on one side, return the other.
164162 // These bits cannot contribute to the result of the 'and' in this
179177 // only bits from X or Y are demanded.
180178
181179 // If either the LHS or the RHS are One, the result is One.
182 ComputeMaskedBits(I->getOperand(1), DemandedMask,
183 RHSKnownZero, RHSKnownOne, Depth+1);
184 ComputeMaskedBits(I->getOperand(0), DemandedMask & ~RHSKnownOne,
185 LHSKnownZero, LHSKnownOne, Depth+1);
180 ComputeMaskedBits(I->getOperand(1), RHSKnownZero, RHSKnownOne, Depth+1);
181 ComputeMaskedBits(I->getOperand(0), LHSKnownZero, LHSKnownOne, Depth+1);
186182
187183 // If all of the demanded bits are known zero on one side, return the
188184 // other. These bits cannot contribute to the result of the 'or' in this
205201 }
206202
207203 // Compute the KnownZero/KnownOne bits to simplify things downstream.
208 ComputeMaskedBits(I, DemandedMask, KnownZero, KnownOne, Depth);
204 ComputeMaskedBits(I, KnownZero, KnownOne, Depth);
209205 return 0;
210206 }
211207
218214
219215 switch (I->getOpcode()) {
220216 default:
221 ComputeMaskedBits(I, DemandedMask, KnownZero, KnownOne, Depth);
217 ComputeMaskedBits(I, KnownZero, KnownOne, Depth);
222218 break;
223219 case Instruction::And:
224220 // If either the LHS or the RHS are Zero, the result is zero.
569565
570566 // Otherwise just hand the sub off to ComputeMaskedBits to fill in
571567 // the known zeros and ones.
572 ComputeMaskedBits(V, DemandedMask, KnownZero, KnownOne, Depth);
568 ComputeMaskedBits(V, KnownZero, KnownOne, Depth);
573569
574570 // Turn this into a xor if LHS is 2^n-1 and the remaining bits are known
575571 // zero.
728724 // The sign bit is the LHS's sign bit, except when the result of the
729725 // remainder is zero.
730726 if (DemandedMask.isNegative() && KnownZero.isNonNegative()) {
731 APInt Mask2 = APInt::getSignBit(BitWidth);
732727 APInt LHSKnownZero(BitWidth, 0), LHSKnownOne(BitWidth, 0);
733 ComputeMaskedBits(I->getOperand(0), Mask2, LHSKnownZero, LHSKnownOne,
734 Depth+1);
728 ComputeMaskedBits(I->getOperand(0), LHSKnownZero, LHSKnownOne, Depth+1);
735729 // If it's known zero, our sign bit is also zero.
736730 if (LHSKnownZero.isNegative())
737731 KnownZero |= LHSKnownZero;
794788 return 0;
795789 }
796790 }
797 ComputeMaskedBits(V, DemandedMask, KnownZero, KnownOne, Depth);
791 ComputeMaskedBits(V, KnownZero, KnownOne, Depth);
798792 break;
799793 }
800794
761761 assert(V->getType()->isPointerTy() &&
762762 "getOrEnforceKnownAlignment expects a pointer!");
763763 unsigned BitWidth = TD ? TD->getPointerSizeInBits() : 64;
764 APInt Mask = APInt::getAllOnesValue(BitWidth);
765764 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
766 ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD);
765 ComputeMaskedBits(V, KnownZero, KnownOne, TD);
767766 unsigned TrailZ = KnownZero.countTrailingOnes();
768767
769768 // Avoid trouble with rediculously large TrailZ values, such as
25612561 Value *Cond = SI->getCondition();
25622562 unsigned Bits = cast(Cond->getType())->getBitWidth();
25632563 APInt KnownZero(Bits, 0), KnownOne(Bits, 0);
2564 ComputeMaskedBits(Cond, APInt::getAllOnesValue(Bits), KnownZero, KnownOne);
2564 ComputeMaskedBits(Cond, KnownZero, KnownOne);
25652565
25662566 // Gather dead cases.
25672567 SmallVector DeadCases;
0 ; RUN: opt < %s -instcombine -S | FileCheck %s
1
2 define zeroext i1 @_Z3fooPb(i8* nocapture %x) {
3 entry:
4 %a = load i8* %x, align 1, !range !0
5 %b = and i8 %a, 1
6 %tobool = icmp ne i8 %b, 0
7 ret i1 %tobool
8 }
9
10 ; CHECK: %a = load i8* %x, align 1, !range !0
11 ; CHECK-NEXT: %tobool = icmp ne i8 %a, 0
12 ; CHECK-NEXT: ret i1 %tobool
13
14 !0 = metadata !{i8 0, i8 2}