llvm.org GIT mirror llvm / 24f5e55
[msan] Workaround for invalid origins in shufflevector. Makes origin propagation ignore literal undef operands, and, in general, any operand we don't have origin for. https://code.google.com/p/memory-sanitizer/issues/detail?id=56 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210472 91177308-0d34-0410-b5e6-96231b3b80d8 Evgeniy Stepanov 5 years ago
2 changed file(s) with 27 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
13011301 if (!Origin) {
13021302 Origin = OpOrigin;
13031303 } else {
1304 Value *FlatShadow = MSV->convertToShadowTyNoVec(OpShadow, IRB);
1305 Value *Cond = IRB.CreateICmpNE(FlatShadow,
1306 MSV->getCleanShadow(FlatShadow));
1307 Origin = IRB.CreateSelect(Cond, OpOrigin, Origin);
1304 Constant *ConstOrigin = dyn_cast(OpOrigin);
1305 // No point in adding something that might result in 0 origin value.
1306 if (!ConstOrigin || !ConstOrigin->isNullValue()) {
1307 Value *FlatShadow = MSV->convertToShadowTyNoVec(OpShadow, IRB);
1308 Value *Cond =
1309 IRB.CreateICmpNE(FlatShadow, MSV->getCleanShadow(FlatShadow));
1310 Origin = IRB.CreateSelect(Cond, OpOrigin, Origin);
1311 }
13081312 }
13091313 }
13101314 return *this;
0 ; RUN: opt < %s -msan -msan-check-access-address=0 -msan-track-origins=1 -S | FileCheck -check-prefix=CHECK -check-prefix=CHECK %s
1
2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
3 target triple = "x86_64-unknown-linux-gnu"
4
5 ; Test that result origin is directy propagated from the argument,
6 ; and is not affected by all the literal undef operands.
7 ; https://code.google.com/p/memory-sanitizer/issues/detail?id=56
8
9 define <4 x i32> @Shuffle(<4 x i32> %x) nounwind uwtable sanitize_memory {
10 entry:
11 %y = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32>
12 ret <4 x i32> %y
13 }
14
15 ; CHECK-LABEL: @Shuffle(
16 ; CHECK: [[A:%.*]] = load i32* {{.*}}@__msan_param_origin_tls,
17 ; CHECK: store i32 [[A]], i32* @__msan_retval_origin_tls
18 ; CHECK: ret <4 x i32>