llvm.org GIT mirror llvm / 241ac1b
Support for inserting profile-directed cache prefetches Summary: Support for profile-driven cache prefetching (X86) This change is part of a larger system, consisting of a cache prefetches recommender, create_llvm_prof (https://github.com/google/autofdo), and LLVM. A proof of concept recommender is DynamoRIO's cache miss analyzer. It processes memory access traces obtained from a running binary and identifies patterns in cache misses. Based on them, it produces a csv file with recommendations. The expectation is that, by leveraging such recommendations, we can reduce the amount of clock cycles spent waiting for data from memory. A microbenchmark based on the DynamoRIO analyzer is available as a proof of concept: https://goo.gl/6TM2Xp. The recommender makes prefetch recommendations in terms of: * the binary offset of an instruction with a memory operand; * a delta; * and a type (nta, t0, t1, t2) meaning: a prefetch of that type should be inserted right before the instrution at that binary offset, and the prefetch should be for an address delta away from the memory address the instruction will access. For example: 0x400ab2,64,nta and assuming the instruction at 0x400ab2 is: movzbl (%rbx,%rdx,1),%edx means that the recommender determined it would be beneficial for a prefetchnta instruction to be inserted right before this instruction, as such: prefetchnta 0x40(%rbx,%rdx,1) movzbl (%rbx, %rdx, 1), %edx The workflow for prefetch cache instrumentation is as follows (the proof of concept script details these steps as well): 1. build binary, making sure -gmlt -fdebug-info-for-profiling is passed. The latter option will enable the X86DiscriminateMemOps pass, which ensures instructions with memory operands are uniquely identifiable (this causes ~2% size increase in total binary size due to the additional debug information). 2. collect memory traces, run analysis to obtain recommendations (see above-referenced DynamoRIO demo as a proof of concept). 3. use create_llvm_prof to convert recommendations to reference insertion locations in terms of debug info locations. 4. rebuild binary, using the exact same set of arguments used initially, to which -mllvm -prefetch-hints-file=<file> needs to be added, using the afdo file obtained at step 3. Note that if sample profiling feedback-driven optimization is also desired, that happens before step 1 above. In this case, the sample profile afdo file that was used to produce the binary at step 1 must also be included in step 4. The data needed by the compiler in order to identify prefetch insertion points is very similar to what is needed for sample profiles. For this reason, and given that the overall approach (memory tracing-based cache recommendation mechanisms) is under active development, we use the afdo format as a syntax for capturing this information. We avoid confusing semantics with sample profile afdo data by feeding the two types of information to the compiler through separate files and compiler flags. Should the approach prove successful, we can investigate improvements to this encoding mechanism. Reviewers: davidxl, wmi, craig.topper Reviewed By: davidxl, wmi, craig.topper Subscribers: davide, danielcdh, mgorny, aprantl, eraman, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D54052 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@347596 91177308-0d34-0410-b5e6-96231b3b80d8 Mircea Trofin 1 year, 9 months ago
13 changed file(s) with 662 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
2929 X86CmovConversion.cpp
3030 X86CondBrFolding.cpp
3131 X86DomainReassignment.cpp
32 X86DiscriminateMemOps.cpp
3233 X86ExpandPseudo.cpp
3334 X86FastISel.cpp
3435 X86FixupBWInsts.cpp
4344 X86ISelLowering.cpp
4445 X86IndirectBranchTracking.cpp
4546 X86InterleavedAccess.cpp
47 X86InsertPrefetch.cpp
4648 X86InstrFMA3Info.cpp
4749 X86InstrFoldTables.cpp
4850 X86InstrInfo.cpp
121121 /// This pass creates the thunks for the retpoline feature.
122122 FunctionPass *createX86RetpolineThunksPass();
123123
124 /// This pass ensures instructions featuring a memory operand
125 /// have distinctive (with respect to eachother)
126 FunctionPass *createX86DiscriminateMemOpsPass();
127
128 /// This pass applies profiling information to insert cache prefetches.
129 FunctionPass *createX86InsertPrefetchPass();
130
124131 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
125132 X86Subtarget &,
126133 X86RegisterBankInfo &);
0 //===- X86DiscriminateMemOps.cpp - Unique IDs for Mem Ops -----------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// This pass aids profile-driven cache prefetch insertion by ensuring all
10 /// instructions that have a memory operand are distinguishible from each other.
11 ///
12 //===----------------------------------------------------------------------===//
13
14 #include "X86.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "llvm/CodeGen/MachineModuleInfo.h"
20 #include "llvm/IR/DebugInfoMetadata.h"
21 #include "llvm/ProfileData/SampleProf.h"
22 #include "llvm/ProfileData/SampleProfReader.h"
23 #include "llvm/Transforms/IPO/SampleProfile.h"
24 using namespace llvm;
25
26 namespace {
27
28 using Location = std::pair;
29
30 Location diToLocation(const DILocation *Loc) {
31 return std::make_pair(Loc->getFilename(), Loc->getLine());
32 }
33
34 /// Ensure each instruction having a memory operand has a distinct
35 /// Discriminator> pair.
36 void updateDebugInfo(MachineInstr *MI, const DILocation *Loc) {
37 DebugLoc DL(Loc);
38 MI->setDebugLoc(DL);
39 }
40
41 class X86DiscriminateMemOps : public MachineFunctionPass {
42 bool runOnMachineFunction(MachineFunction &MF) override;
43
44 public:
45 static char ID;
46
47 /// Default construct and initialize the pass.
48 X86DiscriminateMemOps();
49 };
50
51 } // end anonymous namespace
52
53 //===----------------------------------------------------------------------===//
54 // Implementation
55 //===----------------------------------------------------------------------===//
56
57 char X86DiscriminateMemOps::ID = 0;
58
59 /// Default construct and initialize the pass.
60 X86DiscriminateMemOps::X86DiscriminateMemOps() : MachineFunctionPass(ID) {}
61
62 bool X86DiscriminateMemOps::runOnMachineFunction(MachineFunction &MF) {
63 DISubprogram *FDI = MF.getFunction().getSubprogram();
64 if (!FDI || !FDI->getUnit()->getDebugInfoForProfiling())
65 return false;
66
67 // Have a default DILocation, if we find instructions with memops that don't
68 // have any debug info.
69 const DILocation *ReferenceDI =
70 DILocation::get(FDI->getContext(), FDI->getLine(), 0, FDI);
71
72 DenseMap MemOpDiscriminators;
73 MemOpDiscriminators[diToLocation(ReferenceDI)] = 0;
74
75 // Figure out the largest discriminator issued for each Location. When we
76 // issue new discriminators, we can thus avoid issuing discriminators
77 // belonging to instructions that don't have memops. This isn't a requirement
78 // for the goals of this pass, however, it avoids unnecessary ambiguity.
79 for (auto &MBB : MF) {
80 for (auto &MI : MBB) {
81 const auto &DI = MI.getDebugLoc();
82 if (!DI)
83 continue;
84 Location Loc = diToLocation(DI);
85 MemOpDiscriminators[Loc] =
86 std::max(MemOpDiscriminators[Loc], DI->getBaseDiscriminator());
87 }
88 }
89
90 // Keep track of the discriminators seen at each Location. If an instruction's
91 // DebugInfo has a Location and discriminator we've already seen, replace its
92 // discriminator with a new one, to guarantee uniqueness.
93 DenseMap> Seen;
94
95 bool Changed = false;
96 for (auto &MBB : MF) {
97 for (auto &MI : MBB) {
98 if (X86II::getMemoryOperandNo(MI.getDesc().TSFlags) < 0)
99 continue;
100 const DILocation *DI = MI.getDebugLoc();
101 if (!DI) {
102 DI = ReferenceDI;
103 }
104 DenseSet &Set = Seen[diToLocation(DI)];
105 std::pair::iterator, bool> P =
106 Set.insert(DI->getBaseDiscriminator());
107 if (!P.second) {
108 DI = DI->setBaseDiscriminator(++MemOpDiscriminators[diToLocation(DI)]);
109 updateDebugInfo(&MI, DI);
110 Changed = true;
111 *P.first = DI->getBaseDiscriminator();
112 }
113
114 // Bump the reference DI to avoid cramming discriminators on line 0.
115 // FIXME(mtrofin): pin ReferenceDI on blocks or first instruction with DI
116 // in a block. It's more consistent than just relying on the last memop
117 // instruction we happened to see.
118 ReferenceDI = DI;
119 }
120 }
121 return Changed;
122 }
123
124 FunctionPass *llvm::createX86DiscriminateMemOpsPass() {
125 return new X86DiscriminateMemOps();
126 }
0 //===------- X86InsertPrefetch.cpp - Insert cache prefetch hints ----------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass applies cache prefetch instructions based on a profile. The pass
10 // assumes DiscriminateMemOps ran immediately before, to ensure debug info
11 // matches the one used at profile generation time. The profile is encoded in
12 // afdo format (text or binary). It contains prefetch hints recommendations.
13 // Each recommendation is made in terms of debug info locations, a type (i.e.
14 // nta, t{0|1|2}) and a delta. The debug info identifies an instruction with a
15 // memory operand (see X86DiscriminateMemOps). The prefetch will be made for
16 // a location at that memory operand + the delta specified in the
17 // recommendation.
18 //
19 //===----------------------------------------------------------------------===//
20
21 #include "X86.h"
22 #include "X86InstrBuilder.h"
23 #include "X86InstrInfo.h"
24 #include "X86MachineFunctionInfo.h"
25 #include "X86Subtarget.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/IR/DebugInfoMetadata.h"
28 #include "llvm/ProfileData/SampleProf.h"
29 #include "llvm/ProfileData/SampleProfReader.h"
30 #include "llvm/Transforms/IPO/SampleProfile.h"
31 using namespace llvm;
32 using namespace sampleprof;
33
34 static cl::opt
35 PrefetchHintsFile("prefetch-hints-file",
36 cl::desc("Path to the prefetch hints profile."),
37 cl::Hidden);
38 namespace {
39
40 class X86InsertPrefetch : public MachineFunctionPass {
41 void getAnalysisUsage(AnalysisUsage &AU) const override;
42 bool doInitialization(Module &) override;
43
44 bool runOnMachineFunction(MachineFunction &MF) override;
45 struct PrefetchInfo {
46 unsigned InstructionID;
47 int64_t Delta;
48 };
49 typedef SmallVectorImpl Prefetches;
50 bool findPrefetchInfo(const FunctionSamples *Samples, const MachineInstr &MI,
51 Prefetches &prefetches) const;
52
53 public:
54 static char ID;
55 X86InsertPrefetch(const std::string &PrefetchHintsFilename);
56
57 private:
58 std::string Filename;
59 std::unique_ptr Reader;
60 };
61
62 using PrefetchHints = SampleRecord::CallTargetMap;
63
64 // Return any prefetching hints for the specified MachineInstruction. The hints
65 // are returned as pairs (name, delta).
66 ErrorOr getPrefetchHints(const FunctionSamples *TopSamples,
67 const MachineInstr &MI) {
68 if (const auto &Loc = MI.getDebugLoc())
69 if (const auto *Samples = TopSamples->findFunctionSamples(Loc))
70 return Samples->findCallTargetMapAt(FunctionSamples::getOffset(Loc),
71 Loc->getBaseDiscriminator());
72 return std::error_code();
73 }
74
75 } // end anonymous namespace
76
77 //===----------------------------------------------------------------------===//
78 // Implementation
79 //===----------------------------------------------------------------------===//
80
81 char X86InsertPrefetch::ID = 0;
82
83 X86InsertPrefetch::X86InsertPrefetch(const std::string &PrefetchHintsFilename)
84 : MachineFunctionPass(ID), Filename(PrefetchHintsFilename) {}
85
86 /// Return true if the provided MachineInstruction has cache prefetch hints. In
87 /// that case, the prefetch hints are stored, in order, in the Prefetches
88 /// vector.
89 bool X86InsertPrefetch::findPrefetchInfo(const FunctionSamples *TopSamples,
90 const MachineInstr &MI,
91 Prefetches &Prefetches) const {
92 assert(Prefetches.empty() &&
93 "Expected caller passed empty PrefetchInfo vector.");
94 static const std::pair HintTypes[] = {
95 {"_nta_", X86::PREFETCHNTA},
96 {"_t0_", X86::PREFETCHT0},
97 {"_t1_", X86::PREFETCHT1},
98 {"_t2_", X86::PREFETCHT2},
99 };
100 static const char *SerializedPrefetchPrefix = "__prefetch";
101
102 const ErrorOr T = getPrefetchHints(TopSamples, MI);
103 if (!T)
104 return false;
105 int16_t max_index = -1;
106 // Convert serialized prefetch hints into PrefetchInfo objects, and populate
107 // the Prefetches vector.
108 for (const auto &S_V : *T) {
109 StringRef Name = S_V.getKey();
110 if (Name.consume_front(SerializedPrefetchPrefix)) {
111 int64_t D = static_cast(S_V.second);
112 unsigned IID = 0;
113 for (const auto &HintType : HintTypes) {
114 if (Name.startswith(HintType.first)) {
115 Name = Name.drop_front(HintType.first.size());
116 IID = HintType.second;
117 break;
118 }
119 }
120 if (IID == 0)
121 return false;
122 uint8_t index = 0;
123 Name.consumeInteger(10, index);
124
125 if (index >= Prefetches.size())
126 Prefetches.resize(index + 1);
127 Prefetches[index] = {IID, D};
128 max_index = std::max(max_index, static_cast(index));
129 }
130 }
131 assert(max_index + 1 >= 0 &&
132 "Possible overflow: max_index + 1 should be positive.");
133 assert(static_cast(max_index + 1) == Prefetches.size() &&
134 "The number of prefetch hints received should match the number of "
135 "PrefetchInfo objects returned");
136 return !Prefetches.empty();
137 }
138
139 bool X86InsertPrefetch::doInitialization(Module &M) {
140 if (Filename.empty())
141 return false;
142
143 LLVMContext &Ctx = M.getContext();
144 ErrorOr> ReaderOrErr =
145 SampleProfileReader::create(Filename, Ctx);
146 if (std::error_code EC = ReaderOrErr.getError()) {
147 std::string Msg = "Could not open profile: " + EC.message();
148 Ctx.diagnose(DiagnosticInfoSampleProfile(Filename, Msg,
149 DiagnosticSeverity::DS_Warning));
150 return false;
151 }
152 Reader = std::move(ReaderOrErr.get());
153 Reader->read();
154 return true;
155 }
156
157 void X86InsertPrefetch::getAnalysisUsage(AnalysisUsage &AU) const {
158 AU.setPreservesAll();
159 AU.addRequired();
160 }
161
162 bool X86InsertPrefetch::runOnMachineFunction(MachineFunction &MF) {
163 if (!Reader)
164 return false;
165 const FunctionSamples *Samples = Reader->getSamplesFor(MF.getFunction());
166 if (!Samples)
167 return false;
168
169 bool Changed = false;
170
171 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
172 SmallVector Prefetches;
173 for (auto &MBB : MF) {
174 for (auto MI = MBB.instr_begin(); MI != MBB.instr_end();) {
175 auto Current = MI;
176 ++MI;
177
178 int Offset = X86II::getMemoryOperandNo(Current->getDesc().TSFlags);
179 if (Offset < 0)
180 continue;
181 Prefetches.clear();
182 if (!findPrefetchInfo(Samples, *Current, Prefetches))
183 continue;
184 assert(!Prefetches.empty() &&
185 "The Prefetches vector should contain at least a value if "
186 "findPrefetchInfo returned true.");
187 for (auto &PrefInfo : Prefetches) {
188 unsigned PFetchInstrID = PrefInfo.InstructionID;
189 int64_t Delta = PrefInfo.Delta;
190 const MCInstrDesc &Desc = TII->get(PFetchInstrID);
191 MachineInstr *PFetch =
192 MF.CreateMachineInstr(Desc, Current->getDebugLoc(), true);
193 MachineInstrBuilder MIB(MF, PFetch);
194 unsigned Bias = X86II::getOperandBias(Current->getDesc());
195 int MemOpOffset = Offset + Bias;
196
197 assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 &&
198 X86::AddrIndexReg == 2 && X86::AddrDisp == 3 &&
199 X86::AddrSegmentReg == 4 &&
200 "Unexpected change in X86 operand offset order.");
201
202 // This assumes X86::AddBaseReg = 0, {...}ScaleAmt = 1, etc.
203 // FIXME(mtrofin): consider adding a:
204 // MachineInstrBuilder::set(unsigned offset, op).
205 MIB.addReg(Current->getOperand(MemOpOffset + X86::AddrBaseReg).getReg())
206 .addImm(
207 Current->getOperand(MemOpOffset + X86::AddrScaleAmt).getImm())
208 .addReg(
209 Current->getOperand(MemOpOffset + X86::AddrIndexReg).getReg())
210 .addImm(Current->getOperand(MemOpOffset + X86::AddrDisp).getImm() +
211 Delta)
212 .addReg(Current->getOperand(MemOpOffset + X86::AddrSegmentReg)
213 .getReg());
214
215 if (!Current->memoperands_empty()) {
216 MachineMemOperand *CurrentOp = *(Current->memoperands_begin());
217 MIB.addMemOperand(MF.getMachineMemOperand(
218 CurrentOp, CurrentOp->getOffset() + Delta, CurrentOp->getSize()));
219 }
220
221 // Insert before Current. This is because Current may clobber some of
222 // the registers used to describe the input memory operand.
223 MBB.insert(Current, PFetch);
224 Changed = true;
225 }
226 }
227 }
228 return Changed;
229 }
230
231 FunctionPass *llvm::createX86InsertPrefetchPass() {
232 return new X86InsertPrefetch(PrefetchHintsFile);
233 }
496496 addPass(createX86FixupLEAs());
497497 addPass(createX86EvexToVexInsts());
498498 }
499 addPass(createX86DiscriminateMemOpsPass());
500 addPass(createX86InsertPrefetchPass());
499501 }
500502
501503 void X86PassConfig::addPreEmitPass2() {
0 ; RUN: llc < %s | FileCheck %s
1 ;
2 ; original source, compiled with -O3 -gmlt -fdebug-info-for-profiling:
3 ; int sum(int* arr, int pos1, int pos2) {
4 ; return arr[pos1] + arr[pos2];
5 ; }
6 ;
7 ; ModuleID = 'test.cc'
8 source_filename = "test.cc"
9 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
10 target triple = "x86_64-unknown-linux-gnu"
11
12 ; Function Attrs: norecurse nounwind readonly uwtable
13 define i32 @sum(i32* %arr, i32 %pos1, i32 %pos2) !dbg !7 {
14 entry:
15 %idxprom = sext i32 %pos1 to i64, !dbg !9
16 %arrayidx = getelementptr inbounds i32, i32* %arr, i64 %idxprom, !dbg !9
17 %0 = load i32, i32* %arrayidx, align 4, !dbg !9, !tbaa !10
18 %idxprom1 = sext i32 %pos2 to i64, !dbg !14
19 %arrayidx2 = getelementptr inbounds i32, i32* %arr, i64 %idxprom1, !dbg !14
20 %1 = load i32, i32* %arrayidx2, align 4, !dbg !14, !tbaa !10
21 %add = add nsw i32 %1, %0, !dbg !15
22 ret i32 %add, !dbg !16
23 }
24
25 attributes #0 = { "target-cpu"="x86-64" }
26
27 !llvm.dbg.cu = !{!0}
28 !llvm.module.flags = !{!3, !4, !5}
29 !llvm.ident = !{!6}
30
31 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2, debugInfoForProfiling: true)
32 !1 = !DIFile(filename: "test.cc", directory: "/tmp")
33 !2 = !{}
34 !3 = !{i32 2, !"Dwarf Version", i32 4}
35 !4 = !{i32 2, !"Debug Info Version", i32 3}
36 !5 = !{i32 1, !"wchar_size", i32 4}
37 !6 = !{!"clang version 7.0.0 (trunk 322155) (llvm/trunk 322159)"}
38 !7 = distinct !DISubprogram(name: "sum", linkageName: "sum", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
39 !8 = !DISubroutineType(types: !2)
40 !9 = !DILocation(line: 2, column: 10, scope: !7)
41 !10 = !{!11, !11, i64 0}
42 !11 = !{!"int", !12, i64 0}
43 !12 = !{!"omnipotent char", !13, i64 0}
44 !13 = !{!"Simple C++ TBAA"}
45 !14 = !DILocation(line: 2, column: 22, scope: !7)
46 !15 = !DILocation(line: 2, column: 20, scope: !7)
47 !16 = !DILocation(line: 2, column: 3, scope: !7)
48
49 ;CHECK-LABEL: sum:
50 ;CHECK: # %bb.0:
51 ;CHECK: movl (%rdi,%rax,4), %eax
52 ;CHECK-NEXT: .loc 1 2 20 discriminator 2 # test.cc:2:20
53 ;CHECK-NEXT: addl (%rdi,%rcx,4), %eax
54 ;CHECK-NEXT: .loc 1 2 3 # test.cc:2:3
0 caller:0:0
1 2:sum:0
2 3: 0 __prefetch_nta_0:23456
3 3.1: 0 __prefetch_nta_0:8764 __prefetch_nta_1:64
0 ; RUN: llc < %s -prefetch-hints-file=%S/insert-prefetch-inline.afdo | FileCheck %s
1 ;
2 ; Verify we can insert prefetch instructions in code belonging to inlined
3 ; functions.
4 ;
5 ; ModuleID = 'test.cc'
6
7 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
8 target triple = "x86_64-unknown-linux-gnu"
9
10 ; Function Attrs: norecurse nounwind readonly uwtable
11 define dso_local i32 @sum(i32* nocapture readonly %arr, i32 %pos1, i32 %pos2) local_unnamed_addr #0 !dbg !7 {
12 entry:
13 %idxprom = sext i32 %pos1 to i64, !dbg !10
14 %arrayidx = getelementptr inbounds i32, i32* %arr, i64 %idxprom, !dbg !10
15 %0 = load i32, i32* %arrayidx, align 4, !dbg !10, !tbaa !11
16 %idxprom1 = sext i32 %pos2 to i64, !dbg !15
17 %arrayidx2 = getelementptr inbounds i32, i32* %arr, i64 %idxprom1, !dbg !15
18 %1 = load i32, i32* %arrayidx2, align 4, !dbg !15, !tbaa !11
19 %add = add nsw i32 %1, %0, !dbg !16
20 ret i32 %add, !dbg !17
21 }
22
23 ; "caller" inlines "sum". The associated .afdo file references instructions
24 ; in "caller" that came from "sum"'s inlining.
25 ;
26 ; Function Attrs: norecurse nounwind readonly uwtable
27 define dso_local i32 @caller(i32* nocapture readonly %arr) local_unnamed_addr #0 !dbg !18 {
28 entry:
29 %0 = load i32, i32* %arr, align 4, !dbg !19, !tbaa !11
30 %arrayidx2.i = getelementptr inbounds i32, i32* %arr, i64 2, !dbg !21
31 %1 = load i32, i32* %arrayidx2.i, align 4, !dbg !21, !tbaa !11
32 %add.i = add nsw i32 %1, %0, !dbg !22
33 ret i32 %add.i, !dbg !23
34 }
35
36 attributes #0 = { "target-cpu"="x86-64" }
37
38 !llvm.dbg.cu = !{!0}
39 !llvm.module.flags = !{!3, !4, !5}
40 !llvm.ident = !{!6}
41
42 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 7.0.0 (trunk 324940) (llvm/trunk 324941)", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2, debugInfoForProfiling: true)
43 !1 = !DIFile(filename: "test.cc", directory: "/tmp")
44 !2 = !{}
45 !3 = !{i32 2, !"Dwarf Version", i32 4}
46 !4 = !{i32 2, !"Debug Info Version", i32 3}
47 !5 = !{i32 1, !"wchar_size", i32 4}
48 !6 = !{!"clang version 7.0.0 (trunk 324940) (llvm/trunk 324941)"}
49 !7 = distinct !DISubprogram(name: "sum", linkageName: "sum", scope: !8, file: !8, line: 3, type: !9, isLocal: false, isDefinition: true, scopeLine: 3, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
50 !8 = !DIFile(filename: "./test.h", directory: "/tmp")
51 !9 = !DISubroutineType(types: !2)
52 !10 = !DILocation(line: 6, column: 10, scope: !7)
53 !11 = !{!12, !12, i64 0}
54 !12 = !{!"int", !13, i64 0}
55 !13 = !{!"omnipotent char", !14, i64 0}
56 !14 = !{!"Simple C++ TBAA"}
57 !15 = !DILocation(line: 6, column: 22, scope: !7)
58 !16 = !DILocation(line: 6, column: 20, scope: !7)
59 !17 = !DILocation(line: 6, column: 3, scope: !7)
60 !18 = distinct !DISubprogram(name: "caller", linkageName: "caller", scope: !1, file: !1, line: 4, type: !9, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
61 !19 = !DILocation(line: 6, column: 10, scope: !7, inlinedAt: !20)
62 !20 = distinct !DILocation(line: 6, column: 10, scope: !18)
63 !21 = !DILocation(line: 6, column: 22, scope: !7, inlinedAt: !20)
64 !22 = !DILocation(line: 6, column: 20, scope: !7, inlinedAt: !20)
65 !23 = !DILocation(line: 6, column: 3, scope: !18)
66
67 ; CHECK-LABEL: caller:
68 ; CHECK-LABEL: # %bb.0:
69 ; CHECK-NEXT: .loc 1 6 22 prologue_end
70 ; CHECK-NEXT: prefetchnta 23464(%rdi)
71 ; CHECK-NEXT: movl 8(%rdi), %eax
72 ; CHECK-NEXT: .loc 1 6 20 is_stmt 0 discriminator 2
73 ; CHECK-NEXT: prefetchnta 8764(%rdi)
74 ; CHECK-NEXT: prefetchnta 64(%rdi)
75 ; CHECK-NEXT: addl (%rdi), %eax
0 ; RUN: llc < %s -prefetch-hints-file=%S/insert-prefetch-nomemop.afdo | FileCheck %s
1 ; ModuleID = 'prefetch.cc'
2 source_filename = "prefetch.cc"
3 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4 target triple = "x86_64-unknown-linux-gnu"
5
6 ; Function Attrs: norecurse nounwind uwtable
7 define dso_local i32 @main() local_unnamed_addr #0 !dbg !7 {
8 entry:
9 tail call void @llvm.prefetch(i8* inttoptr (i64 291 to i8*), i32 0, i32 0, i32 1), !dbg !9
10 tail call void @llvm.x86.avx512.gatherpf.dpd.512(i8 97, <8 x i32> undef, i8* null, i32 1, i32 2), !dbg !10
11 ret i32 291, !dbg !11
12 }
13
14 ; Function Attrs: inaccessiblemem_or_argmemonly nounwind
15 declare void @llvm.prefetch(i8* nocapture readonly, i32, i32, i32) #1
16
17 ; Function Attrs: argmemonly nounwind
18 declare void @llvm.x86.avx512.gatherpf.dpd.512(i8, <8 x i32>, i8*, i32, i32) #2
19
20 attributes #0 = {"target-cpu"="x86-64" "target-features"="+avx512pf,+sse4.2,+ssse3"}
21 attributes #1 = { inaccessiblemem_or_argmemonly nounwind }
22 attributes #2 = { argmemonly nounwind }
23
24 !llvm.dbg.cu = !{!0}
25 !llvm.module.flags = !{!3, !4, !5}
26 !llvm.ident = !{!6}
27
28 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2, debugInfoForProfiling: true)
29 !1 = !DIFile(filename: "prefetch.cc", directory: "/tmp")
30 !2 = !{}
31 !3 = !{i32 2, !"Dwarf Version", i32 4}
32 !4 = !{i32 2, !"Debug Info Version", i32 3}
33 !5 = !{i32 1, !"wchar_size", i32 4}
34 !6 = !{!"clang version 7.0.0 (trunk 327078) (llvm/trunk 327086)"}
35 !7 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 8, type: !8, isLocal: false, isDefinition: true, scopeLine: 8, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
36 !8 = !DISubroutineType(types: !2)
37 !9 = !DILocation(line: 12, column: 3, scope: !7)
38 !10 = !DILocation(line: 14, column: 3, scope: !7)
39 !11 = !DILocation(line: 15, column: 3, scope: !7)
40
41 ;CHECK-LABEL: main:
42 ;CHECK: # %bb.0:
43 ;CHECK: prefetchnta 291
44 ;CHECK: prefetchnta 42(%rax,%ymm0)
45 ;CHECK-NEXT: vgatherpf1dpd (%rax,%ymm0) {%k1}
0 main:0:0
1 6: 0 __prefetch_nta_0:42
0 sum:0:0
1 1: 0 __prefetch_t0_1:0 __prefetch_t2_0:42
2 1.1: 0 __prefetch_t1_0:18446744073709551615
0 sum:0:0
1 1: 0 __prefetch_nta_1:0 __prefetch_nta_0:42
2 1.1: 0 __prefetch_nta_0:18446744073709551615
0 ; RUN: llc < %s -prefetch-hints-file=%S/insert-prefetch.afdo | FileCheck %s
1 ; RUN: llc < %s -prefetch-hints-file=%S/insert-prefetch-other.afdo | FileCheck %s -check-prefix=OTHERS
2 ;
3 ; original source, compiled with -O3 -gmlt -fdebug-info-for-profiling:
4 ; int sum(int* arr, int pos1, int pos2) {
5 ; return arr[pos1] + arr[pos2];
6 ; }
7 ;
8 ; NOTE: debug line numbers were adjusted such that the function would start
9 ; at line 15 (an arbitrary number). The sample profile file format uses
10 ; offsets from the start of the symbol instead of file-relative line numbers.
11 ; The .afdo file reflects that - the instructions are offset '1'.
12 ;
13 ; ModuleID = 'test.cc'
14 source_filename = "test.cc"
15 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
16 target triple = "x86_64-unknown-linux-gnu"
17
18 define i32 @sum(i32* %arr, i32 %pos1, i32 %pos2) !dbg !35 !prof !37 {
19 entry:
20 %idxprom = sext i32 %pos1 to i64, !dbg !38
21 %arrayidx = getelementptr inbounds i32, i32* %arr, i64 %idxprom, !dbg !38
22 %0 = load i32, i32* %arrayidx, align 4, !dbg !38, !tbaa !39
23 %idxprom1 = sext i32 %pos2 to i64, !dbg !43
24 %arrayidx2 = getelementptr inbounds i32, i32* %arr, i64 %idxprom1, !dbg !43
25 %1 = load i32, i32* %arrayidx2, align 4, !dbg !43, !tbaa !39
26 %add = add nsw i32 %1, %0, !dbg !44
27 ret i32 %add, !dbg !45
28 }
29
30 attributes #0 = { "target-cpu"="x86-64" }
31
32 !llvm.dbg.cu = !{!0}
33 !llvm.module.flags = !{!3, !4, !5, !6}
34 !llvm.ident = !{!33}
35
36 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2, debugInfoForProfiling: true)
37 !1 = !DIFile(filename: "test.cc", directory: "/tmp")
38 !2 = !{}
39 !3 = !{i32 2, !"Dwarf Version", i32 4}
40 !4 = !{i32 2, !"Debug Info Version", i32 3}
41 !5 = !{i32 1, !"wchar_size", i32 4}
42 !6 = !{i32 1, !"ProfileSummary", !7}
43 !7 = !{!8, !9, !10, !11, !12, !13, !14, !15}
44 !8 = !{!"ProfileFormat", !"SampleProfile"}
45 !9 = !{!"TotalCount", i64 0}
46 !10 = !{!"MaxCount", i64 0}
47 !11 = !{!"MaxInternalCount", i64 0}
48 !12 = !{!"MaxFunctionCount", i64 0}
49 !13 = !{!"NumCounts", i64 2}
50 !14 = !{!"NumFunctions", i64 1}
51 !15 = !{!"DetailedSummary", !16}
52 !16 = !{!17, !18, !19, !20, !21, !22, !22, !23, !23, !24, !25, !26, !27, !28, !29, !30, !31, !32}
53 !17 = !{i32 10000, i64 0, i32 0}
54 !18 = !{i32 100000, i64 0, i32 0}
55 !19 = !{i32 200000, i64 0, i32 0}
56 !20 = !{i32 300000, i64 0, i32 0}
57 !21 = !{i32 400000, i64 0, i32 0}
58 !22 = !{i32 500000, i64 0, i32 0}
59 !23 = !{i32 600000, i64 0, i32 0}
60 !24 = !{i32 700000, i64 0, i32 0}
61 !25 = !{i32 800000, i64 0, i32 0}
62 !26 = !{i32 900000, i64 0, i32 0}
63 !27 = !{i32 950000, i64 0, i32 0}
64 !28 = !{i32 990000, i64 0, i32 0}
65 !29 = !{i32 999000, i64 0, i32 0}
66 !30 = !{i32 999900, i64 0, i32 0}
67 !31 = !{i32 999990, i64 0, i32 0}
68 !32 = !{i32 999999, i64 0, i32 0}
69 !33 = !{!"clang version 7.0.0 (trunk 322593) (llvm/trunk 322526)"}
70 !35 = distinct !DISubprogram(name: "sum", linkageName: "sum", scope: !1, file: !1, line: 15, type: !36, isLocal: false, isDefinition: true, scopeLine: 15, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
71 !36 = !DISubroutineType(types: !2)
72 !37 = !{!"function_entry_count", i64 -1}
73 !38 = !DILocation(line: 16, column: 10, scope: !35)
74 !39 = !{!40, !40, i64 0}
75 !40 = !{!"int", !41, i64 0}
76 !41 = !{!"omnipotent char", !42, i64 0}
77 !42 = !{!"Simple C++ TBAA"}
78 !43 = !DILocation(line: 16, column: 22, scope: !35)
79 !44 = !DILocation(line: 16, column: 20, scope: !35)
80 !45 = !DILocation(line: 16, column: 3, scope: !35)
81
82 ;CHECK-LABEL: sum:
83 ;CHECK: # %bb.0:
84 ;CHECK: prefetchnta 42(%rdi,%rax,4)
85 ;CHECK-NEXT: prefetchnta (%rdi,%rax,4)
86 ;CHECK-NEXT: movl (%rdi,%rax,4), %eax
87 ;CHECK-NEXT: .loc 1 16 20 discriminator 2 # test.cc:16:20
88 ;CHECK-NEXT: prefetchnta -1(%rdi,%rcx,4)
89 ;CHECK-NEXT: addl (%rdi,%rcx,4), %eax
90 ;CHECK-NEXT: .loc 1 16 3 # test.cc:16:3
91
92 ;OTHERS-LABEL: sum:
93 ;OTHERS: # %bb.0:
94 ;OTHERS: prefetcht2 42(%rdi,%rax,4)
95 ;OTHERS-NEXT: prefetcht0 (%rdi,%rax,4)
96 ;OTHERS-NEXT: movl (%rdi,%rax,4), %eax
97 ;OTHERS-NEXT: .loc 1 16 20 discriminator 2 # test.cc:16:20
98 ;OTHERS-NEXT: prefetcht1 -1(%rdi,%rcx,4)
99 ;OTHERS-NEXT: addl (%rdi,%rcx,4), %eax
100 ;OTHERS-NEXT: .loc 1 16 3 # test.cc:16:3