llvm.org GIT mirror llvm / 23d36c6
Merging r298604: ------------------------------------------------------------------------ r298604 | niravd | 2017-03-23 11:01:50 -0400 (Thu, 23 Mar 2017) | 14 lines [SDAG] Fix zeroExtend assertion error Move CombineTo preventing deleted node from being returned in visitZERO_EXTEND. Fixes PR32284. Reviewers: RKSimon, bogner Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31254 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@300979 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 2 years ago
2 changed file(s) with 34 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
66766676 LN0->getChain(),
66776677 LN0->getBasePtr(), N0.getValueType(),
66786678 LN0->getMemOperand());
6679 CombineTo(N, ExtLoad);
6679
66806680 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SDLoc(N0),
66816681 N0.getValueType(), ExtLoad);
66826682 CombineTo(N0.getNode(), Trunc, ExtLoad.getValue(1));
66836683
66846684 ExtendSetCCUses(SetCCs, Trunc, ExtLoad, SDLoc(N),
66856685 ISD::ZERO_EXTEND);
6686 CombineTo(N, ExtLoad);
66866687 return SDValue(N, 0); // Return N so it doesn't get rechecked!
66876688 }
66886689 }
0 ; RUN: llc -O0 -mtriple=i686-unknown -mcpu=skx -o - %s
1 ; RUN: llc -O0 -mtriple=x86_64-unknown -mcpu=skx -o - %s
2 ; RUN: llc -mtriple=i686-unknown -mcpu=skx -o - %s
3 ; RUN: llc -mtriple=x86_64-unknown -mcpu=skx -o - %s
4
5 @c = external constant i8, align 1
6
7 define void @foo() {
8 entry:
9 %a = alloca i8, align 1
10 %b = alloca i32, align 4
11 %0 = load i8, i8* @c, align 1
12 %conv = zext i8 %0 to i32
13 %sub = sub nsw i32 0, %conv
14 %conv1 = sext i32 %sub to i64
15 %sub2 = sub nsw i64 0, %conv1
16 %conv3 = trunc i64 %sub2 to i8
17 %tobool = icmp ne i8 %conv3, 0
18 %frombool = zext i1 %tobool to i8
19 store i8 %frombool, i8* %a, align 1
20 %1 = load i8, i8* @c, align 1
21 %tobool4 = icmp ne i8 %1, 0
22 %lnot = xor i1 %tobool4, true
23 %lnot5 = xor i1 %lnot, true
24 %conv6 = zext i1 %lnot5 to i32
25 %2 = load i8, i8* @c, align 1
26 %conv7 = zext i8 %2 to i32
27 %cmp = icmp sle i32 %conv6, %conv7
28 %conv8 = zext i1 %cmp to i32
29 store i32 %conv8, i32* %b, align 4
30 ret void
31 }