llvm.org GIT mirror llvm / 236f677
In thumb mode, round up stack frame size to multiple of 4 since add/sub sp, imm instructions implicitly multiply the offset by 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33653 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
1 changed file(s) with 134 addition(s) and 125 deletion(s). Raw diff Collapse all Expand all
883883 unsigned NumBytes = MFI->getStackSize();
884884 const std::vector &CSI = MFI->getCalleeSavedInfo();
885885
886 if (isThumb) {
887 // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
888 NumBytes = (NumBytes + 3) & ~3;
889 MFI->setStackSize(NumBytes);
890 }
891
886892 // Determine the sizes of each callee-save spill areas and record which frame
887893 // belongs to which callee-save spill areas.
888894 unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
889895 int FramePtrSpillFI = 0;
890 if (AFI->hasStackFrame()) {
891 if (VARegSaveSize)
892 emitSPUpdate(MBB, MBBI, -VARegSaveSize, isThumb, TII);
893
894 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
895 unsigned Reg = CSI[i].getReg();
896 int FI = CSI[i].getFrameIdx();
897 switch (Reg) {
898 case ARM::R4:
899 case ARM::R5:
900 case ARM::R6:
901 case ARM::R7:
902 case ARM::LR:
903 if (Reg == FramePtr)
904 FramePtrSpillFI = FI;
896 if (!AFI->hasStackFrame()) {
897 if (NumBytes != 0)
898 emitSPUpdate(MBB, MBBI, -NumBytes, isThumb, TII);
899 return;
900 }
901
902 if (VARegSaveSize)
903 emitSPUpdate(MBB, MBBI, -VARegSaveSize, isThumb, TII);
904
905 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
906 unsigned Reg = CSI[i].getReg();
907 int FI = CSI[i].getFrameIdx();
908 switch (Reg) {
909 case ARM::R4:
910 case ARM::R5:
911 case ARM::R6:
912 case ARM::R7:
913 case ARM::LR:
914 if (Reg == FramePtr)
915 FramePtrSpillFI = FI;
916 AFI->addGPRCalleeSavedArea1Frame(FI);
917 GPRCS1Size += 4;
918 break;
919 case ARM::R8:
920 case ARM::R9:
921 case ARM::R10:
922 case ARM::R11:
923 if (Reg == FramePtr)
924 FramePtrSpillFI = FI;
925 if (STI.isTargetDarwin()) {
926 AFI->addGPRCalleeSavedArea2Frame(FI);
927 GPRCS2Size += 4;
928 } else {
905929 AFI->addGPRCalleeSavedArea1Frame(FI);
906930 GPRCS1Size += 4;
907 break;
908 case ARM::R8:
909 case ARM::R9:
910 case ARM::R10:
911 case ARM::R11:
912 if (Reg == FramePtr)
913 FramePtrSpillFI = FI;
914 if (STI.isTargetDarwin()) {
915 AFI->addGPRCalleeSavedArea2Frame(FI);
916 GPRCS2Size += 4;
917 } else {
918 AFI->addGPRCalleeSavedArea1Frame(FI);
919 GPRCS1Size += 4;
920 }
921 break;
922 default:
923 AFI->addDPRCalleeSavedAreaFrame(FI);
924 DPRCSSize += 8;
925931 }
926 }
927
928 if (Align == 8 && (GPRCS1Size & 7) != 0)
929 // Pad CS1 to ensure proper alignment.
930 GPRCS1Size += 4;
931
932 if (!isThumb) {
933 // Build the new SUBri to adjust SP for integer callee-save spill area 1.
934 emitSPUpdate(MBB, MBBI, -GPRCS1Size, isThumb, TII);
935 movePastCSLoadStoreOps(MBB, MBBI, ARM::STR, 1, STI);
936 } else if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH)
937 ++MBBI;
938
939 // Point FP to the stack slot that contains the previous FP.
940 if (STI.isTargetDarwin())
941 BuildMI(MBB, MBBI, TII.get(isThumb ? ARM::tADDrSPi : ARM::ADDri), FramePtr)
942 .addFrameIndex(FramePtrSpillFI).addImm(0);
943
944 if (!isThumb) {
945 // Build the new SUBri to adjust SP for integer callee-save spill area 2.
946 emitSPUpdate(MBB, MBBI, -GPRCS2Size, false, TII);
947
948 // Build the new SUBri to adjust SP for FP callee-save spill area.
949 movePastCSLoadStoreOps(MBB, MBBI, ARM::STR, 2, STI);
950 emitSPUpdate(MBB, MBBI, -DPRCSSize, false, TII);
951 }
932 break;
933 default:
934 AFI->addDPRCalleeSavedAreaFrame(FI);
935 DPRCSSize += 8;
936 }
937 }
938
939 if (Align == 8 && (GPRCS1Size & 7) != 0)
940 // Pad CS1 to ensure proper alignment.
941 GPRCS1Size += 4;
942
943 if (!isThumb) {
944 // Build the new SUBri to adjust SP for integer callee-save spill area 1.
945 emitSPUpdate(MBB, MBBI, -GPRCS1Size, isThumb, TII);
946 movePastCSLoadStoreOps(MBB, MBBI, ARM::STR, 1, STI);
947 } else if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH)
948 ++MBBI;
949
950 // Point FP to the stack slot that contains the previous FP.
951 if (STI.isTargetDarwin())
952 BuildMI(MBB, MBBI, TII.get(isThumb ? ARM::tADDrSPi : ARM::ADDri), FramePtr)
953 .addFrameIndex(FramePtrSpillFI).addImm(0);
954
955 if (!isThumb) {
956 // Build the new SUBri to adjust SP for integer callee-save spill area 2.
957 emitSPUpdate(MBB, MBBI, -GPRCS2Size, false, TII);
958
959 // Build the new SUBri to adjust SP for FP callee-save spill area.
960 movePastCSLoadStoreOps(MBB, MBBI, ARM::STR, 2, STI);
961 emitSPUpdate(MBB, MBBI, -DPRCSSize, false, TII);
952962 }
953963
954964 // Determine starting offsets of spill areas.
955 if (AFI->hasStackFrame()) {
956 unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
957 unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
958 unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
959 AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
960 AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
961 AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
962 AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
965 unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
966 unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
967 unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
968 AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
969 AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
970 AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
971 AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
963972
964 NumBytes = DPRCSOffset;
965 if (NumBytes) {
966 // Insert it after all the callee-save spills.
967 if (!isThumb)
968 movePastCSLoadStoreOps(MBB, MBBI, ARM::FSTD, 3, STI);
969 emitSPUpdate(MBB, MBBI, -NumBytes, isThumb, TII);
970 }
971 } else
973 NumBytes = DPRCSOffset;
974 if (NumBytes) {
975 // Insert it after all the callee-save spills.
976 if (!isThumb)
977 movePastCSLoadStoreOps(MBB, MBBI, ARM::FSTD, 3, STI);
972978 emitSPUpdate(MBB, MBBI, -NumBytes, isThumb, TII);
979 }
973980
974981 AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
975982 AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
10041011 bool isThumb = AFI->isThumbFunction();
10051012 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
10061013 int NumBytes = (int)MFI->getStackSize();
1007 if (AFI->hasStackFrame()) {
1008 // Unwind MBBI to point to first LDR / FLDD.
1009 const unsigned *CSRegs = getCalleeSavedRegs();
1010 if (MBBI != MBB.begin()) {
1011 do
1012 --MBBI;
1013 while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
1014 if (!isCSRestore(MBBI, CSRegs))
1015 ++MBBI;
1016 }
1017
1018 // Move SP to start of FP callee save spill area.
1019 NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
1020 AFI->getGPRCalleeSavedArea2Size() +
1021 AFI->getDPRCalleeSavedAreaSize());
1022 if (isThumb)
1014 if (!AFI->hasStackFrame()) {
1015 if (NumBytes != 0)
10231016 emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII);
1024 else {
1025 if (STI.isTargetDarwin()) {
1026 NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
1027 // Reset SP based on frame pointer only if the stack frame extends beyond
1028 // frame pointer stack slot.
1029 if (AFI->getGPRCalleeSavedArea2Size() ||
1030 AFI->getDPRCalleeSavedAreaSize() ||
1031 AFI->getDPRCalleeSavedAreaOffset())
1032 if (NumBytes)
1033 BuildMI(MBB, MBBI, TII.get(ARM::SUBri), ARM::SP).addReg(FramePtr)
1034 .addImm(NumBytes);
1035 else
1036 BuildMI(MBB, MBBI, TII.get(ARM::MOVrr), ARM::SP).addReg(FramePtr);
1037 } else if (NumBytes) {
1038 emitSPUpdate(MBB, MBBI, NumBytes, false, TII);
1039 }
1040
1041 // Move SP to start of integer callee save spill area 2.
1042 movePastCSLoadStoreOps(MBB, MBBI, ARM::FLDD, 3, STI);
1043 emitSPUpdate(MBB, MBBI, AFI->getDPRCalleeSavedAreaSize(), false, TII);
1044
1045 // Move SP to start of integer callee save spill area 1.
1046 movePastCSLoadStoreOps(MBB, MBBI, ARM::LDR, 2, STI);
1047 emitSPUpdate(MBB, MBBI, AFI->getGPRCalleeSavedArea2Size(), false, TII);
1048
1049 // Move SP to SP upon entry to the function.
1050 movePastCSLoadStoreOps(MBB, MBBI, ARM::LDR, 1, STI);
1051 emitSPUpdate(MBB, MBBI, AFI->getGPRCalleeSavedArea1Size(), false, TII);
1052 }
1053
1054 if (VARegSaveSize)
1055 emitSPUpdate(MBB, MBBI, VARegSaveSize, isThumb, TII);
1056 } else if (NumBytes != 0) {
1017 return;
1018 }
1019
1020 // Unwind MBBI to point to first LDR / FLDD.
1021 const unsigned *CSRegs = getCalleeSavedRegs();
1022 if (MBBI != MBB.begin()) {
1023 do
1024 --MBBI;
1025 while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
1026 if (!isCSRestore(MBBI, CSRegs))
1027 ++MBBI;
1028 }
1029
1030 // Move SP to start of FP callee save spill area.
1031 NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
1032 AFI->getGPRCalleeSavedArea2Size() +
1033 AFI->getDPRCalleeSavedAreaSize());
1034 if (isThumb)
10571035 emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII);
1058 }
1036 else {
1037 if (STI.isTargetDarwin()) {
1038 NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
1039 // Reset SP based on frame pointer only if the stack frame extends beyond
1040 // frame pointer stack slot.
1041 if (AFI->getGPRCalleeSavedArea2Size() ||
1042 AFI->getDPRCalleeSavedAreaSize() ||
1043 AFI->getDPRCalleeSavedAreaOffset())
1044 if (NumBytes)
1045 BuildMI(MBB, MBBI, TII.get(ARM::SUBri), ARM::SP).addReg(FramePtr)
1046 .addImm(NumBytes);
1047 else
1048 BuildMI(MBB, MBBI, TII.get(ARM::MOVrr), ARM::SP).addReg(FramePtr);
1049 } else if (NumBytes) {
1050 emitSPUpdate(MBB, MBBI, NumBytes, false, TII);
1051 }
1052
1053 // Move SP to start of integer callee save spill area 2.
1054 movePastCSLoadStoreOps(MBB, MBBI, ARM::FLDD, 3, STI);
1055 emitSPUpdate(MBB, MBBI, AFI->getDPRCalleeSavedAreaSize(), false, TII);
1056
1057 // Move SP to start of integer callee save spill area 1.
1058 movePastCSLoadStoreOps(MBB, MBBI, ARM::LDR, 2, STI);
1059 emitSPUpdate(MBB, MBBI, AFI->getGPRCalleeSavedArea2Size(), false, TII);
1060
1061 // Move SP to SP upon entry to the function.
1062 movePastCSLoadStoreOps(MBB, MBBI, ARM::LDR, 1, STI);
1063 emitSPUpdate(MBB, MBBI, AFI->getGPRCalleeSavedArea1Size(), false, TII);
1064 }
1065
1066 if (VARegSaveSize)
1067 emitSPUpdate(MBB, MBBI, VARegSaveSize, isThumb, TII);
10591068 }
10601069
10611070 unsigned ARMRegisterInfo::getRARegister() const {