llvm.org GIT mirror llvm / 21b4d8e
[X86] Keep EXTRACT_VECTOR_ELT result type as f128 for Android x86_64. Android x86_64 target uses f128 type and stores f128 values in %xmm* registers. SoftenFloatRes_EXTRACT_VECTOR_ELT should not convert result value from f128 to i128. Differential Revision: http://reviews.llvm.org/D32102 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300583 91177308-0d34-0410-b5e6-96231b3b80d8 Chih-Hung Hsieh 2 years ago
4 changed file(s) with 65 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
7171 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
7272 case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
7373 case ISD::EXTRACT_VECTOR_ELT:
74 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N); break;
74 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
7575 case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
7676 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
7777 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
170170 }
171171 }
172172
173 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
173 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
174 // When LegalInHWReg, keep the extracted value in register.
175 if (isLegalInHWReg(N->getValueType(ResNo)))
176 return SDValue(N, ResNo);
174177 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
175178 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
176179 NewOp.getValueType().getVectorElementType(),
427427 SDValue SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo);
428428 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
429429 SDValue SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo);
430 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
430 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
431431 SDValue SoftenFloatRes_FABS(SDNode *N, unsigned ResNo);
432432 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
433433 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
44 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE41-X64
55 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=AVX-X32
66 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=AVX-X64
7 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking \
8 ; RUN: | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
9 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking \
10 ; RUN: | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
711
812 define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) nounwind {
913 ; SSE2-X32-LABEL: extract_i8_0:
457461 ret void
458462 }
459463
464 define void @extract_f128_0(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
465 ; SSE-F128-LABEL: extract_f128_0:
466 ; SSE-F128: # BB#0:
467 ; SSE-F128-NEXT: movaps %xmm0, (%rdi)
468 ; SSE-F128-NEXT: retq
469 %vecext = extractelement <2 x fp128> %foo, i32 0
470 store fp128 %vecext, fp128* %dst, align 1
471 ret void
472 }
473
474 define void @extract_f128_1(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
475 ; SSE-F128-LABEL: extract_f128_1:
476 ; SSE-F128: # BB#0:
477 ; SSE-F128-NEXT: movaps %xmm1, (%rdi)
478 ; SSE-F128-NEXT: retq
479 %vecext = extractelement <2 x fp128> %foo, i32 1
480 store fp128 %vecext, fp128* %dst, align 1
481 ret void
482 }
483
460484 define void @extract_i8_undef(i8* nocapture %dst, <16 x i8> %foo) nounwind {
461485 ; X32-LABEL: extract_i8_undef:
462486 ; X32: # BB#0:
534558 store double %vecext, double* %dst, align 1
535559 ret void
536560 }
561
562 define void @extract_f128_undef(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
563 ; X32-LABEL: extract_f128_undef:
564 ; X32: # BB#0:
565 ; X32-NEXT: retl
566 ;
567 ; X64-LABEL: extract_f128_undef:
568 ; X64: # BB#0:
569 ; X64-NEXT: retq
570 %vecext = extractelement <2 x fp128> %foo, i32 2 ; undef
571 store fp128 %vecext, fp128* %dst, align 1
572 ret void
573 }
0 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
1 ; RUN: -enable-legalize-types-checking | FileCheck %s
2 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
3 ; RUN: -enable-legalize-types-checking | FileCheck %s
4
5 ; Test the softened result of extractelement op code.
6 define fp128 @TestExtract(<2 x double> %x) {
7 entry:
8 ; Simplified instruction pattern from the output of llvm before r289042,
9 ; for a boost function ...::insert<...>::traverse<...>().
10 %a = fpext <2 x double> %x to <2 x fp128>
11 %0 = extractelement <2 x fp128> %a, i32 0
12 %1 = extractelement <2 x fp128> %a, i32 1
13 %2 = fmul fp128 %0, %1
14 ret fp128 %2
15 ; CHECK-LABEL: TestExtract:
16 ; CHECK: movaps %xmm0, (%rsp)
17 ; CHECK: callq __extenddftf2
18 ; CHECK: callq __extenddftf2
19 ; CHECK: callq __multf3
20 ; CHECK: retq
21 }