llvm.org GIT mirror llvm / 2141b46
Sort targetgen calls in lib/Target/*/CMakeLists. Makes it easier to see mistakes such as the one fixed in r329178 and makes the different target CMakeLists more consistent. Also remove some stale-looking comments from the Nios2 target cmakefile. No intended behavior change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329181 91177308-0d34-0410-b5e6-96231b3b80d8 Nico Weber 2 years ago
18 changed file(s) with 101 addition(s) and 93 deletion(s). Raw diff Collapse all Expand all
0 set(LLVM_TARGET_DEFINITIONS AArch64.td)
11
2 tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
2 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
3 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
5 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
9 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
310 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
411 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
512 tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
6 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
8 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
9 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
11 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
13 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
14 tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
1215 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
13 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
1416 tablegen(LLVM AArch64GenSystemOperands.inc -gen-searchable-tables)
15 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
16 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
1717
1818 add_public_tablegen_target(AArch64CommonTableGen)
1919
0 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
11
2 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
2 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
3 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
7 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
38 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
4 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
5 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
79 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
810 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
9 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
10 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
11 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
12 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
1311 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
1412 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
13 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
1514 tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
15 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
16
1617 add_public_tablegen_target(AMDGPUCommonTableGen)
1718
1819 add_llvm_target(AMDGPUCodeGen
0 set(LLVM_TARGET_DEFINITIONS ARC.td)
11
2 tablegen(LLVM ARCGenAsmWriter.inc -gen-asm-writer)
3 tablegen(LLVM ARCGenCallingConv.inc -gen-callingconv)
4 tablegen(LLVM ARCGenDAGISel.inc -gen-dag-isel)
5 tablegen(LLVM ARCGenDisassemblerTables.inc -gen-disassembler)
6 tablegen(LLVM ARCGenInstrInfo.inc -gen-instr-info)
27 tablegen(LLVM ARCGenRegisterInfo.inc -gen-register-info)
3 tablegen(LLVM ARCGenInstrInfo.inc -gen-instr-info)
4 tablegen(LLVM ARCGenDisassemblerTables.inc -gen-disassembler)
5 tablegen(LLVM ARCGenAsmWriter.inc -gen-asm-writer)
6 tablegen(LLVM ARCGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM ARCGenCallingConv.inc -gen-callingconv)
88 tablegen(LLVM ARCGenSubtargetInfo.inc -gen-subtarget)
9
910 add_public_tablegen_target(ARCCommonTableGen)
1011
1112 add_llvm_target(ARCCodeGen
0 set(LLVM_TARGET_DEFINITIONS ARM.td)
11
2 tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
2 tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
3 tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
7 tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
38 tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
4 tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
59 tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
610 tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
711 tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
8 tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
9 tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
10 tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
11 tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
12 tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
12 tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
13 tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
1314 tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
14 tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
1515 tablegen(LLVM ARMGenSystemRegister.inc -gen-searchable-tables)
16
1617 add_public_tablegen_target(ARMCommonTableGen)
1718
1819 add_llvm_target(ARMCodeGen
0 set(LLVM_TARGET_DEFINITIONS BPF.td)
11
2 tablegen(LLVM BPFGenAsmMatcher.inc -gen-asm-matcher)
3 tablegen(LLVM BPFGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM BPFGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM BPFGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM BPFGenDisassemblerTables.inc -gen-disassembler)
7 tablegen(LLVM BPFGenInstrInfo.inc -gen-instr-info)
8 tablegen(LLVM BPFGenMCCodeEmitter.inc -gen-emitter)
29 tablegen(LLVM BPFGenRegisterInfo.inc -gen-register-info)
3 tablegen(LLVM BPFGenInstrInfo.inc -gen-instr-info)
4 tablegen(LLVM BPFGenDisassemblerTables.inc -gen-disassembler)
5 tablegen(LLVM BPFGenAsmWriter.inc -gen-asm-writer)
6 tablegen(LLVM BPFGenAsmMatcher.inc -gen-asm-matcher)
7 tablegen(LLVM BPFGenDAGISel.inc -gen-dag-isel)
8 tablegen(LLVM BPFGenMCCodeEmitter.inc -gen-emitter)
9 tablegen(LLVM BPFGenCallingConv.inc -gen-callingconv)
1010 tablegen(LLVM BPFGenSubtargetInfo.inc -gen-subtarget)
11
1112 add_public_tablegen_target(BPFCommonTableGen)
1213
1314 add_llvm_target(BPFCodeGen
99 tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
1010 tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
1111 tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
12
1213 add_public_tablegen_target(HexagonCommonTableGen)
1314
1415 add_llvm_target(HexagonCodeGen
88 tablegen(LLVM LanaiGenMCCodeEmitter.inc -gen-emitter)
99 tablegen(LLVM LanaiGenRegisterInfo.inc -gen-register-info)
1010 tablegen(LLVM LanaiGenSubtargetInfo.inc -gen-subtarget)
11
1112 add_public_tablegen_target(LanaiCommonTableGen)
1213
1314 add_llvm_target(LanaiCodeGen
0 set(LLVM_TARGET_DEFINITIONS MSP430.td)
11
2 tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer)
3 tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv)
4 tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel)
5 tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info)
26 tablegen(LLVM MSP430GenRegisterInfo.inc -gen-register-info)
3 tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info)
4 tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv)
77 tablegen(LLVM MSP430GenSubtargetInfo.inc -gen-subtarget)
8
89 add_public_tablegen_target(MSP430CommonTableGen)
910
1011 add_llvm_target(MSP430CodeGen
0 set(LLVM_TARGET_DEFINITIONS Mips.td)
11
2 tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
3 tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler)
7 tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
8 tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM MipsGenMCPseudoLowering.inc -gen-pseudo-lowering)
211 tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info)
3 tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
4 tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler)
5 tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)
6 tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
8 tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
9 tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
1012 tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
11 tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
12 tablegen(LLVM MipsGenMCPseudoLowering.inc -gen-pseudo-lowering)
13
1314 add_public_tablegen_target(MipsCommonTableGen)
1415
1516 add_llvm_target(MipsCodeGen
0 set(LLVM_TARGET_DEFINITIONS NVPTX.td)
11
2
3 tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
52 tablegen(LLVM NVPTXGenAsmWriter.inc -gen-asm-writer)
63 tablegen(LLVM NVPTXGenDAGISel.inc -gen-dag-isel)
4 tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
76 tablegen(LLVM NVPTXGenSubtargetInfo.inc -gen-subtarget)
7
88 add_public_tablegen_target(NVPTXCommonTableGen)
99
1010 set(NVPTXCodeGen_sources
0 set(LLVM_TARGET_DEFINITIONS Nios2.td)
11
2 #Generate Nios2GenRegisterInfo.inc and Nios2GenInstrInfo.inc which included by
3 #your hand code C++ files.
4 #Nios2GenRegisterInfo.inc came from Nios2RegisterInfo.td, Nios2GenInstrInfo.inc
5 #came from Nios2InstrInfo.td.
62 tablegen(LLVM Nios2GenAsmWriter.inc -gen-asm-writer)
3 tablegen(LLVM Nios2GenCallingConv.inc -gen-callingconv)
74 tablegen(LLVM Nios2GenDAGISel.inc -gen-dag-isel)
5 tablegen(LLVM Nios2GenInstrInfo.inc -gen-instr-info)
86 tablegen(LLVM Nios2GenRegisterInfo.inc -gen-register-info)
9 tablegen(LLVM Nios2GenCallingConv.inc -gen-callingconv)
10 tablegen(LLVM Nios2GenInstrInfo.inc -gen-instr-info)
117 tablegen(LLVM Nios2GenSubtargetInfo.inc -gen-subtarget)
128
13 #Nios2CommonTableGen must be defined
149 add_public_tablegen_target(Nios2CommonTableGen)
1510
1611 #Nios2CodeGen should match with LLVMBuild.txt Nios2CodeGen
0 set(LLVM_TARGET_DEFINITIONS PPC.td)
11
2 tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
23 tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
3 tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
46 tablegen(LLVM PPCGenDisassemblerTables.inc -gen-disassembler)
7 tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
8 tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
59 tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
610 tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
7 tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
8 tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
10 tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
1111 tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
12
1213 add_public_tablegen_target(PowerPCCommonTableGen)
1314
1415 add_llvm_target(PowerPCCodeGen
0 set(LLVM_TARGET_DEFINITIONS RISCV.td)
11
2 tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info)
2 tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher)
3 tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel)
5 tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler)
36 tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info)
47 tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter)
58 tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering)
6 tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher)
7 tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer)
8 tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel)
9 tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info)
910 tablegen(LLVM RISCVGenSubtargetInfo.inc -gen-subtarget)
10 tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler)
1111
1212 add_public_tablegen_target(RISCVCommonTableGen)
1313
0 set(LLVM_TARGET_DEFINITIONS Sparc.td)
11
2 tablegen(LLVM SparcGenAsmMatcher.inc -gen-asm-matcher)
3 tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM SparcGenDisassemblerTables.inc -gen-disassembler)
7 tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
8 tablegen(LLVM SparcGenMCCodeEmitter.inc -gen-emitter)
29 tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info)
3 tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
4 tablegen(LLVM SparcGenDisassemblerTables.inc -gen-disassembler)
5 tablegen(LLVM SparcGenMCCodeEmitter.inc -gen-emitter)
6 tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM SparcGenAsmMatcher.inc -gen-asm-matcher)
8 tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
910 tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget)
10 tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
11
1112 add_public_tablegen_target(SparcCommonTableGen)
1213
1314 add_llvm_target(SparcCodeGen
44 tablegen(LLVM SystemZGenCallingConv.inc -gen-callingconv)
55 tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel)
66 tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler)
7 tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info)
78 tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter)
8 tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info)
99 tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info)
1010 tablegen(LLVM SystemZGenSubtargetInfo.inc -gen-subtarget)
11
1112 add_public_tablegen_target(SystemZCommonTableGen)
1213
1314 add_llvm_target(SystemZCodeGen
0 set(LLVM_TARGET_DEFINITIONS WebAssembly.td)
11
2 tablegen(LLVM WebAssemblyGenAsmMatcher.inc -gen-asm-matcher)
23 tablegen(LLVM WebAssemblyGenAsmWriter.inc -gen-asm-writer)
34 tablegen(LLVM WebAssemblyGenDAGISel.inc -gen-dag-isel)
45 tablegen(LLVM WebAssemblyGenFastISel.inc -gen-fast-isel)
67 tablegen(LLVM WebAssemblyGenMCCodeEmitter.inc -gen-emitter)
78 tablegen(LLVM WebAssemblyGenRegisterInfo.inc -gen-register-info)
89 tablegen(LLVM WebAssemblyGenSubtargetInfo.inc -gen-subtarget)
9 tablegen(LLVM WebAssemblyGenAsmMatcher.inc -gen-asm-matcher)
10
1011 add_public_tablegen_target(WebAssemblyCommonTableGen)
1112
1213 add_llvm_target(WebAssemblyCodeGen
0 set(LLVM_TARGET_DEFINITIONS X86.td)
11
2 tablegen(LLVM X86GenRegisterInfo.inc -gen-register-info)
3 tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler)
4 tablegen(LLVM X86GenInstrInfo.inc -gen-instr-info)
2 tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
53 tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer)
64 tablegen(LLVM X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
7 tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
5 tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
86 tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM X86GenEVEX2VEXTables.inc -gen-x86-EVEX2VEX-tables)
99 tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
10 tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
10 tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel)
11 tablegen(LLVM X86GenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM X86GenRegisterBank.inc -gen-register-bank)
13 tablegen(LLVM X86GenRegisterInfo.inc -gen-register-info)
1114 tablegen(LLVM X86GenSubtargetInfo.inc -gen-subtarget)
12 tablegen(LLVM X86GenEVEX2VEXTables.inc -gen-x86-EVEX2VEX-tables)
13 tablegen(LLVM X86GenRegisterBank.inc -gen-register-bank)
14 tablegen(LLVM X86GenGlobalISel.inc -gen-global-isel)
1515
1616 if (X86_GEN_FOLD_TABLES)
1717 tablegen(LLVM X86GenFoldTables.inc -gen-x86-fold-tables)
0 set(LLVM_TARGET_DEFINITIONS XCore.td)
11
2 tablegen(LLVM XCoreGenAsmWriter.inc -gen-asm-writer)
3 tablegen(LLVM XCoreGenCallingConv.inc -gen-callingconv)
4 tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel)
5 tablegen(LLVM XCoreGenDisassemblerTables.inc -gen-disassembler)
6 tablegen(LLVM XCoreGenInstrInfo.inc -gen-instr-info)
27 tablegen(LLVM XCoreGenRegisterInfo.inc -gen-register-info)
3 tablegen(LLVM XCoreGenInstrInfo.inc -gen-instr-info)
4 tablegen(LLVM XCoreGenDisassemblerTables.inc -gen-disassembler)
5 tablegen(LLVM XCoreGenAsmWriter.inc -gen-asm-writer)
6 tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM XCoreGenCallingConv.inc -gen-callingconv)
88 tablegen(LLVM XCoreGenSubtargetInfo.inc -gen-subtarget)
9
910 add_public_tablegen_target(XCoreCommonTableGen)
1011
1112 add_llvm_target(XCoreCodeGen