llvm.org GIT mirror llvm / 20e8e6e
[ARM][NFC] Replaced tab characters in test file vfcmp.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339111 91177308-0d34-0410-b5e6-96231b3b80d8 Sjoerd Meijer 1 year, 7 months ago
1 changed file(s) with 55 addition(s) and 55 deletion(s). Raw diff Collapse all Expand all
66 ;CHECK-LABEL: vcunef32:
77 ;CHECK: vceq.f32
88 ;CHECK-NEXT: vmvn
9 %tmp1 = load <2 x float>, <2 x float>* %A
10 %tmp2 = load <2 x float>, <2 x float>* %B
11 %tmp3 = fcmp une <2 x float> %tmp1, %tmp2
12 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
13 ret <2 x i32> %tmp4
9 %tmp1 = load <2 x float>, <2 x float>* %A
10 %tmp2 = load <2 x float>, <2 x float>* %B
11 %tmp3 = fcmp une <2 x float> %tmp1, %tmp2
12 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
13 ret <2 x i32> %tmp4
1414 }
1515
1616 ; olt is implemented with VCGT
1717 define <2 x i32> @vcoltf32(<2 x float>* %A, <2 x float>* %B) nounwind {
1818 ;CHECK-LABEL: vcoltf32:
1919 ;CHECK: vcgt.f32
20 %tmp1 = load <2 x float>, <2 x float>* %A
21 %tmp2 = load <2 x float>, <2 x float>* %B
22 %tmp3 = fcmp olt <2 x float> %tmp1, %tmp2
23 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
24 ret <2 x i32> %tmp4
20 %tmp1 = load <2 x float>, <2 x float>* %A
21 %tmp2 = load <2 x float>, <2 x float>* %B
22 %tmp3 = fcmp olt <2 x float> %tmp1, %tmp2
23 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
24 ret <2 x i32> %tmp4
2525 }
2626
2727 ; ole is implemented with VCGE
2828 define <2 x i32> @vcolef32(<2 x float>* %A, <2 x float>* %B) nounwind {
2929 ;CHECK-LABEL: vcolef32:
3030 ;CHECK: vcge.f32
31 %tmp1 = load <2 x float>, <2 x float>* %A
32 %tmp2 = load <2 x float>, <2 x float>* %B
33 %tmp3 = fcmp ole <2 x float> %tmp1, %tmp2
34 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
35 ret <2 x i32> %tmp4
31 %tmp1 = load <2 x float>, <2 x float>* %A
32 %tmp2 = load <2 x float>, <2 x float>* %B
33 %tmp3 = fcmp ole <2 x float> %tmp1, %tmp2
34 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
35 ret <2 x i32> %tmp4
3636 }
3737
3838 ; uge is implemented with VCGT/VMVN
4040 ;CHECK-LABEL: vcugef32:
4141 ;CHECK: vcgt.f32
4242 ;CHECK-NEXT: vmvn
43 %tmp1 = load <2 x float>, <2 x float>* %A
44 %tmp2 = load <2 x float>, <2 x float>* %B
45 %tmp3 = fcmp uge <2 x float> %tmp1, %tmp2
46 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
47 ret <2 x i32> %tmp4
43 %tmp1 = load <2 x float>, <2 x float>* %A
44 %tmp2 = load <2 x float>, <2 x float>* %B
45 %tmp3 = fcmp uge <2 x float> %tmp1, %tmp2
46 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
47 ret <2 x i32> %tmp4
4848 }
4949
5050 ; ule is implemented with VCGT/VMVN
5252 ;CHECK-LABEL: vculef32:
5353 ;CHECK: vcgt.f32
5454 ;CHECK-NEXT: vmvn
55 %tmp1 = load <2 x float>, <2 x float>* %A
56 %tmp2 = load <2 x float>, <2 x float>* %B
57 %tmp3 = fcmp ule <2 x float> %tmp1, %tmp2
58 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
59 ret <2 x i32> %tmp4
55 %tmp1 = load <2 x float>, <2 x float>* %A
56 %tmp2 = load <2 x float>, <2 x float>* %B
57 %tmp3 = fcmp ule <2 x float> %tmp1, %tmp2
58 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
59 ret <2 x i32> %tmp4
6060 }
6161
6262 ; ugt is implemented with VCGE/VMVN
6464 ;CHECK-LABEL: vcugtf32:
6565 ;CHECK: vcge.f32
6666 ;CHECK-NEXT: vmvn
67 %tmp1 = load <2 x float>, <2 x float>* %A
68 %tmp2 = load <2 x float>, <2 x float>* %B
69 %tmp3 = fcmp ugt <2 x float> %tmp1, %tmp2
70 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
71 ret <2 x i32> %tmp4
67 %tmp1 = load <2 x float>, <2 x float>* %A
68 %tmp2 = load <2 x float>, <2 x float>* %B
69 %tmp3 = fcmp ugt <2 x float> %tmp1, %tmp2
70 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
71 ret <2 x i32> %tmp4
7272 }
7373
7474 ; ult is implemented with VCGE/VMVN
7676 ;CHECK-LABEL: vcultf32:
7777 ;CHECK: vcge.f32
7878 ;CHECK-NEXT: vmvn
79 %tmp1 = load <2 x float>, <2 x float>* %A
80 %tmp2 = load <2 x float>, <2 x float>* %B
81 %tmp3 = fcmp ult <2 x float> %tmp1, %tmp2
82 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
83 ret <2 x i32> %tmp4
79 %tmp1 = load <2 x float>, <2 x float>* %A
80 %tmp2 = load <2 x float>, <2 x float>* %B
81 %tmp3 = fcmp ult <2 x float> %tmp1, %tmp2
82 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
83 ret <2 x i32> %tmp4
8484 }
8585
8686 ; ueq is implemented with VCGT/VCGT/VORR/VMVN
9090 ;CHECK-NEXT: vcgt.f32
9191 ;CHECK-NEXT: vorr
9292 ;CHECK-NEXT: vmvn
93 %tmp1 = load <2 x float>, <2 x float>* %A
94 %tmp2 = load <2 x float>, <2 x float>* %B
95 %tmp3 = fcmp ueq <2 x float> %tmp1, %tmp2
96 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
97 ret <2 x i32> %tmp4
93 %tmp1 = load <2 x float>, <2 x float>* %A
94 %tmp2 = load <2 x float>, <2 x float>* %B
95 %tmp3 = fcmp ueq <2 x float> %tmp1, %tmp2
96 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
97 ret <2 x i32> %tmp4
9898 }
9999
100100 ; one is implemented with VCGT/VCGT/VORR
103103 ;CHECK: vcgt.f32
104104 ;CHECK-NEXT: vcgt.f32
105105 ;CHECK-NEXT: vorr
106 %tmp1 = load <2 x float>, <2 x float>* %A
107 %tmp2 = load <2 x float>, <2 x float>* %B
108 %tmp3 = fcmp one <2 x float> %tmp1, %tmp2
109 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
110 ret <2 x i32> %tmp4
106 %tmp1 = load <2 x float>, <2 x float>* %A
107 %tmp2 = load <2 x float>, <2 x float>* %B
108 %tmp3 = fcmp one <2 x float> %tmp1, %tmp2
109 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
110 ret <2 x i32> %tmp4
111111 }
112112
113113 ; uno is implemented with VCGT/VCGE/VORR/VMVN
117117 ;CHECK-NEXT: vcgt.f32
118118 ;CHECK-NEXT: vorr
119119 ;CHECK-NEXT: vmvn
120 %tmp1 = load <2 x float>, <2 x float>* %A
121 %tmp2 = load <2 x float>, <2 x float>* %B
122 %tmp3 = fcmp uno <2 x float> %tmp1, %tmp2
123 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
124 ret <2 x i32> %tmp4
120 %tmp1 = load <2 x float>, <2 x float>* %A
121 %tmp2 = load <2 x float>, <2 x float>* %B
122 %tmp3 = fcmp uno <2 x float> %tmp1, %tmp2
123 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
124 ret <2 x i32> %tmp4
125125 }
126126
127127 ; ord is implemented with VCGT/VCGE/VORR
130130 ;CHECK: vcge.f32
131131 ;CHECK-NEXT: vcgt.f32
132132 ;CHECK-NEXT: vorr
133 %tmp1 = load <2 x float>, <2 x float>* %A
134 %tmp2 = load <2 x float>, <2 x float>* %B
135 %tmp3 = fcmp ord <2 x float> %tmp1, %tmp2
136 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
137 ret <2 x i32> %tmp4
133 %tmp1 = load <2 x float>, <2 x float>* %A
134 %tmp2 = load <2 x float>, <2 x float>* %B
135 %tmp3 = fcmp ord <2 x float> %tmp1, %tmp2
136 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
137 ret <2 x i32> %tmp4
138138 }