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AMDGPU/SI: Move some ISel helpers into utils so they can be shared with GISel Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D29068 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293321 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 3 years ago
4 changed file(s) with 46 addition(s) and 26 deletion(s). Raw diff Collapse all Expand all
11751175 return true;
11761176 }
11771177
1178 ///
1179 /// \param EncodedOffset This is the immediate value that will be encoded
1180 /// directly into the instruction. On SI/CI the \p EncodedOffset
1181 /// will be in units of dwords and on VI+ it will be units of bytes.
1182 static bool isLegalSMRDImmOffset(const AMDGPUSubtarget *ST,
1183 int64_t EncodedOffset) {
1184 return ST->getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS ?
1185 isUInt<8>(EncodedOffset) : isUInt<20>(EncodedOffset);
1186 }
1187
11881178 bool AMDGPUDAGToDAGISel::SelectSMRDOffset(SDValue ByteOffsetNode,
11891179 SDValue &Offset, bool &Imm) const {
11901180
11961186 SDLoc SL(ByteOffsetNode);
11971187 AMDGPUSubtarget::Generation Gen = Subtarget->getGeneration();
11981188 int64_t ByteOffset = C->getSExtValue();
1199 int64_t EncodedOffset = Gen < AMDGPUSubtarget::VOLCANIC_ISLANDS ?
1200 ByteOffset >> 2 : ByteOffset;
1201
1202 if (isLegalSMRDImmOffset(Subtarget, EncodedOffset)) {
1189 int64_t EncodedOffset = AMDGPU::getSMRDEncodedOffset(*Subtarget, ByteOffset);
1190
1191 if (AMDGPU::isLegalSMRDImmOffset(*Subtarget, ByteOffset)) {
12031192 Offset = CurDAG->getTargetConstant(EncodedOffset, SL, MVT::i32);
12041193 Imm = true;
12051194 return true;
687687
688688 bool SITargetLowering::isMemOpUniform(const SDNode *N) const {
689689 const MemSDNode *MemNode = cast(N);
690 const Value *Ptr = MemNode->getMemOperand()->getValue();
691
692 // UndefValue means this is a load of a kernel input. These are uniform.
693 // Sometimes LDS instructions have constant pointers.
694 // If Ptr is null, then that means this mem operand contains a
695 // PseudoSourceValue like GOT.
696 if (!Ptr || isa(Ptr) || isa(Ptr) ||
697 isa(Ptr) || isa(Ptr))
698 return true;
699
700 const Instruction *I = dyn_cast(Ptr);
701 return I && I->getMetadata("amdgpu.uniform");
690
691 return AMDGPU::isUniformMMO(MemNode->getMemOperand());
702692 }
703693
704694 TargetLoweringBase::LegalizeTypeAction
88 #include "AMDGPUBaseInfo.h"
99 #include "AMDGPU.h"
1010 #include "SIDefines.h"
11 #include "llvm/CodeGen/MachineMemOperand.h"
1112 #include "llvm/IR/LLVMContext.h"
13 #include "llvm/IR/Constants.h"
1214 #include "llvm/IR/Function.h"
1315 #include "llvm/IR/GlobalValue.h"
1416 #include "llvm/MC/MCContext.h"
462464 Val == 0x3118; // 1/2pi
463465 }
464466
467 bool isUniformMMO(const MachineMemOperand *MMO) {
468 const Value *Ptr = MMO->getValue();
469 // UndefValue means this is a load of a kernel input. These are uniform.
470 // Sometimes LDS instructions have constant pointers.
471 // If Ptr is null, then that means this mem operand contains a
472 // PseudoSourceValue like GOT.
473 if (!Ptr || isa(Ptr) || isa(Ptr) ||
474 isa(Ptr) || isa(Ptr))
475 return true;
476
477 const Instruction *I = dyn_cast(Ptr);
478 return I && I->getMetadata("amdgpu.uniform");
479 }
480
481 int64_t getSMRDEncodedOffset(const MCSubtargetInfo &ST, int64_t ByteOffset) {
482 if (isSI(ST) || isCI(ST))
483 return ByteOffset >> 2;
484
485 return ByteOffset;
486 }
487
488 bool isLegalSMRDImmOffset(const MCSubtargetInfo &ST, int64_t ByteOffset) {
489 int64_t EncodedOffset = getSMRDEncodedOffset(ST, ByteOffset);
490 return isSI(ST) || isCI(ST) ? isUInt<8>(EncodedOffset) :
491 isUInt<20>(EncodedOffset);
492 }
493
465494 } // End namespace AMDGPU
466495 } // End namespace llvm
2323 class FeatureBitset;
2424 class Function;
2525 class GlobalValue;
26 class MachineMemOperand;
2627 class MCContext;
2728 class MCInstrDesc;
2829 class MCRegisterClass;
209210 LLVM_READNONE
210211 bool isInlinableLiteral16(int16_t Literal, bool HasInv2Pi);
211212
213 bool isUniformMMO(const MachineMemOperand *MMO);
214
215 /// \returns The encoding that will be used for \p ByteOffset in the SMRD
216 /// offset field.
217 int64_t getSMRDEncodedOffset(const MCSubtargetInfo &ST, int64_t ByteOffset);
218
219 /// \returns true if this offset is small enough to fit in the SMRD
220 /// offset field. \p ByteOffset should be the offset in bytes and
221 /// not the encoded offset.
222 bool isLegalSMRDImmOffset(const MCSubtargetInfo &ST, int64_t ByteOffset);
223
212224 } // end namespace AMDGPU
213225 } // end namespace llvm
214226